/* Autogenerated by mlir-tblgen; don't manually edit. */
//===----------------------------------------------------------------------===//
// AMDGPU Group Registration
//===----------------------------------------------------------------------===//

void mlirRegisterAMDGPUPasses(void) {
  registerAMDGPUPasses();
}

MlirPass mlirCreateAMDGPUAmdgpuEmulateAtomicsPass(void) {
  return wrap(createAmdgpuEmulateAtomicsPass().release());
}
void mlirRegisterAMDGPUAmdgpuEmulateAtomicsPass(void) {
  registerAmdgpuEmulateAtomicsPass();
}


MlirPass mlirCreateAMDGPUAmdgpuMaskedloadToLoadPass(void) {
  return wrap(createAmdgpuMaskedloadToLoadPass().release());
}
void mlirRegisterAMDGPUAmdgpuMaskedloadToLoadPass(void) {
  registerAmdgpuMaskedloadToLoadPass();
}


MlirPass mlirCreateAMDGPUAmdgpuResolveStridedMetadataPass(void) {
  return wrap(createAmdgpuResolveStridedMetadataPass().release());
}
void mlirRegisterAMDGPUAmdgpuResolveStridedMetadataPass(void) {
  registerAmdgpuResolveStridedMetadataPass();
}

