Decoder.sv

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00001 
00002 
00004 module Decoder (
00005 input  logic[3:0]   in,          
00006 output logic[15:0]  result,      
00007 output logic        sync,        
00008 input  logic        enable       
00009 );
00010 
00011 assign sync = result[0] || (result[1] && result[2]); 
00012 
00014 always_comb begin : decoder_comb
00015   result = 0;
00016   if (enable) begin
00017     case (in)
00018       4'h0 : result = 16'hA0C1; // A comment
00019       4'h1 : result = 16'h0102;
00020       4'h2 : result = 16'hD303;
00021       4'h3 : result = 16'hC104;
00022       4'h4 : result = 16'h0205;
00023       4'h5 : result = 16'h0D06;
00024       4'h6 : result = 16'hAC07;
00025       4'h7 : result = 16'h0F08;
00026       4'h8 : result = 16'h0569;
00027       4'h9 : result = 16'hC040;
00028       4'hA : result = 16'hA011;
00029       4'hB : result = 16'h4C12;
00030       4'hC : result = 16'hAF13;
00031       4'hD : result = 16'h0C14;
00032       4'hE : result = 16'hC5A5;
00033       4'hF : result = 16'h0C16;
00034     endcase
00035   end
00036 end : decoder_comb
00037 
00038 endmodule
00039 

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