test_Top.sv

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00001 
00002 module test_Top();
00003   
00004   logic ck;           
00005   logic reset_N;      
00006   logic[31:0] result; 
00007   
00009   always begin
00010     #100;             
00011     ck = ~ck;  
00012   end
00013   
00015   initial begin
00016     ck = 0;
00017     reset_N = 0; 
00018     @(posedge ck);
00019     @(posedge ck);    
00020     reset_N = 1;    
00021   end
00022 
00025  Top u_Top(
00026   .ck         (ck),
00027   .reset_N    (reset_N),
00028   .result     (result)
00029   ); 
00030  
00031 endmodule : test_Top
00032 
00033 
00034    

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