ExampleProjects Data Structures

Here are the modules, interfaces, structs and unions with brief descriptions:
CounterThis is the counter module
DecoderThis is a decoder module
Encoder
GateclockReducing the clock. Very bad indeed
test_TopThis module tests the Top module
TopThe design's top module is defined here This module uses a generate to create WIDTH/8 instances of Counter

Generated on Thu Aug 14 17:17:33 2008 for ExampleProjects by  doxygen 1.5.2-SystemVerilog-20080806