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ExampleProjects File List
Here is a list of all files with brief descriptions:
Counter.sv
[code]
Decoder.sv
[code]
Encoder.sv
[code]
Gateclock.sv
[code]
test_Top.sv
[code]
Top.sv
[code]
This is the top file, which contains the
Top
module
Top_Parameters.sv
[code]
Generated on Thu Aug 14 17:17:36 2008 for ExampleProjects by
1.5.2-SystemVerilog-20080806