Processes | |
transitions | ( clk ) |
Types | |
state | ( n0 , n14 , n5 , fill , f0 , f16 , f7 , r7 ) |
Signals | |
cnt | integer RANGE 0 TO 6 |
v | boolean |
z | state |
delayed_dc_av | std_logic |
transitions | ( | clk ) |
state ( n0 , n14 , n5 , fill , f0 , f16 , f7 , r7 ) [Type] |
cnt integer RANGE 0 TO 6 [Signal] |
v boolean [Signal] |
z state [Signal] |
delayed_dc_av std_logic [Signal] |