hdlc_interface Entity Reference

Inheritance diagram for hdlc_interface:

hdlc_interface.mixed

List of all members.


Libraries

ieee 

Packages

std_logic_1164 

Ports

clk  in std_logic
reset  in std_logic
address_to_the_hdlc  in std_logic_vector ( 7 downto 0 )
cpu_be_n_to_the_hdlc  in std_logic
cpu_read_n_to_the_hdlc  in std_logic
cpu_write_n_to_the_hdlc  in std_logic
data_from_cpu_to_the_hdlc  in std_logic_vector ( 7 downto 0 )
data_to_cpu_from_the_hdlc  out std_logic_vector ( 7 downto 0 )
irq_from_the_hdlc  out std_logic
select_to_the_hdlc  in std_logic
tx_led  out std_logic
rx_led  out std_logic
tx  out std_ulogic
rx  in std_logic
debug  out std_logic_vector ( 1 to 11 )

Architectures

mixed Architecture


Member Data Documentation

clk in [Port]

reset in [Port]

address_to_the_hdlc in [Port]

cpu_be_n_to_the_hdlc in [Port]

cpu_read_n_to_the_hdlc in [Port]

cpu_write_n_to_the_hdlc in [Port]

data_from_cpu_to_the_hdlc in [Port]

data_to_cpu_from_the_hdlc out [Port]

irq_from_the_hdlc out [Port]

select_to_the_hdlc in [Port]

tx_led out [Port]

rx_led out [Port]

tx out [Port]

rx in [Port]

debug out [Port]

ieee library [Library]

std_logic_1164 package [Package]


The documentation for this class was generated from the following file:

Generated on Sat Apr 19 14:13:50 2008 by  doxygen 1.5.4-20071103