/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Machine Code Emitter                                                       *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/

uint64_t AMDGPUMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
    SmallVectorImpl<MCFixup> &Fixups,
    const MCSubtargetInfo &STI) const {
  static const uint64_t InstBits[] = {
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(0),
    UINT64_C(3771252736),	// BUFFER_ATOMIC_ADD_ADDR64_RTN_si
    UINT64_C(3771236352),	// BUFFER_ATOMIC_ADD_ADDR64_si
    UINT64_C(3771232256),	// BUFFER_ATOMIC_ADD_BOTHEN_RTN_si
    UINT64_C(3775426560),	// BUFFER_ATOMIC_ADD_BOTHEN_RTN_vi
    UINT64_C(3771215872),	// BUFFER_ATOMIC_ADD_BOTHEN_si
    UINT64_C(3775410176),	// BUFFER_ATOMIC_ADD_BOTHEN_vi
    UINT64_C(3771228160),	// BUFFER_ATOMIC_ADD_IDXEN_RTN_si
    UINT64_C(3775422464),	// BUFFER_ATOMIC_ADD_IDXEN_RTN_vi
    UINT64_C(3771211776),	// BUFFER_ATOMIC_ADD_IDXEN_si
    UINT64_C(3775406080),	// BUFFER_ATOMIC_ADD_IDXEN_vi
    UINT64_C(3771224064),	// BUFFER_ATOMIC_ADD_OFFEN_RTN_si
    UINT64_C(3775418368),	// BUFFER_ATOMIC_ADD_OFFEN_RTN_vi
    UINT64_C(3771207680),	// BUFFER_ATOMIC_ADD_OFFEN_si
    UINT64_C(3775401984),	// BUFFER_ATOMIC_ADD_OFFEN_vi
    UINT64_C(3771219968),	// BUFFER_ATOMIC_ADD_OFFSET_RTN_si
    UINT64_C(3775414272),	// BUFFER_ATOMIC_ADD_OFFSET_RTN_vi
    UINT64_C(3771203584),	// BUFFER_ATOMIC_ADD_OFFSET_si
    UINT64_C(3775397888),	// BUFFER_ATOMIC_ADD_OFFSET_vi
    UINT64_C(3779641344),	// BUFFER_ATOMIC_ADD_X2_ADDR64_RTN_si
    UINT64_C(3779624960),	// BUFFER_ATOMIC_ADD_X2_ADDR64_si
    UINT64_C(3779620864),	// BUFFER_ATOMIC_ADD_X2_BOTHEN_RTN_si
    UINT64_C(3783815168),	// BUFFER_ATOMIC_ADD_X2_BOTHEN_RTN_vi
    UINT64_C(3779604480),	// BUFFER_ATOMIC_ADD_X2_BOTHEN_si
    UINT64_C(3783798784),	// BUFFER_ATOMIC_ADD_X2_BOTHEN_vi
    UINT64_C(3779616768),	// BUFFER_ATOMIC_ADD_X2_IDXEN_RTN_si
    UINT64_C(3783811072),	// BUFFER_ATOMIC_ADD_X2_IDXEN_RTN_vi
    UINT64_C(3779600384),	// BUFFER_ATOMIC_ADD_X2_IDXEN_si
    UINT64_C(3783794688),	// BUFFER_ATOMIC_ADD_X2_IDXEN_vi
    UINT64_C(3779612672),	// BUFFER_ATOMIC_ADD_X2_OFFEN_RTN_si
    UINT64_C(3783806976),	// BUFFER_ATOMIC_ADD_X2_OFFEN_RTN_vi
    UINT64_C(3779596288),	// BUFFER_ATOMIC_ADD_X2_OFFEN_si
    UINT64_C(3783790592),	// BUFFER_ATOMIC_ADD_X2_OFFEN_vi
    UINT64_C(3779608576),	// BUFFER_ATOMIC_ADD_X2_OFFSET_RTN_si
    UINT64_C(3783802880),	// BUFFER_ATOMIC_ADD_X2_OFFSET_RTN_vi
    UINT64_C(3779592192),	// BUFFER_ATOMIC_ADD_X2_OFFSET_si
    UINT64_C(3783786496),	// BUFFER_ATOMIC_ADD_X2_OFFSET_vi
    UINT64_C(3773087744),	// BUFFER_ATOMIC_AND_ADDR64_RTN_si
    UINT64_C(3773071360),	// BUFFER_ATOMIC_AND_ADDR64_si
    UINT64_C(3773067264),	// BUFFER_ATOMIC_AND_BOTHEN_RTN_si
    UINT64_C(3776999424),	// BUFFER_ATOMIC_AND_BOTHEN_RTN_vi
    UINT64_C(3773050880),	// BUFFER_ATOMIC_AND_BOTHEN_si
    UINT64_C(3776983040),	// BUFFER_ATOMIC_AND_BOTHEN_vi
    UINT64_C(3773063168),	// BUFFER_ATOMIC_AND_IDXEN_RTN_si
    UINT64_C(3776995328),	// BUFFER_ATOMIC_AND_IDXEN_RTN_vi
    UINT64_C(3773046784),	// BUFFER_ATOMIC_AND_IDXEN_si
    UINT64_C(3776978944),	// BUFFER_ATOMIC_AND_IDXEN_vi
    UINT64_C(3773059072),	// BUFFER_ATOMIC_AND_OFFEN_RTN_si
    UINT64_C(3776991232),	// BUFFER_ATOMIC_AND_OFFEN_RTN_vi
    UINT64_C(3773042688),	// BUFFER_ATOMIC_AND_OFFEN_si
    UINT64_C(3776974848),	// BUFFER_ATOMIC_AND_OFFEN_vi
    UINT64_C(3773054976),	// BUFFER_ATOMIC_AND_OFFSET_RTN_si
    UINT64_C(3776987136),	// BUFFER_ATOMIC_AND_OFFSET_RTN_vi
    UINT64_C(3773038592),	// BUFFER_ATOMIC_AND_OFFSET_si
    UINT64_C(3776970752),	// BUFFER_ATOMIC_AND_OFFSET_vi
    UINT64_C(3781476352),	// BUFFER_ATOMIC_AND_X2_ADDR64_RTN_si
    UINT64_C(3781459968),	// BUFFER_ATOMIC_AND_X2_ADDR64_si
    UINT64_C(3781455872),	// BUFFER_ATOMIC_AND_X2_BOTHEN_RTN_si
    UINT64_C(3785388032),	// BUFFER_ATOMIC_AND_X2_BOTHEN_RTN_vi
    UINT64_C(3781439488),	// BUFFER_ATOMIC_AND_X2_BOTHEN_si
    UINT64_C(3785371648),	// BUFFER_ATOMIC_AND_X2_BOTHEN_vi
    UINT64_C(3781451776),	// BUFFER_ATOMIC_AND_X2_IDXEN_RTN_si
    UINT64_C(3785383936),	// BUFFER_ATOMIC_AND_X2_IDXEN_RTN_vi
    UINT64_C(3781435392),	// BUFFER_ATOMIC_AND_X2_IDXEN_si
    UINT64_C(3785367552),	// BUFFER_ATOMIC_AND_X2_IDXEN_vi
    UINT64_C(3781447680),	// BUFFER_ATOMIC_AND_X2_OFFEN_RTN_si
    UINT64_C(3785379840),	// BUFFER_ATOMIC_AND_X2_OFFEN_RTN_vi
    UINT64_C(3781431296),	// BUFFER_ATOMIC_AND_X2_OFFEN_si
    UINT64_C(3785363456),	// BUFFER_ATOMIC_AND_X2_OFFEN_vi
    UINT64_C(3781443584),	// BUFFER_ATOMIC_AND_X2_OFFSET_RTN_si
    UINT64_C(3785375744),	// BUFFER_ATOMIC_AND_X2_OFFSET_RTN_vi
    UINT64_C(3781427200),	// BUFFER_ATOMIC_AND_X2_OFFSET_si
    UINT64_C(3785359360),	// BUFFER_ATOMIC_AND_X2_OFFSET_vi
    UINT64_C(3770990592),	// BUFFER_ATOMIC_CMPSWAP_ADDR64_RTN_si
    UINT64_C(3770974208),	// BUFFER_ATOMIC_CMPSWAP_ADDR64_si
    UINT64_C(3770970112),	// BUFFER_ATOMIC_CMPSWAP_BOTHEN_RTN_si
    UINT64_C(3775164416),	// BUFFER_ATOMIC_CMPSWAP_BOTHEN_RTN_vi
    UINT64_C(3770953728),	// BUFFER_ATOMIC_CMPSWAP_BOTHEN_si
    UINT64_C(3775148032),	// BUFFER_ATOMIC_CMPSWAP_BOTHEN_vi
    UINT64_C(3770966016),	// BUFFER_ATOMIC_CMPSWAP_IDXEN_RTN_si
    UINT64_C(3775160320),	// BUFFER_ATOMIC_CMPSWAP_IDXEN_RTN_vi
    UINT64_C(3770949632),	// BUFFER_ATOMIC_CMPSWAP_IDXEN_si
    UINT64_C(3775143936),	// BUFFER_ATOMIC_CMPSWAP_IDXEN_vi
    UINT64_C(3770961920),	// BUFFER_ATOMIC_CMPSWAP_OFFEN_RTN_si
    UINT64_C(3775156224),	// BUFFER_ATOMIC_CMPSWAP_OFFEN_RTN_vi
    UINT64_C(3770945536),	// BUFFER_ATOMIC_CMPSWAP_OFFEN_si
    UINT64_C(3775139840),	// BUFFER_ATOMIC_CMPSWAP_OFFEN_vi
    UINT64_C(3770957824),	// BUFFER_ATOMIC_CMPSWAP_OFFSET_RTN_si
    UINT64_C(3775152128),	// BUFFER_ATOMIC_CMPSWAP_OFFSET_RTN_vi
    UINT64_C(3770941440),	// BUFFER_ATOMIC_CMPSWAP_OFFSET_si
    UINT64_C(3775135744),	// BUFFER_ATOMIC_CMPSWAP_OFFSET_vi
    UINT64_C(3779379200),	// BUFFER_ATOMIC_CMPSWAP_X2_ADDR64_RTN_si
    UINT64_C(3779362816),	// BUFFER_ATOMIC_CMPSWAP_X2_ADDR64_si
    UINT64_C(3779358720),	// BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN_RTN_si
    UINT64_C(3783553024),	// BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN_RTN_vi
    UINT64_C(3779342336),	// BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN_si
    UINT64_C(3783536640),	// BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN_vi
    UINT64_C(3779354624),	// BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_RTN_si
    UINT64_C(3783548928),	// BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_RTN_vi
    UINT64_C(3779338240),	// BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_si
    UINT64_C(3783532544),	// BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_vi
    UINT64_C(3779350528),	// BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_RTN_si
    UINT64_C(3783544832),	// BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_RTN_vi
    UINT64_C(3779334144),	// BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_si
    UINT64_C(3783528448),	// BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_vi
    UINT64_C(3779346432),	// BUFFER_ATOMIC_CMPSWAP_X2_OFFSET_RTN_si
    UINT64_C(3783540736),	// BUFFER_ATOMIC_CMPSWAP_X2_OFFSET_RTN_vi
    UINT64_C(3779330048),	// BUFFER_ATOMIC_CMPSWAP_X2_OFFSET_si
    UINT64_C(3783524352),	// BUFFER_ATOMIC_CMPSWAP_X2_OFFSET_vi
    UINT64_C(3774136320),	// BUFFER_ATOMIC_DEC_ADDR64_RTN_si
    UINT64_C(3774119936),	// BUFFER_ATOMIC_DEC_ADDR64_si
    UINT64_C(3774115840),	// BUFFER_ATOMIC_DEC_BOTHEN_RTN_si
    UINT64_C(3778048000),	// BUFFER_ATOMIC_DEC_BOTHEN_RTN_vi
    UINT64_C(3774099456),	// BUFFER_ATOMIC_DEC_BOTHEN_si
    UINT64_C(3778031616),	// BUFFER_ATOMIC_DEC_BOTHEN_vi
    UINT64_C(3774111744),	// BUFFER_ATOMIC_DEC_IDXEN_RTN_si
    UINT64_C(3778043904),	// BUFFER_ATOMIC_DEC_IDXEN_RTN_vi
    UINT64_C(3774095360),	// BUFFER_ATOMIC_DEC_IDXEN_si
    UINT64_C(3778027520),	// BUFFER_ATOMIC_DEC_IDXEN_vi
    UINT64_C(3774107648),	// BUFFER_ATOMIC_DEC_OFFEN_RTN_si
    UINT64_C(3778039808),	// BUFFER_ATOMIC_DEC_OFFEN_RTN_vi
    UINT64_C(3774091264),	// BUFFER_ATOMIC_DEC_OFFEN_si
    UINT64_C(3778023424),	// BUFFER_ATOMIC_DEC_OFFEN_vi
    UINT64_C(3774103552),	// BUFFER_ATOMIC_DEC_OFFSET_RTN_si
    UINT64_C(3778035712),	// BUFFER_ATOMIC_DEC_OFFSET_RTN_vi
    UINT64_C(3774087168),	// BUFFER_ATOMIC_DEC_OFFSET_si
    UINT64_C(3778019328),	// BUFFER_ATOMIC_DEC_OFFSET_vi
    UINT64_C(3782524928),	// BUFFER_ATOMIC_DEC_X2_ADDR64_RTN_si
    UINT64_C(3782508544),	// BUFFER_ATOMIC_DEC_X2_ADDR64_si
    UINT64_C(3782504448),	// BUFFER_ATOMIC_DEC_X2_BOTHEN_RTN_si
    UINT64_C(3786436608),	// BUFFER_ATOMIC_DEC_X2_BOTHEN_RTN_vi
    UINT64_C(3782488064),	// BUFFER_ATOMIC_DEC_X2_BOTHEN_si
    UINT64_C(3786420224),	// BUFFER_ATOMIC_DEC_X2_BOTHEN_vi
    UINT64_C(3782500352),	// BUFFER_ATOMIC_DEC_X2_IDXEN_RTN_si
    UINT64_C(3786432512),	// BUFFER_ATOMIC_DEC_X2_IDXEN_RTN_vi
    UINT64_C(3782483968),	// BUFFER_ATOMIC_DEC_X2_IDXEN_si
    UINT64_C(3786416128),	// BUFFER_ATOMIC_DEC_X2_IDXEN_vi
    UINT64_C(3782496256),	// BUFFER_ATOMIC_DEC_X2_OFFEN_RTN_si
    UINT64_C(3786428416),	// BUFFER_ATOMIC_DEC_X2_OFFEN_RTN_vi
    UINT64_C(3782479872),	// BUFFER_ATOMIC_DEC_X2_OFFEN_si
    UINT64_C(3786412032),	// BUFFER_ATOMIC_DEC_X2_OFFEN_vi
    UINT64_C(3782492160),	// BUFFER_ATOMIC_DEC_X2_OFFSET_RTN_si
    UINT64_C(3786424320),	// BUFFER_ATOMIC_DEC_X2_OFFSET_RTN_vi
    UINT64_C(3782475776),	// BUFFER_ATOMIC_DEC_X2_OFFSET_si
    UINT64_C(3786407936),	// BUFFER_ATOMIC_DEC_X2_OFFSET_vi
    UINT64_C(3773874176),	// BUFFER_ATOMIC_INC_ADDR64_RTN_si
    UINT64_C(3773857792),	// BUFFER_ATOMIC_INC_ADDR64_si
    UINT64_C(3773853696),	// BUFFER_ATOMIC_INC_BOTHEN_RTN_si
    UINT64_C(3777785856),	// BUFFER_ATOMIC_INC_BOTHEN_RTN_vi
    UINT64_C(3773837312),	// BUFFER_ATOMIC_INC_BOTHEN_si
    UINT64_C(3777769472),	// BUFFER_ATOMIC_INC_BOTHEN_vi
    UINT64_C(3773849600),	// BUFFER_ATOMIC_INC_IDXEN_RTN_si
    UINT64_C(3777781760),	// BUFFER_ATOMIC_INC_IDXEN_RTN_vi
    UINT64_C(3773833216),	// BUFFER_ATOMIC_INC_IDXEN_si
    UINT64_C(3777765376),	// BUFFER_ATOMIC_INC_IDXEN_vi
    UINT64_C(3773845504),	// BUFFER_ATOMIC_INC_OFFEN_RTN_si
    UINT64_C(3777777664),	// BUFFER_ATOMIC_INC_OFFEN_RTN_vi
    UINT64_C(3773829120),	// BUFFER_ATOMIC_INC_OFFEN_si
    UINT64_C(3777761280),	// BUFFER_ATOMIC_INC_OFFEN_vi
    UINT64_C(3773841408),	// BUFFER_ATOMIC_INC_OFFSET_RTN_si
    UINT64_C(3777773568),	// BUFFER_ATOMIC_INC_OFFSET_RTN_vi
    UINT64_C(3773825024),	// BUFFER_ATOMIC_INC_OFFSET_si
    UINT64_C(3777757184),	// BUFFER_ATOMIC_INC_OFFSET_vi
    UINT64_C(3782262784),	// BUFFER_ATOMIC_INC_X2_ADDR64_RTN_si
    UINT64_C(3782246400),	// BUFFER_ATOMIC_INC_X2_ADDR64_si
    UINT64_C(3782242304),	// BUFFER_ATOMIC_INC_X2_BOTHEN_RTN_si
    UINT64_C(3786174464),	// BUFFER_ATOMIC_INC_X2_BOTHEN_RTN_vi
    UINT64_C(3782225920),	// BUFFER_ATOMIC_INC_X2_BOTHEN_si
    UINT64_C(3786158080),	// BUFFER_ATOMIC_INC_X2_BOTHEN_vi
    UINT64_C(3782238208),	// BUFFER_ATOMIC_INC_X2_IDXEN_RTN_si
    UINT64_C(3786170368),	// BUFFER_ATOMIC_INC_X2_IDXEN_RTN_vi
    UINT64_C(3782221824),	// BUFFER_ATOMIC_INC_X2_IDXEN_si
    UINT64_C(3786153984),	// BUFFER_ATOMIC_INC_X2_IDXEN_vi
    UINT64_C(3782234112),	// BUFFER_ATOMIC_INC_X2_OFFEN_RTN_si
    UINT64_C(3786166272),	// BUFFER_ATOMIC_INC_X2_OFFEN_RTN_vi
    UINT64_C(3782217728),	// BUFFER_ATOMIC_INC_X2_OFFEN_si
    UINT64_C(3786149888),	// BUFFER_ATOMIC_INC_X2_OFFEN_vi
    UINT64_C(3782230016),	// BUFFER_ATOMIC_INC_X2_OFFSET_RTN_si
    UINT64_C(3786162176),	// BUFFER_ATOMIC_INC_X2_OFFSET_RTN_vi
    UINT64_C(3782213632),	// BUFFER_ATOMIC_INC_X2_OFFSET_si
    UINT64_C(3786145792),	// BUFFER_ATOMIC_INC_X2_OFFSET_vi
    UINT64_C(3773349888),	// BUFFER_ATOMIC_OR_ADDR64_RTN_si
    UINT64_C(3773333504),	// BUFFER_ATOMIC_OR_ADDR64_si
    UINT64_C(3773329408),	// BUFFER_ATOMIC_OR_BOTHEN_RTN_si
    UINT64_C(3777261568),	// BUFFER_ATOMIC_OR_BOTHEN_RTN_vi
    UINT64_C(3773313024),	// BUFFER_ATOMIC_OR_BOTHEN_si
    UINT64_C(3777245184),	// BUFFER_ATOMIC_OR_BOTHEN_vi
    UINT64_C(3773325312),	// BUFFER_ATOMIC_OR_IDXEN_RTN_si
    UINT64_C(3777257472),	// BUFFER_ATOMIC_OR_IDXEN_RTN_vi
    UINT64_C(3773308928),	// BUFFER_ATOMIC_OR_IDXEN_si
    UINT64_C(3777241088),	// BUFFER_ATOMIC_OR_IDXEN_vi
    UINT64_C(3773321216),	// BUFFER_ATOMIC_OR_OFFEN_RTN_si
    UINT64_C(3777253376),	// BUFFER_ATOMIC_OR_OFFEN_RTN_vi
    UINT64_C(3773304832),	// BUFFER_ATOMIC_OR_OFFEN_si
    UINT64_C(3777236992),	// BUFFER_ATOMIC_OR_OFFEN_vi
    UINT64_C(3773317120),	// BUFFER_ATOMIC_OR_OFFSET_RTN_si
    UINT64_C(3777249280),	// BUFFER_ATOMIC_OR_OFFSET_RTN_vi
    UINT64_C(3773300736),	// BUFFER_ATOMIC_OR_OFFSET_si
    UINT64_C(3777232896),	// BUFFER_ATOMIC_OR_OFFSET_vi
    UINT64_C(3781738496),	// BUFFER_ATOMIC_OR_X2_ADDR64_RTN_si
    UINT64_C(3781722112),	// BUFFER_ATOMIC_OR_X2_ADDR64_si
    UINT64_C(3781718016),	// BUFFER_ATOMIC_OR_X2_BOTHEN_RTN_si
    UINT64_C(3785650176),	// BUFFER_ATOMIC_OR_X2_BOTHEN_RTN_vi
    UINT64_C(3781701632),	// BUFFER_ATOMIC_OR_X2_BOTHEN_si
    UINT64_C(3785633792),	// BUFFER_ATOMIC_OR_X2_BOTHEN_vi
    UINT64_C(3781713920),	// BUFFER_ATOMIC_OR_X2_IDXEN_RTN_si
    UINT64_C(3785646080),	// BUFFER_ATOMIC_OR_X2_IDXEN_RTN_vi
    UINT64_C(3781697536),	// BUFFER_ATOMIC_OR_X2_IDXEN_si
    UINT64_C(3785629696),	// BUFFER_ATOMIC_OR_X2_IDXEN_vi
    UINT64_C(3781709824),	// BUFFER_ATOMIC_OR_X2_OFFEN_RTN_si
    UINT64_C(3785641984),	// BUFFER_ATOMIC_OR_X2_OFFEN_RTN_vi
    UINT64_C(3781693440),	// BUFFER_ATOMIC_OR_X2_OFFEN_si
    UINT64_C(3785625600),	// BUFFER_ATOMIC_OR_X2_OFFEN_vi
    UINT64_C(3781705728),	// BUFFER_ATOMIC_OR_X2_OFFSET_RTN_si
    UINT64_C(3785637888),	// BUFFER_ATOMIC_OR_X2_OFFSET_RTN_vi
    UINT64_C(3781689344),	// BUFFER_ATOMIC_OR_X2_OFFSET_si
    UINT64_C(3785621504),	// BUFFER_ATOMIC_OR_X2_OFFSET_vi
    UINT64_C(3772563456),	// BUFFER_ATOMIC_SMAX_ADDR64_RTN_si
    UINT64_C(3772547072),	// BUFFER_ATOMIC_SMAX_ADDR64_si
    UINT64_C(3772542976),	// BUFFER_ATOMIC_SMAX_BOTHEN_RTN_si
    UINT64_C(3776475136),	// BUFFER_ATOMIC_SMAX_BOTHEN_RTN_vi
    UINT64_C(3772526592),	// BUFFER_ATOMIC_SMAX_BOTHEN_si
    UINT64_C(3776458752),	// BUFFER_ATOMIC_SMAX_BOTHEN_vi
    UINT64_C(3772538880),	// BUFFER_ATOMIC_SMAX_IDXEN_RTN_si
    UINT64_C(3776471040),	// BUFFER_ATOMIC_SMAX_IDXEN_RTN_vi
    UINT64_C(3772522496),	// BUFFER_ATOMIC_SMAX_IDXEN_si
    UINT64_C(3776454656),	// BUFFER_ATOMIC_SMAX_IDXEN_vi
    UINT64_C(3772534784),	// BUFFER_ATOMIC_SMAX_OFFEN_RTN_si
    UINT64_C(3776466944),	// BUFFER_ATOMIC_SMAX_OFFEN_RTN_vi
    UINT64_C(3772518400),	// BUFFER_ATOMIC_SMAX_OFFEN_si
    UINT64_C(3776450560),	// BUFFER_ATOMIC_SMAX_OFFEN_vi
    UINT64_C(3772530688),	// BUFFER_ATOMIC_SMAX_OFFSET_RTN_si
    UINT64_C(3776462848),	// BUFFER_ATOMIC_SMAX_OFFSET_RTN_vi
    UINT64_C(3772514304),	// BUFFER_ATOMIC_SMAX_OFFSET_si
    UINT64_C(3776446464),	// BUFFER_ATOMIC_SMAX_OFFSET_vi
    UINT64_C(3780952064),	// BUFFER_ATOMIC_SMAX_X2_ADDR64_RTN_si
    UINT64_C(3780935680),	// BUFFER_ATOMIC_SMAX_X2_ADDR64_si
    UINT64_C(3780931584),	// BUFFER_ATOMIC_SMAX_X2_BOTHEN_RTN_si
    UINT64_C(3784863744),	// BUFFER_ATOMIC_SMAX_X2_BOTHEN_RTN_vi
    UINT64_C(3780915200),	// BUFFER_ATOMIC_SMAX_X2_BOTHEN_si
    UINT64_C(3784847360),	// BUFFER_ATOMIC_SMAX_X2_BOTHEN_vi
    UINT64_C(3780927488),	// BUFFER_ATOMIC_SMAX_X2_IDXEN_RTN_si
    UINT64_C(3784859648),	// BUFFER_ATOMIC_SMAX_X2_IDXEN_RTN_vi
    UINT64_C(3780911104),	// BUFFER_ATOMIC_SMAX_X2_IDXEN_si
    UINT64_C(3784843264),	// BUFFER_ATOMIC_SMAX_X2_IDXEN_vi
    UINT64_C(3780923392),	// BUFFER_ATOMIC_SMAX_X2_OFFEN_RTN_si
    UINT64_C(3784855552),	// BUFFER_ATOMIC_SMAX_X2_OFFEN_RTN_vi
    UINT64_C(3780907008),	// BUFFER_ATOMIC_SMAX_X2_OFFEN_si
    UINT64_C(3784839168),	// BUFFER_ATOMIC_SMAX_X2_OFFEN_vi
    UINT64_C(3780919296),	// BUFFER_ATOMIC_SMAX_X2_OFFSET_RTN_si
    UINT64_C(3784851456),	// BUFFER_ATOMIC_SMAX_X2_OFFSET_RTN_vi
    UINT64_C(3780902912),	// BUFFER_ATOMIC_SMAX_X2_OFFSET_si
    UINT64_C(3784835072),	// BUFFER_ATOMIC_SMAX_X2_OFFSET_vi
    UINT64_C(3772039168),	// BUFFER_ATOMIC_SMIN_ADDR64_RTN_si
    UINT64_C(3772022784),	// BUFFER_ATOMIC_SMIN_ADDR64_si
    UINT64_C(3772018688),	// BUFFER_ATOMIC_SMIN_BOTHEN_RTN_si
    UINT64_C(3775950848),	// BUFFER_ATOMIC_SMIN_BOTHEN_RTN_vi
    UINT64_C(3772002304),	// BUFFER_ATOMIC_SMIN_BOTHEN_si
    UINT64_C(3775934464),	// BUFFER_ATOMIC_SMIN_BOTHEN_vi
    UINT64_C(3772014592),	// BUFFER_ATOMIC_SMIN_IDXEN_RTN_si
    UINT64_C(3775946752),	// BUFFER_ATOMIC_SMIN_IDXEN_RTN_vi
    UINT64_C(3771998208),	// BUFFER_ATOMIC_SMIN_IDXEN_si
    UINT64_C(3775930368),	// BUFFER_ATOMIC_SMIN_IDXEN_vi
    UINT64_C(3772010496),	// BUFFER_ATOMIC_SMIN_OFFEN_RTN_si
    UINT64_C(3775942656),	// BUFFER_ATOMIC_SMIN_OFFEN_RTN_vi
    UINT64_C(3771994112),	// BUFFER_ATOMIC_SMIN_OFFEN_si
    UINT64_C(3775926272),	// BUFFER_ATOMIC_SMIN_OFFEN_vi
    UINT64_C(3772006400),	// BUFFER_ATOMIC_SMIN_OFFSET_RTN_si
    UINT64_C(3775938560),	// BUFFER_ATOMIC_SMIN_OFFSET_RTN_vi
    UINT64_C(3771990016),	// BUFFER_ATOMIC_SMIN_OFFSET_si
    UINT64_C(3775922176),	// BUFFER_ATOMIC_SMIN_OFFSET_vi
    UINT64_C(3780427776),	// BUFFER_ATOMIC_SMIN_X2_ADDR64_RTN_si
    UINT64_C(3780411392),	// BUFFER_ATOMIC_SMIN_X2_ADDR64_si
    UINT64_C(3780407296),	// BUFFER_ATOMIC_SMIN_X2_BOTHEN_RTN_si
    UINT64_C(3784339456),	// BUFFER_ATOMIC_SMIN_X2_BOTHEN_RTN_vi
    UINT64_C(3780390912),	// BUFFER_ATOMIC_SMIN_X2_BOTHEN_si
    UINT64_C(3784323072),	// BUFFER_ATOMIC_SMIN_X2_BOTHEN_vi
    UINT64_C(3780403200),	// BUFFER_ATOMIC_SMIN_X2_IDXEN_RTN_si
    UINT64_C(3784335360),	// BUFFER_ATOMIC_SMIN_X2_IDXEN_RTN_vi
    UINT64_C(3780386816),	// BUFFER_ATOMIC_SMIN_X2_IDXEN_si
    UINT64_C(3784318976),	// BUFFER_ATOMIC_SMIN_X2_IDXEN_vi
    UINT64_C(3780399104),	// BUFFER_ATOMIC_SMIN_X2_OFFEN_RTN_si
    UINT64_C(3784331264),	// BUFFER_ATOMIC_SMIN_X2_OFFEN_RTN_vi
    UINT64_C(3780382720),	// BUFFER_ATOMIC_SMIN_X2_OFFEN_si
    UINT64_C(3784314880),	// BUFFER_ATOMIC_SMIN_X2_OFFEN_vi
    UINT64_C(3780395008),	// BUFFER_ATOMIC_SMIN_X2_OFFSET_RTN_si
    UINT64_C(3784327168),	// BUFFER_ATOMIC_SMIN_X2_OFFSET_RTN_vi
    UINT64_C(3780378624),	// BUFFER_ATOMIC_SMIN_X2_OFFSET_si
    UINT64_C(3784310784),	// BUFFER_ATOMIC_SMIN_X2_OFFSET_vi
    UINT64_C(3771514880),	// BUFFER_ATOMIC_SUB_ADDR64_RTN_si
    UINT64_C(3771498496),	// BUFFER_ATOMIC_SUB_ADDR64_si
    UINT64_C(3771494400),	// BUFFER_ATOMIC_SUB_BOTHEN_RTN_si
    UINT64_C(3775688704),	// BUFFER_ATOMIC_SUB_BOTHEN_RTN_vi
    UINT64_C(3771478016),	// BUFFER_ATOMIC_SUB_BOTHEN_si
    UINT64_C(3775672320),	// BUFFER_ATOMIC_SUB_BOTHEN_vi
    UINT64_C(3771490304),	// BUFFER_ATOMIC_SUB_IDXEN_RTN_si
    UINT64_C(3775684608),	// BUFFER_ATOMIC_SUB_IDXEN_RTN_vi
    UINT64_C(3771473920),	// BUFFER_ATOMIC_SUB_IDXEN_si
    UINT64_C(3775668224),	// BUFFER_ATOMIC_SUB_IDXEN_vi
    UINT64_C(3771486208),	// BUFFER_ATOMIC_SUB_OFFEN_RTN_si
    UINT64_C(3775680512),	// BUFFER_ATOMIC_SUB_OFFEN_RTN_vi
    UINT64_C(3771469824),	// BUFFER_ATOMIC_SUB_OFFEN_si
    UINT64_C(3775664128),	// BUFFER_ATOMIC_SUB_OFFEN_vi
    UINT64_C(3771482112),	// BUFFER_ATOMIC_SUB_OFFSET_RTN_si
    UINT64_C(3775676416),	// BUFFER_ATOMIC_SUB_OFFSET_RTN_vi
    UINT64_C(3771465728),	// BUFFER_ATOMIC_SUB_OFFSET_si
    UINT64_C(3775660032),	// BUFFER_ATOMIC_SUB_OFFSET_vi
    UINT64_C(3779903488),	// BUFFER_ATOMIC_SUB_X2_ADDR64_RTN_si
    UINT64_C(3779887104),	// BUFFER_ATOMIC_SUB_X2_ADDR64_si
    UINT64_C(3779883008),	// BUFFER_ATOMIC_SUB_X2_BOTHEN_RTN_si
    UINT64_C(3784077312),	// BUFFER_ATOMIC_SUB_X2_BOTHEN_RTN_vi
    UINT64_C(3779866624),	// BUFFER_ATOMIC_SUB_X2_BOTHEN_si
    UINT64_C(3784060928),	// BUFFER_ATOMIC_SUB_X2_BOTHEN_vi
    UINT64_C(3779878912),	// BUFFER_ATOMIC_SUB_X2_IDXEN_RTN_si
    UINT64_C(3784073216),	// BUFFER_ATOMIC_SUB_X2_IDXEN_RTN_vi
    UINT64_C(3779862528),	// BUFFER_ATOMIC_SUB_X2_IDXEN_si
    UINT64_C(3784056832),	// BUFFER_ATOMIC_SUB_X2_IDXEN_vi
    UINT64_C(3779874816),	// BUFFER_ATOMIC_SUB_X2_OFFEN_RTN_si
    UINT64_C(3784069120),	// BUFFER_ATOMIC_SUB_X2_OFFEN_RTN_vi
    UINT64_C(3779858432),	// BUFFER_ATOMIC_SUB_X2_OFFEN_si
    UINT64_C(3784052736),	// BUFFER_ATOMIC_SUB_X2_OFFEN_vi
    UINT64_C(3779870720),	// BUFFER_ATOMIC_SUB_X2_OFFSET_RTN_si
    UINT64_C(3784065024),	// BUFFER_ATOMIC_SUB_X2_OFFSET_RTN_vi
    UINT64_C(3779854336),	// BUFFER_ATOMIC_SUB_X2_OFFSET_si
    UINT64_C(3784048640),	// BUFFER_ATOMIC_SUB_X2_OFFSET_vi
    UINT64_C(3770728448),	// BUFFER_ATOMIC_SWAP_ADDR64_RTN_si
    UINT64_C(3770712064),	// BUFFER_ATOMIC_SWAP_ADDR64_si
    UINT64_C(3770707968),	// BUFFER_ATOMIC_SWAP_BOTHEN_RTN_si
    UINT64_C(3774902272),	// BUFFER_ATOMIC_SWAP_BOTHEN_RTN_vi
    UINT64_C(3770691584),	// BUFFER_ATOMIC_SWAP_BOTHEN_si
    UINT64_C(3774885888),	// BUFFER_ATOMIC_SWAP_BOTHEN_vi
    UINT64_C(3770703872),	// BUFFER_ATOMIC_SWAP_IDXEN_RTN_si
    UINT64_C(3774898176),	// BUFFER_ATOMIC_SWAP_IDXEN_RTN_vi
    UINT64_C(3770687488),	// BUFFER_ATOMIC_SWAP_IDXEN_si
    UINT64_C(3774881792),	// BUFFER_ATOMIC_SWAP_IDXEN_vi
    UINT64_C(3770699776),	// BUFFER_ATOMIC_SWAP_OFFEN_RTN_si
    UINT64_C(3774894080),	// BUFFER_ATOMIC_SWAP_OFFEN_RTN_vi
    UINT64_C(3770683392),	// BUFFER_ATOMIC_SWAP_OFFEN_si
    UINT64_C(3774877696),	// BUFFER_ATOMIC_SWAP_OFFEN_vi
    UINT64_C(3770695680),	// BUFFER_ATOMIC_SWAP_OFFSET_RTN_si
    UINT64_C(3774889984),	// BUFFER_ATOMIC_SWAP_OFFSET_RTN_vi
    UINT64_C(3770679296),	// BUFFER_ATOMIC_SWAP_OFFSET_si
    UINT64_C(3774873600),	// BUFFER_ATOMIC_SWAP_OFFSET_vi
    UINT64_C(3779117056),	// BUFFER_ATOMIC_SWAP_X2_ADDR64_RTN_si
    UINT64_C(3779100672),	// BUFFER_ATOMIC_SWAP_X2_ADDR64_si
    UINT64_C(3779096576),	// BUFFER_ATOMIC_SWAP_X2_BOTHEN_RTN_si
    UINT64_C(3783290880),	// BUFFER_ATOMIC_SWAP_X2_BOTHEN_RTN_vi
    UINT64_C(3779080192),	// BUFFER_ATOMIC_SWAP_X2_BOTHEN_si
    UINT64_C(3783274496),	// BUFFER_ATOMIC_SWAP_X2_BOTHEN_vi
    UINT64_C(3779092480),	// BUFFER_ATOMIC_SWAP_X2_IDXEN_RTN_si
    UINT64_C(3783286784),	// BUFFER_ATOMIC_SWAP_X2_IDXEN_RTN_vi
    UINT64_C(3779076096),	// BUFFER_ATOMIC_SWAP_X2_IDXEN_si
    UINT64_C(3783270400),	// BUFFER_ATOMIC_SWAP_X2_IDXEN_vi
    UINT64_C(3779088384),	// BUFFER_ATOMIC_SWAP_X2_OFFEN_RTN_si
    UINT64_C(3783282688),	// BUFFER_ATOMIC_SWAP_X2_OFFEN_RTN_vi
    UINT64_C(3779072000),	// BUFFER_ATOMIC_SWAP_X2_OFFEN_si
    UINT64_C(3783266304),	// BUFFER_ATOMIC_SWAP_X2_OFFEN_vi
    UINT64_C(3779084288),	// BUFFER_ATOMIC_SWAP_X2_OFFSET_RTN_si
    UINT64_C(3783278592),	// BUFFER_ATOMIC_SWAP_X2_OFFSET_RTN_vi
    UINT64_C(3779067904),	// BUFFER_ATOMIC_SWAP_X2_OFFSET_si
    UINT64_C(3783262208),	// BUFFER_ATOMIC_SWAP_X2_OFFSET_vi
    UINT64_C(3772825600),	// BUFFER_ATOMIC_UMAX_ADDR64_RTN_si
    UINT64_C(3772809216),	// BUFFER_ATOMIC_UMAX_ADDR64_si
    UINT64_C(3772805120),	// BUFFER_ATOMIC_UMAX_BOTHEN_RTN_si
    UINT64_C(3776737280),	// BUFFER_ATOMIC_UMAX_BOTHEN_RTN_vi
    UINT64_C(3772788736),	// BUFFER_ATOMIC_UMAX_BOTHEN_si
    UINT64_C(3776720896),	// BUFFER_ATOMIC_UMAX_BOTHEN_vi
    UINT64_C(3772801024),	// BUFFER_ATOMIC_UMAX_IDXEN_RTN_si
    UINT64_C(3776733184),	// BUFFER_ATOMIC_UMAX_IDXEN_RTN_vi
    UINT64_C(3772784640),	// BUFFER_ATOMIC_UMAX_IDXEN_si
    UINT64_C(3776716800),	// BUFFER_ATOMIC_UMAX_IDXEN_vi
    UINT64_C(3772796928),	// BUFFER_ATOMIC_UMAX_OFFEN_RTN_si
    UINT64_C(3776729088),	// BUFFER_ATOMIC_UMAX_OFFEN_RTN_vi
    UINT64_C(3772780544),	// BUFFER_ATOMIC_UMAX_OFFEN_si
    UINT64_C(3776712704),	// BUFFER_ATOMIC_UMAX_OFFEN_vi
    UINT64_C(3772792832),	// BUFFER_ATOMIC_UMAX_OFFSET_RTN_si
    UINT64_C(3776724992),	// BUFFER_ATOMIC_UMAX_OFFSET_RTN_vi
    UINT64_C(3772776448),	// BUFFER_ATOMIC_UMAX_OFFSET_si
    UINT64_C(3776708608),	// BUFFER_ATOMIC_UMAX_OFFSET_vi
    UINT64_C(3781214208),	// BUFFER_ATOMIC_UMAX_X2_ADDR64_RTN_si
    UINT64_C(3781197824),	// BUFFER_ATOMIC_UMAX_X2_ADDR64_si
    UINT64_C(3781193728),	// BUFFER_ATOMIC_UMAX_X2_BOTHEN_RTN_si
    UINT64_C(3785125888),	// BUFFER_ATOMIC_UMAX_X2_BOTHEN_RTN_vi
    UINT64_C(3781177344),	// BUFFER_ATOMIC_UMAX_X2_BOTHEN_si
    UINT64_C(3785109504),	// BUFFER_ATOMIC_UMAX_X2_BOTHEN_vi
    UINT64_C(3781189632),	// BUFFER_ATOMIC_UMAX_X2_IDXEN_RTN_si
    UINT64_C(3785121792),	// BUFFER_ATOMIC_UMAX_X2_IDXEN_RTN_vi
    UINT64_C(3781173248),	// BUFFER_ATOMIC_UMAX_X2_IDXEN_si
    UINT64_C(3785105408),	// BUFFER_ATOMIC_UMAX_X2_IDXEN_vi
    UINT64_C(3781185536),	// BUFFER_ATOMIC_UMAX_X2_OFFEN_RTN_si
    UINT64_C(3785117696),	// BUFFER_ATOMIC_UMAX_X2_OFFEN_RTN_vi
    UINT64_C(3781169152),	// BUFFER_ATOMIC_UMAX_X2_OFFEN_si
    UINT64_C(3785101312),	// BUFFER_ATOMIC_UMAX_X2_OFFEN_vi
    UINT64_C(3781181440),	// BUFFER_ATOMIC_UMAX_X2_OFFSET_RTN_si
    UINT64_C(3785113600),	// BUFFER_ATOMIC_UMAX_X2_OFFSET_RTN_vi
    UINT64_C(3781165056),	// BUFFER_ATOMIC_UMAX_X2_OFFSET_si
    UINT64_C(3785097216),	// BUFFER_ATOMIC_UMAX_X2_OFFSET_vi
    UINT64_C(3772301312),	// BUFFER_ATOMIC_UMIN_ADDR64_RTN_si
    UINT64_C(3772284928),	// BUFFER_ATOMIC_UMIN_ADDR64_si
    UINT64_C(3772280832),	// BUFFER_ATOMIC_UMIN_BOTHEN_RTN_si
    UINT64_C(3776212992),	// BUFFER_ATOMIC_UMIN_BOTHEN_RTN_vi
    UINT64_C(3772264448),	// BUFFER_ATOMIC_UMIN_BOTHEN_si
    UINT64_C(3776196608),	// BUFFER_ATOMIC_UMIN_BOTHEN_vi
    UINT64_C(3772276736),	// BUFFER_ATOMIC_UMIN_IDXEN_RTN_si
    UINT64_C(3776208896),	// BUFFER_ATOMIC_UMIN_IDXEN_RTN_vi
    UINT64_C(3772260352),	// BUFFER_ATOMIC_UMIN_IDXEN_si
    UINT64_C(3776192512),	// BUFFER_ATOMIC_UMIN_IDXEN_vi
    UINT64_C(3772272640),	// BUFFER_ATOMIC_UMIN_OFFEN_RTN_si
    UINT64_C(3776204800),	// BUFFER_ATOMIC_UMIN_OFFEN_RTN_vi
    UINT64_C(3772256256),	// BUFFER_ATOMIC_UMIN_OFFEN_si
    UINT64_C(3776188416),	// BUFFER_ATOMIC_UMIN_OFFEN_vi
    UINT64_C(3772268544),	// BUFFER_ATOMIC_UMIN_OFFSET_RTN_si
    UINT64_C(3776200704),	// BUFFER_ATOMIC_UMIN_OFFSET_RTN_vi
    UINT64_C(3772252160),	// BUFFER_ATOMIC_UMIN_OFFSET_si
    UINT64_C(3776184320),	// BUFFER_ATOMIC_UMIN_OFFSET_vi
    UINT64_C(3780689920),	// BUFFER_ATOMIC_UMIN_X2_ADDR64_RTN_si
    UINT64_C(3780673536),	// BUFFER_ATOMIC_UMIN_X2_ADDR64_si
    UINT64_C(3780669440),	// BUFFER_ATOMIC_UMIN_X2_BOTHEN_RTN_si
    UINT64_C(3784601600),	// BUFFER_ATOMIC_UMIN_X2_BOTHEN_RTN_vi
    UINT64_C(3780653056),	// BUFFER_ATOMIC_UMIN_X2_BOTHEN_si
    UINT64_C(3784585216),	// BUFFER_ATOMIC_UMIN_X2_BOTHEN_vi
    UINT64_C(3780665344),	// BUFFER_ATOMIC_UMIN_X2_IDXEN_RTN_si
    UINT64_C(3784597504),	// BUFFER_ATOMIC_UMIN_X2_IDXEN_RTN_vi
    UINT64_C(3780648960),	// BUFFER_ATOMIC_UMIN_X2_IDXEN_si
    UINT64_C(3784581120),	// BUFFER_ATOMIC_UMIN_X2_IDXEN_vi
    UINT64_C(3780661248),	// BUFFER_ATOMIC_UMIN_X2_OFFEN_RTN_si
    UINT64_C(3784593408),	// BUFFER_ATOMIC_UMIN_X2_OFFEN_RTN_vi
    UINT64_C(3780644864),	// BUFFER_ATOMIC_UMIN_X2_OFFEN_si
    UINT64_C(3784577024),	// BUFFER_ATOMIC_UMIN_X2_OFFEN_vi
    UINT64_C(3780657152),	// BUFFER_ATOMIC_UMIN_X2_OFFSET_RTN_si
    UINT64_C(3784589312),	// BUFFER_ATOMIC_UMIN_X2_OFFSET_RTN_vi
    UINT64_C(3780640768),	// BUFFER_ATOMIC_UMIN_X2_OFFSET_si
    UINT64_C(3784572928),	// BUFFER_ATOMIC_UMIN_X2_OFFSET_vi
    UINT64_C(3773612032),	// BUFFER_ATOMIC_XOR_ADDR64_RTN_si
    UINT64_C(3773595648),	// BUFFER_ATOMIC_XOR_ADDR64_si
    UINT64_C(3773591552),	// BUFFER_ATOMIC_XOR_BOTHEN_RTN_si
    UINT64_C(3777523712),	// BUFFER_ATOMIC_XOR_BOTHEN_RTN_vi
    UINT64_C(3773575168),	// BUFFER_ATOMIC_XOR_BOTHEN_si
    UINT64_C(3777507328),	// BUFFER_ATOMIC_XOR_BOTHEN_vi
    UINT64_C(3773587456),	// BUFFER_ATOMIC_XOR_IDXEN_RTN_si
    UINT64_C(3777519616),	// BUFFER_ATOMIC_XOR_IDXEN_RTN_vi
    UINT64_C(3773571072),	// BUFFER_ATOMIC_XOR_IDXEN_si
    UINT64_C(3777503232),	// BUFFER_ATOMIC_XOR_IDXEN_vi
    UINT64_C(3773583360),	// BUFFER_ATOMIC_XOR_OFFEN_RTN_si
    UINT64_C(3777515520),	// BUFFER_ATOMIC_XOR_OFFEN_RTN_vi
    UINT64_C(3773566976),	// BUFFER_ATOMIC_XOR_OFFEN_si
    UINT64_C(3777499136),	// BUFFER_ATOMIC_XOR_OFFEN_vi
    UINT64_C(3773579264),	// BUFFER_ATOMIC_XOR_OFFSET_RTN_si
    UINT64_C(3777511424),	// BUFFER_ATOMIC_XOR_OFFSET_RTN_vi
    UINT64_C(3773562880),	// BUFFER_ATOMIC_XOR_OFFSET_si
    UINT64_C(3777495040),	// BUFFER_ATOMIC_XOR_OFFSET_vi
    UINT64_C(3782000640),	// BUFFER_ATOMIC_XOR_X2_ADDR64_RTN_si
    UINT64_C(3781984256),	// BUFFER_ATOMIC_XOR_X2_ADDR64_si
    UINT64_C(3781980160),	// BUFFER_ATOMIC_XOR_X2_BOTHEN_RTN_si
    UINT64_C(3785912320),	// BUFFER_ATOMIC_XOR_X2_BOTHEN_RTN_vi
    UINT64_C(3781963776),	// BUFFER_ATOMIC_XOR_X2_BOTHEN_si
    UINT64_C(3785895936),	// BUFFER_ATOMIC_XOR_X2_BOTHEN_vi
    UINT64_C(3781976064),	// BUFFER_ATOMIC_XOR_X2_IDXEN_RTN_si
    UINT64_C(3785908224),	// BUFFER_ATOMIC_XOR_X2_IDXEN_RTN_vi
    UINT64_C(3781959680),	// BUFFER_ATOMIC_XOR_X2_IDXEN_si
    UINT64_C(3785891840),	// BUFFER_ATOMIC_XOR_X2_IDXEN_vi
    UINT64_C(3781971968),	// BUFFER_ATOMIC_XOR_X2_OFFEN_RTN_si
    UINT64_C(3785904128),	// BUFFER_ATOMIC_XOR_X2_OFFEN_RTN_vi
    UINT64_C(3781955584),	// BUFFER_ATOMIC_XOR_X2_OFFEN_si
    UINT64_C(3785887744),	// BUFFER_ATOMIC_XOR_X2_OFFEN_vi
    UINT64_C(3781967872),	// BUFFER_ATOMIC_XOR_X2_OFFSET_RTN_si
    UINT64_C(3785900032),	// BUFFER_ATOMIC_XOR_X2_OFFSET_RTN_vi
    UINT64_C(3781951488),	// BUFFER_ATOMIC_XOR_X2_OFFSET_si
    UINT64_C(3785883648),	// BUFFER_ATOMIC_XOR_X2_OFFSET_vi
    UINT64_C(3761537024),	// BUFFER_LOAD_DWORDX2_ADDR64_si
    UINT64_C(3761516544),	// BUFFER_LOAD_DWORDX2_BOTHEN_si
    UINT64_C(3763613696),	// BUFFER_LOAD_DWORDX2_BOTHEN_vi
    UINT64_C(3761512448),	// BUFFER_LOAD_DWORDX2_IDXEN_si
    UINT64_C(3763609600),	// BUFFER_LOAD_DWORDX2_IDXEN_vi
    UINT64_C(3763679232),	// BUFFER_LOAD_DWORDX2_LDS_BOTHEN_vi
    UINT64_C(3763675136),	// BUFFER_LOAD_DWORDX2_LDS_IDXEN_vi
    UINT64_C(3763671040),	// BUFFER_LOAD_DWORDX2_LDS_OFFEN_vi
    UINT64_C(3763666944),	// BUFFER_LOAD_DWORDX2_LDS_OFFSET_vi
    UINT64_C(3761508352),	// BUFFER_LOAD_DWORDX2_OFFEN_si
    UINT64_C(3763605504),	// BUFFER_LOAD_DWORDX2_OFFEN_vi
    UINT64_C(3761504256),	// BUFFER_LOAD_DWORDX2_OFFSET_si
    UINT64_C(3763601408),	// BUFFER_LOAD_DWORDX2_OFFSET_vi
    UINT64_C(3762061312),	// BUFFER_LOAD_DWORDX3_ADDR64_si
    UINT64_C(3762040832),	// BUFFER_LOAD_DWORDX3_BOTHEN_si
    UINT64_C(3763875840),	// BUFFER_LOAD_DWORDX3_BOTHEN_vi
    UINT64_C(3762036736),	// BUFFER_LOAD_DWORDX3_IDXEN_si
    UINT64_C(3763871744),	// BUFFER_LOAD_DWORDX3_IDXEN_vi
    UINT64_C(3763941376),	// BUFFER_LOAD_DWORDX3_LDS_BOTHEN_vi
    UINT64_C(3763937280),	// BUFFER_LOAD_DWORDX3_LDS_IDXEN_vi
    UINT64_C(3763933184),	// BUFFER_LOAD_DWORDX3_LDS_OFFEN_vi
    UINT64_C(3763929088),	// BUFFER_LOAD_DWORDX3_LDS_OFFSET_vi
    UINT64_C(3762032640),	// BUFFER_LOAD_DWORDX3_OFFEN_si
    UINT64_C(3763867648),	// BUFFER_LOAD_DWORDX3_OFFEN_vi
    UINT64_C(3762028544),	// BUFFER_LOAD_DWORDX3_OFFSET_si
    UINT64_C(3763863552),	// BUFFER_LOAD_DWORDX3_OFFSET_vi
    UINT64_C(3761799168),	// BUFFER_LOAD_DWORDX4_ADDR64_si
    UINT64_C(3761778688),	// BUFFER_LOAD_DWORDX4_BOTHEN_si
    UINT64_C(3764137984),	// BUFFER_LOAD_DWORDX4_BOTHEN_vi
    UINT64_C(3761774592),	// BUFFER_LOAD_DWORDX4_IDXEN_si
    UINT64_C(3764133888),	// BUFFER_LOAD_DWORDX4_IDXEN_vi
    UINT64_C(3764203520),	// BUFFER_LOAD_DWORDX4_LDS_BOTHEN_vi
    UINT64_C(3764199424),	// BUFFER_LOAD_DWORDX4_LDS_IDXEN_vi
    UINT64_C(3764195328),	// BUFFER_LOAD_DWORDX4_LDS_OFFEN_vi
    UINT64_C(3764191232),	// BUFFER_LOAD_DWORDX4_LDS_OFFSET_vi
    UINT64_C(3761770496),	// BUFFER_LOAD_DWORDX4_OFFEN_si
    UINT64_C(3764129792),	// BUFFER_LOAD_DWORDX4_OFFEN_vi
    UINT64_C(3761766400),	// BUFFER_LOAD_DWORDX4_OFFSET_si
    UINT64_C(3764125696),	// BUFFER_LOAD_DWORDX4_OFFSET_vi
    UINT64_C(3761274880),	// BUFFER_LOAD_DWORD_ADDR64_si
    UINT64_C(3761254400),	// BUFFER_LOAD_DWORD_BOTHEN_si
    UINT64_C(3763351552),	// BUFFER_LOAD_DWORD_BOTHEN_vi
    UINT64_C(3761250304),	// BUFFER_LOAD_DWORD_IDXEN_si
    UINT64_C(3763347456),	// BUFFER_LOAD_DWORD_IDXEN_vi
    UINT64_C(3761340416),	// BUFFER_LOAD_DWORD_LDS_ADDR64_si
    UINT64_C(3761319936),	// BUFFER_LOAD_DWORD_LDS_BOTHEN_si
    UINT64_C(3763417088),	// BUFFER_LOAD_DWORD_LDS_BOTHEN_vi
    UINT64_C(3761315840),	// BUFFER_LOAD_DWORD_LDS_IDXEN_si
    UINT64_C(3763412992),	// BUFFER_LOAD_DWORD_LDS_IDXEN_vi
    UINT64_C(3761311744),	// BUFFER_LOAD_DWORD_LDS_OFFEN_si
    UINT64_C(3763408896),	// BUFFER_LOAD_DWORD_LDS_OFFEN_vi
    UINT64_C(3761307648),	// BUFFER_LOAD_DWORD_LDS_OFFSET_si
    UINT64_C(3763404800),	// BUFFER_LOAD_DWORD_LDS_OFFSET_vi
    UINT64_C(3761246208),	// BUFFER_LOAD_DWORD_OFFEN_si
    UINT64_C(3763343360),	// BUFFER_LOAD_DWORD_OFFEN_vi
    UINT64_C(3761242112),	// BUFFER_LOAD_DWORD_OFFSET_si
    UINT64_C(3763339264),	// BUFFER_LOAD_DWORD_OFFSET_vi
    UINT64_C(3768070144),	// BUFFER_LOAD_FORMAT_D16_HI_X_BOTHEN_vi
    UINT64_C(3768066048),	// BUFFER_LOAD_FORMAT_D16_HI_X_IDXEN_vi
    UINT64_C(3768061952),	// BUFFER_LOAD_FORMAT_D16_HI_X_OFFEN_vi
    UINT64_C(3768057856),	// BUFFER_LOAD_FORMAT_D16_HI_X_OFFSET_vi
    UINT64_C(3760992256),	// BUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN_vi
    UINT64_C(3760988160),	// BUFFER_LOAD_FORMAT_D16_XYZW_IDXEN_vi
    UINT64_C(3760984064),	// BUFFER_LOAD_FORMAT_D16_XYZW_OFFEN_vi
    UINT64_C(3760979968),	// BUFFER_LOAD_FORMAT_D16_XYZW_OFFSET_vi
    UINT64_C(3760992256),	// BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80
    UINT64_C(3760988160),	// BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_IDXEN_gfx80
    UINT64_C(3760984064),	// BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFEN_gfx80
    UINT64_C(3760979968),	// BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80
    UINT64_C(3760730112),	// BUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN_vi
    UINT64_C(3760726016),	// BUFFER_LOAD_FORMAT_D16_XYZ_IDXEN_vi
    UINT64_C(3760721920),	// BUFFER_LOAD_FORMAT_D16_XYZ_OFFEN_vi
    UINT64_C(3760717824),	// BUFFER_LOAD_FORMAT_D16_XYZ_OFFSET_vi
    UINT64_C(3760730112),	// BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_BOTHEN_gfx80
    UINT64_C(3760726016),	// BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_IDXEN_gfx80
    UINT64_C(3760721920),	// BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFEN_gfx80
    UINT64_C(3760717824),	// BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFSET_gfx80
    UINT64_C(3760467968),	// BUFFER_LOAD_FORMAT_D16_XY_BOTHEN_vi
    UINT64_C(3760463872),	// BUFFER_LOAD_FORMAT_D16_XY_IDXEN_vi
    UINT64_C(3760459776),	// BUFFER_LOAD_FORMAT_D16_XY_OFFEN_vi
    UINT64_C(3760455680),	// BUFFER_LOAD_FORMAT_D16_XY_OFFSET_vi
    UINT64_C(3760467968),	// BUFFER_LOAD_FORMAT_D16_XY_gfx80_BOTHEN_gfx80
    UINT64_C(3760463872),	// BUFFER_LOAD_FORMAT_D16_XY_gfx80_IDXEN_gfx80
    UINT64_C(3760459776),	// BUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFEN_gfx80
    UINT64_C(3760455680),	// BUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFSET_gfx80
    UINT64_C(3760205824),	// BUFFER_LOAD_FORMAT_D16_X_BOTHEN_vi
    UINT64_C(3760201728),	// BUFFER_LOAD_FORMAT_D16_X_IDXEN_vi
    UINT64_C(3760197632),	// BUFFER_LOAD_FORMAT_D16_X_OFFEN_vi
    UINT64_C(3760193536),	// BUFFER_LOAD_FORMAT_D16_X_OFFSET_vi
    UINT64_C(3760205824),	// BUFFER_LOAD_FORMAT_D16_X_gfx80_BOTHEN_gfx80
    UINT64_C(3760201728),	// BUFFER_LOAD_FORMAT_D16_X_gfx80_IDXEN_gfx80
    UINT64_C(3760197632),	// BUFFER_LOAD_FORMAT_D16_X_gfx80_OFFEN_gfx80
    UINT64_C(3760193536),	// BUFFER_LOAD_FORMAT_D16_X_gfx80_OFFSET_gfx80
    UINT64_C(3758915584),	// BUFFER_LOAD_FORMAT_XYZW_ADDR64_si
    UINT64_C(3758895104),	// BUFFER_LOAD_FORMAT_XYZW_BOTHEN_si
    UINT64_C(3758895104),	// BUFFER_LOAD_FORMAT_XYZW_BOTHEN_vi
    UINT64_C(3758891008),	// BUFFER_LOAD_FORMAT_XYZW_IDXEN_si
    UINT64_C(3758891008),	// BUFFER_LOAD_FORMAT_XYZW_IDXEN_vi
    UINT64_C(3758886912),	// BUFFER_LOAD_FORMAT_XYZW_OFFEN_si
    UINT64_C(3758886912),	// BUFFER_LOAD_FORMAT_XYZW_OFFEN_vi
    UINT64_C(3758882816),	// BUFFER_LOAD_FORMAT_XYZW_OFFSET_si
    UINT64_C(3758882816),	// BUFFER_LOAD_FORMAT_XYZW_OFFSET_vi
    UINT64_C(3758653440),	// BUFFER_LOAD_FORMAT_XYZ_ADDR64_si
    UINT64_C(3758632960),	// BUFFER_LOAD_FORMAT_XYZ_BOTHEN_si
    UINT64_C(3758632960),	// BUFFER_LOAD_FORMAT_XYZ_BOTHEN_vi
    UINT64_C(3758628864),	// BUFFER_LOAD_FORMAT_XYZ_IDXEN_si
    UINT64_C(3758628864),	// BUFFER_LOAD_FORMAT_XYZ_IDXEN_vi
    UINT64_C(3758624768),	// BUFFER_LOAD_FORMAT_XYZ_OFFEN_si
    UINT64_C(3758624768),	// BUFFER_LOAD_FORMAT_XYZ_OFFEN_vi
    UINT64_C(3758620672),	// BUFFER_LOAD_FORMAT_XYZ_OFFSET_si
    UINT64_C(3758620672),	// BUFFER_LOAD_FORMAT_XYZ_OFFSET_vi
    UINT64_C(3758391296),	// BUFFER_LOAD_FORMAT_XY_ADDR64_si
    UINT64_C(3758370816),	// BUFFER_LOAD_FORMAT_XY_BOTHEN_si
    UINT64_C(3758370816),	// BUFFER_LOAD_FORMAT_XY_BOTHEN_vi
    UINT64_C(3758366720),	// BUFFER_LOAD_FORMAT_XY_IDXEN_si
    UINT64_C(3758366720),	// BUFFER_LOAD_FORMAT_XY_IDXEN_vi
    UINT64_C(3758362624),	// BUFFER_LOAD_FORMAT_XY_OFFEN_si
    UINT64_C(3758362624),	// BUFFER_LOAD_FORMAT_XY_OFFEN_vi
    UINT64_C(3758358528),	// BUFFER_LOAD_FORMAT_XY_OFFSET_si
    UINT64_C(3758358528),	// BUFFER_LOAD_FORMAT_XY_OFFSET_vi
    UINT64_C(3758129152),	// BUFFER_LOAD_FORMAT_X_ADDR64_si
    UINT64_C(3758108672),	// BUFFER_LOAD_FORMAT_X_BOTHEN_si
    UINT64_C(3758108672),	// BUFFER_LOAD_FORMAT_X_BOTHEN_vi
    UINT64_C(3758104576),	// BUFFER_LOAD_FORMAT_X_IDXEN_si
    UINT64_C(3758104576),	// BUFFER_LOAD_FORMAT_X_IDXEN_vi
    UINT64_C(3758194688),	// BUFFER_LOAD_FORMAT_X_LDS_ADDR64_si
    UINT64_C(3758174208),	// BUFFER_LOAD_FORMAT_X_LDS_BOTHEN_si
    UINT64_C(3758174208),	// BUFFER_LOAD_FORMAT_X_LDS_BOTHEN_vi
    UINT64_C(3758170112),	// BUFFER_LOAD_FORMAT_X_LDS_IDXEN_si
    UINT64_C(3758170112),	// BUFFER_LOAD_FORMAT_X_LDS_IDXEN_vi
    UINT64_C(3758166016),	// BUFFER_LOAD_FORMAT_X_LDS_OFFEN_si
    UINT64_C(3758166016),	// BUFFER_LOAD_FORMAT_X_LDS_OFFEN_vi
    UINT64_C(3758161920),	// BUFFER_LOAD_FORMAT_X_LDS_OFFSET_si
    UINT64_C(3758161920),	// BUFFER_LOAD_FORMAT_X_LDS_OFFSET_vi
    UINT64_C(3758100480),	// BUFFER_LOAD_FORMAT_X_OFFEN_si
    UINT64_C(3758100480),	// BUFFER_LOAD_FORMAT_X_OFFEN_vi
    UINT64_C(3758096384),	// BUFFER_LOAD_FORMAT_X_OFFSET_si
    UINT64_C(3758096384),	// BUFFER_LOAD_FORMAT_X_OFFSET_vi
    UINT64_C(3760488448),	// BUFFER_LOAD_SBYTE_ADDR64_si
    UINT64_C(3760467968),	// BUFFER_LOAD_SBYTE_BOTHEN_si
    UINT64_C(3762565120),	// BUFFER_LOAD_SBYTE_BOTHEN_vi
    UINT64_C(3767021568),	// BUFFER_LOAD_SBYTE_D16_BOTHEN_vi
    UINT64_C(3767283712),	// BUFFER_LOAD_SBYTE_D16_HI_BOTHEN_vi
    UINT64_C(3767279616),	// BUFFER_LOAD_SBYTE_D16_HI_IDXEN_vi
    UINT64_C(3767275520),	// BUFFER_LOAD_SBYTE_D16_HI_OFFEN_vi
    UINT64_C(3767271424),	// BUFFER_LOAD_SBYTE_D16_HI_OFFSET_vi
    UINT64_C(3767017472),	// BUFFER_LOAD_SBYTE_D16_IDXEN_vi
    UINT64_C(3767013376),	// BUFFER_LOAD_SBYTE_D16_OFFEN_vi
    UINT64_C(3767009280),	// BUFFER_LOAD_SBYTE_D16_OFFSET_vi
    UINT64_C(3760463872),	// BUFFER_LOAD_SBYTE_IDXEN_si
    UINT64_C(3762561024),	// BUFFER_LOAD_SBYTE_IDXEN_vi
    UINT64_C(3760553984),	// BUFFER_LOAD_SBYTE_LDS_ADDR64_si
    UINT64_C(3760533504),	// BUFFER_LOAD_SBYTE_LDS_BOTHEN_si
    UINT64_C(3762630656),	// BUFFER_LOAD_SBYTE_LDS_BOTHEN_vi
    UINT64_C(3760529408),	// BUFFER_LOAD_SBYTE_LDS_IDXEN_si
    UINT64_C(3762626560),	// BUFFER_LOAD_SBYTE_LDS_IDXEN_vi
    UINT64_C(3760525312),	// BUFFER_LOAD_SBYTE_LDS_OFFEN_si
    UINT64_C(3762622464),	// BUFFER_LOAD_SBYTE_LDS_OFFEN_vi
    UINT64_C(3760521216),	// BUFFER_LOAD_SBYTE_LDS_OFFSET_si
    UINT64_C(3762618368),	// BUFFER_LOAD_SBYTE_LDS_OFFSET_vi
    UINT64_C(3760459776),	// BUFFER_LOAD_SBYTE_OFFEN_si
    UINT64_C(3762556928),	// BUFFER_LOAD_SBYTE_OFFEN_vi
    UINT64_C(3760455680),	// BUFFER_LOAD_SBYTE_OFFSET_si
    UINT64_C(3762552832),	// BUFFER_LOAD_SBYTE_OFFSET_vi
    UINT64_C(3767545856),	// BUFFER_LOAD_SHORT_D16_BOTHEN_vi
    UINT64_C(3767808000),	// BUFFER_LOAD_SHORT_D16_HI_BOTHEN_vi
    UINT64_C(3767803904),	// BUFFER_LOAD_SHORT_D16_HI_IDXEN_vi
    UINT64_C(3767799808),	// BUFFER_LOAD_SHORT_D16_HI_OFFEN_vi
    UINT64_C(3767795712),	// BUFFER_LOAD_SHORT_D16_HI_OFFSET_vi
    UINT64_C(3767541760),	// BUFFER_LOAD_SHORT_D16_IDXEN_vi
    UINT64_C(3767537664),	// BUFFER_LOAD_SHORT_D16_OFFEN_vi
    UINT64_C(3767533568),	// BUFFER_LOAD_SHORT_D16_OFFSET_vi
    UINT64_C(3761012736),	// BUFFER_LOAD_SSHORT_ADDR64_si
    UINT64_C(3760992256),	// BUFFER_LOAD_SSHORT_BOTHEN_si
    UINT64_C(3763089408),	// BUFFER_LOAD_SSHORT_BOTHEN_vi
    UINT64_C(3760988160),	// BUFFER_LOAD_SSHORT_IDXEN_si
    UINT64_C(3763085312),	// BUFFER_LOAD_SSHORT_IDXEN_vi
    UINT64_C(3761078272),	// BUFFER_LOAD_SSHORT_LDS_ADDR64_si
    UINT64_C(3761057792),	// BUFFER_LOAD_SSHORT_LDS_BOTHEN_si
    UINT64_C(3763154944),	// BUFFER_LOAD_SSHORT_LDS_BOTHEN_vi
    UINT64_C(3761053696),	// BUFFER_LOAD_SSHORT_LDS_IDXEN_si
    UINT64_C(3763150848),	// BUFFER_LOAD_SSHORT_LDS_IDXEN_vi
    UINT64_C(3761049600),	// BUFFER_LOAD_SSHORT_LDS_OFFEN_si
    UINT64_C(3763146752),	// BUFFER_LOAD_SSHORT_LDS_OFFEN_vi
    UINT64_C(3761045504),	// BUFFER_LOAD_SSHORT_LDS_OFFSET_si
    UINT64_C(3763142656),	// BUFFER_LOAD_SSHORT_LDS_OFFSET_vi
    UINT64_C(3760984064),	// BUFFER_LOAD_SSHORT_OFFEN_si
    UINT64_C(3763081216),	// BUFFER_LOAD_SSHORT_OFFEN_vi
    UINT64_C(3760979968),	// BUFFER_LOAD_SSHORT_OFFSET_si
    UINT64_C(3763077120),	// BUFFER_LOAD_SSHORT_OFFSET_vi
    UINT64_C(3760226304),	// BUFFER_LOAD_UBYTE_ADDR64_si
    UINT64_C(3760205824),	// BUFFER_LOAD_UBYTE_BOTHEN_si
    UINT64_C(3762302976),	// BUFFER_LOAD_UBYTE_BOTHEN_vi
    UINT64_C(3766497280),	// BUFFER_LOAD_UBYTE_D16_BOTHEN_vi
    UINT64_C(3766759424),	// BUFFER_LOAD_UBYTE_D16_HI_BOTHEN_vi
    UINT64_C(3766755328),	// BUFFER_LOAD_UBYTE_D16_HI_IDXEN_vi
    UINT64_C(3766751232),	// BUFFER_LOAD_UBYTE_D16_HI_OFFEN_vi
    UINT64_C(3766747136),	// BUFFER_LOAD_UBYTE_D16_HI_OFFSET_vi
    UINT64_C(3766493184),	// BUFFER_LOAD_UBYTE_D16_IDXEN_vi
    UINT64_C(3766489088),	// BUFFER_LOAD_UBYTE_D16_OFFEN_vi
    UINT64_C(3766484992),	// BUFFER_LOAD_UBYTE_D16_OFFSET_vi
    UINT64_C(3760201728),	// BUFFER_LOAD_UBYTE_IDXEN_si
    UINT64_C(3762298880),	// BUFFER_LOAD_UBYTE_IDXEN_vi
    UINT64_C(3760291840),	// BUFFER_LOAD_UBYTE_LDS_ADDR64_si
    UINT64_C(3760271360),	// BUFFER_LOAD_UBYTE_LDS_BOTHEN_si
    UINT64_C(3762368512),	// BUFFER_LOAD_UBYTE_LDS_BOTHEN_vi
    UINT64_C(3760267264),	// BUFFER_LOAD_UBYTE_LDS_IDXEN_si
    UINT64_C(3762364416),	// BUFFER_LOAD_UBYTE_LDS_IDXEN_vi
    UINT64_C(3760263168),	// BUFFER_LOAD_UBYTE_LDS_OFFEN_si
    UINT64_C(3762360320),	// BUFFER_LOAD_UBYTE_LDS_OFFEN_vi
    UINT64_C(3760259072),	// BUFFER_LOAD_UBYTE_LDS_OFFSET_si
    UINT64_C(3762356224),	// BUFFER_LOAD_UBYTE_LDS_OFFSET_vi
    UINT64_C(3760197632),	// BUFFER_LOAD_UBYTE_OFFEN_si
    UINT64_C(3762294784),	// BUFFER_LOAD_UBYTE_OFFEN_vi
    UINT64_C(3760193536),	// BUFFER_LOAD_UBYTE_OFFSET_si
    UINT64_C(3762290688),	// BUFFER_LOAD_UBYTE_OFFSET_vi
    UINT64_C(3760750592),	// BUFFER_LOAD_USHORT_ADDR64_si
    UINT64_C(3760730112),	// BUFFER_LOAD_USHORT_BOTHEN_si
    UINT64_C(3762827264),	// BUFFER_LOAD_USHORT_BOTHEN_vi
    UINT64_C(3760726016),	// BUFFER_LOAD_USHORT_IDXEN_si
    UINT64_C(3762823168),	// BUFFER_LOAD_USHORT_IDXEN_vi
    UINT64_C(3760816128),	// BUFFER_LOAD_USHORT_LDS_ADDR64_si
    UINT64_C(3760795648),	// BUFFER_LOAD_USHORT_LDS_BOTHEN_si
    UINT64_C(3762892800),	// BUFFER_LOAD_USHORT_LDS_BOTHEN_vi
    UINT64_C(3760791552),	// BUFFER_LOAD_USHORT_LDS_IDXEN_si
    UINT64_C(3762888704),	// BUFFER_LOAD_USHORT_LDS_IDXEN_vi
    UINT64_C(3760787456),	// BUFFER_LOAD_USHORT_LDS_OFFEN_si
    UINT64_C(3762884608),	// BUFFER_LOAD_USHORT_LDS_OFFEN_vi
    UINT64_C(3760783360),	// BUFFER_LOAD_USHORT_LDS_OFFSET_si
    UINT64_C(3762880512),	// BUFFER_LOAD_USHORT_LDS_OFFSET_vi
    UINT64_C(3760721920),	// BUFFER_LOAD_USHORT_OFFEN_si
    UINT64_C(3762819072),	// BUFFER_LOAD_USHORT_OFFEN_vi
    UINT64_C(3760717824),	// BUFFER_LOAD_USHORT_OFFSET_si
    UINT64_C(3762814976),	// BUFFER_LOAD_USHORT_OFFSET_vi
    UINT64_C(3764420608),	// BUFFER_STORE_BYTE_ADDR64_si
    UINT64_C(3764400128),	// BUFFER_STORE_BYTE_BOTHEN_si
    UINT64_C(3764400128),	// BUFFER_STORE_BYTE_BOTHEN_vi
    UINT64_C(3764662272),	// BUFFER_STORE_BYTE_D16_HI_BOTHEN_vi
    UINT64_C(3764658176),	// BUFFER_STORE_BYTE_D16_HI_IDXEN_vi
    UINT64_C(3764654080),	// BUFFER_STORE_BYTE_D16_HI_OFFEN_vi
    UINT64_C(3764649984),	// BUFFER_STORE_BYTE_D16_HI_OFFSET_vi
    UINT64_C(3764396032),	// BUFFER_STORE_BYTE_IDXEN_si
    UINT64_C(3764396032),	// BUFFER_STORE_BYTE_IDXEN_vi
    UINT64_C(3764391936),	// BUFFER_STORE_BYTE_OFFEN_si
    UINT64_C(3764391936),	// BUFFER_STORE_BYTE_OFFEN_vi
    UINT64_C(3764387840),	// BUFFER_STORE_BYTE_OFFSET_si
    UINT64_C(3764387840),	// BUFFER_STORE_BYTE_OFFSET_vi
    UINT64_C(3765731328),	// BUFFER_STORE_DWORDX2_ADDR64_si
    UINT64_C(3765710848),	// BUFFER_STORE_DWORDX2_BOTHEN_si
    UINT64_C(3765710848),	// BUFFER_STORE_DWORDX2_BOTHEN_vi
    UINT64_C(3765706752),	// BUFFER_STORE_DWORDX2_IDXEN_si
    UINT64_C(3765706752),	// BUFFER_STORE_DWORDX2_IDXEN_vi
    UINT64_C(3765702656),	// BUFFER_STORE_DWORDX2_OFFEN_si
    UINT64_C(3765702656),	// BUFFER_STORE_DWORDX2_OFFEN_vi
    UINT64_C(3765698560),	// BUFFER_STORE_DWORDX2_OFFSET_si
    UINT64_C(3765698560),	// BUFFER_STORE_DWORDX2_OFFSET_vi
    UINT64_C(3766255616),	// BUFFER_STORE_DWORDX3_ADDR64_si
    UINT64_C(3766235136),	// BUFFER_STORE_DWORDX3_BOTHEN_si
    UINT64_C(3765972992),	// BUFFER_STORE_DWORDX3_BOTHEN_vi
    UINT64_C(3766231040),	// BUFFER_STORE_DWORDX3_IDXEN_si
    UINT64_C(3765968896),	// BUFFER_STORE_DWORDX3_IDXEN_vi
    UINT64_C(3766226944),	// BUFFER_STORE_DWORDX3_OFFEN_si
    UINT64_C(3765964800),	// BUFFER_STORE_DWORDX3_OFFEN_vi
    UINT64_C(3766222848),	// BUFFER_STORE_DWORDX3_OFFSET_si
    UINT64_C(3765960704),	// BUFFER_STORE_DWORDX3_OFFSET_vi
    UINT64_C(3765993472),	// BUFFER_STORE_DWORDX4_ADDR64_si
    UINT64_C(3765972992),	// BUFFER_STORE_DWORDX4_BOTHEN_si
    UINT64_C(3766235136),	// BUFFER_STORE_DWORDX4_BOTHEN_vi
    UINT64_C(3765968896),	// BUFFER_STORE_DWORDX4_IDXEN_si
    UINT64_C(3766231040),	// BUFFER_STORE_DWORDX4_IDXEN_vi
    UINT64_C(3765964800),	// BUFFER_STORE_DWORDX4_OFFEN_si
    UINT64_C(3766226944),	// BUFFER_STORE_DWORDX4_OFFEN_vi
    UINT64_C(3765960704),	// BUFFER_STORE_DWORDX4_OFFSET_si
    UINT64_C(3766222848),	// BUFFER_STORE_DWORDX4_OFFSET_vi
    UINT64_C(3765469184),	// BUFFER_STORE_DWORD_ADDR64_si
    UINT64_C(3765448704),	// BUFFER_STORE_DWORD_BOTHEN_si
    UINT64_C(3765448704),	// BUFFER_STORE_DWORD_BOTHEN_vi
    UINT64_C(3765444608),	// BUFFER_STORE_DWORD_IDXEN_si
    UINT64_C(3765444608),	// BUFFER_STORE_DWORD_IDXEN_vi
    UINT64_C(3765440512),	// BUFFER_STORE_DWORD_OFFEN_si
    UINT64_C(3765440512),	// BUFFER_STORE_DWORD_OFFEN_vi
    UINT64_C(3765436416),	// BUFFER_STORE_DWORD_OFFSET_si
    UINT64_C(3765436416),	// BUFFER_STORE_DWORD_OFFSET_vi
    UINT64_C(3768332288),	// BUFFER_STORE_FORMAT_D16_HI_X_BOTHEN_vi
    UINT64_C(3768328192),	// BUFFER_STORE_FORMAT_D16_HI_X_IDXEN_vi
    UINT64_C(3768324096),	// BUFFER_STORE_FORMAT_D16_HI_X_OFFEN_vi
    UINT64_C(3768320000),	// BUFFER_STORE_FORMAT_D16_HI_X_OFFSET_vi
    UINT64_C(3762040832),	// BUFFER_STORE_FORMAT_D16_XYZW_BOTHEN_vi
    UINT64_C(3762036736),	// BUFFER_STORE_FORMAT_D16_XYZW_IDXEN_vi
    UINT64_C(3762032640),	// BUFFER_STORE_FORMAT_D16_XYZW_OFFEN_vi
    UINT64_C(3762028544),	// BUFFER_STORE_FORMAT_D16_XYZW_OFFSET_vi
    UINT64_C(3762040832),	// BUFFER_STORE_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80
    UINT64_C(3762036736),	// BUFFER_STORE_FORMAT_D16_XYZW_gfx80_IDXEN_gfx80
    UINT64_C(3762032640),	// BUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFEN_gfx80
    UINT64_C(3762028544),	// BUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80
    UINT64_C(3761778688),	// BUFFER_STORE_FORMAT_D16_XYZ_BOTHEN_vi
    UINT64_C(3761774592),	// BUFFER_STORE_FORMAT_D16_XYZ_IDXEN_vi
    UINT64_C(3761770496),	// BUFFER_STORE_FORMAT_D16_XYZ_OFFEN_vi
    UINT64_C(3761766400),	// BUFFER_STORE_FORMAT_D16_XYZ_OFFSET_vi
    UINT64_C(3761778688),	// BUFFER_STORE_FORMAT_D16_XYZ_gfx80_BOTHEN_gfx80
    UINT64_C(3761774592),	// BUFFER_STORE_FORMAT_D16_XYZ_gfx80_IDXEN_gfx80
    UINT64_C(3761770496),	// BUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFEN_gfx80
    UINT64_C(3761766400),	// BUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFSET_gfx80
    UINT64_C(3761516544),	// BUFFER_STORE_FORMAT_D16_XY_BOTHEN_vi
    UINT64_C(3761512448),	// BUFFER_STORE_FORMAT_D16_XY_IDXEN_vi
    UINT64_C(3761508352),	// BUFFER_STORE_FORMAT_D16_XY_OFFEN_vi
    UINT64_C(3761504256),	// BUFFER_STORE_FORMAT_D16_XY_OFFSET_vi
    UINT64_C(3761516544),	// BUFFER_STORE_FORMAT_D16_XY_gfx80_BOTHEN_gfx80
    UINT64_C(3761512448),	// BUFFER_STORE_FORMAT_D16_XY_gfx80_IDXEN_gfx80
    UINT64_C(3761508352),	// BUFFER_STORE_FORMAT_D16_XY_gfx80_OFFEN_gfx80
    UINT64_C(3761504256),	// BUFFER_STORE_FORMAT_D16_XY_gfx80_OFFSET_gfx80
    UINT64_C(3761254400),	// BUFFER_STORE_FORMAT_D16_X_BOTHEN_vi
    UINT64_C(3761250304),	// BUFFER_STORE_FORMAT_D16_X_IDXEN_vi
    UINT64_C(3761246208),	// BUFFER_STORE_FORMAT_D16_X_OFFEN_vi
    UINT64_C(3761242112),	// BUFFER_STORE_FORMAT_D16_X_OFFSET_vi
    UINT64_C(3761254400),	// BUFFER_STORE_FORMAT_D16_X_gfx80_BOTHEN_gfx80
    UINT64_C(3761250304),	// BUFFER_STORE_FORMAT_D16_X_gfx80_IDXEN_gfx80
    UINT64_C(3761246208),	// BUFFER_STORE_FORMAT_D16_X_gfx80_OFFEN_gfx80
    UINT64_C(3761242112),	// BUFFER_STORE_FORMAT_D16_X_gfx80_OFFSET_gfx80
    UINT64_C(3759964160),	// BUFFER_STORE_FORMAT_XYZW_ADDR64_si
    UINT64_C(3759943680),	// BUFFER_STORE_FORMAT_XYZW_BOTHEN_si
    UINT64_C(3759943680),	// BUFFER_STORE_FORMAT_XYZW_BOTHEN_vi
    UINT64_C(3759939584),	// BUFFER_STORE_FORMAT_XYZW_IDXEN_si
    UINT64_C(3759939584),	// BUFFER_STORE_FORMAT_XYZW_IDXEN_vi
    UINT64_C(3759935488),	// BUFFER_STORE_FORMAT_XYZW_OFFEN_si
    UINT64_C(3759935488),	// BUFFER_STORE_FORMAT_XYZW_OFFEN_vi
    UINT64_C(3759931392),	// BUFFER_STORE_FORMAT_XYZW_OFFSET_si
    UINT64_C(3759931392),	// BUFFER_STORE_FORMAT_XYZW_OFFSET_vi
    UINT64_C(3759702016),	// BUFFER_STORE_FORMAT_XYZ_ADDR64_si
    UINT64_C(3759681536),	// BUFFER_STORE_FORMAT_XYZ_BOTHEN_si
    UINT64_C(3759681536),	// BUFFER_STORE_FORMAT_XYZ_BOTHEN_vi
    UINT64_C(3759677440),	// BUFFER_STORE_FORMAT_XYZ_IDXEN_si
    UINT64_C(3759677440),	// BUFFER_STORE_FORMAT_XYZ_IDXEN_vi
    UINT64_C(3759673344),	// BUFFER_STORE_FORMAT_XYZ_OFFEN_si
    UINT64_C(3759673344),	// BUFFER_STORE_FORMAT_XYZ_OFFEN_vi
    UINT64_C(3759669248),	// BUFFER_STORE_FORMAT_XYZ_OFFSET_si
    UINT64_C(3759669248),	// BUFFER_STORE_FORMAT_XYZ_OFFSET_vi
    UINT64_C(3759439872),	// BUFFER_STORE_FORMAT_XY_ADDR64_si
    UINT64_C(3759419392),	// BUFFER_STORE_FORMAT_XY_BOTHEN_si
    UINT64_C(3759419392),	// BUFFER_STORE_FORMAT_XY_BOTHEN_vi
    UINT64_C(3759415296),	// BUFFER_STORE_FORMAT_XY_IDXEN_si
    UINT64_C(3759415296),	// BUFFER_STORE_FORMAT_XY_IDXEN_vi
    UINT64_C(3759411200),	// BUFFER_STORE_FORMAT_XY_OFFEN_si
    UINT64_C(3759411200),	// BUFFER_STORE_FORMAT_XY_OFFEN_vi
    UINT64_C(3759407104),	// BUFFER_STORE_FORMAT_XY_OFFSET_si
    UINT64_C(3759407104),	// BUFFER_STORE_FORMAT_XY_OFFSET_vi
    UINT64_C(3759177728),	// BUFFER_STORE_FORMAT_X_ADDR64_si
    UINT64_C(3759157248),	// BUFFER_STORE_FORMAT_X_BOTHEN_si
    UINT64_C(3759157248),	// BUFFER_STORE_FORMAT_X_BOTHEN_vi
    UINT64_C(3759153152),	// BUFFER_STORE_FORMAT_X_IDXEN_si
    UINT64_C(3759153152),	// BUFFER_STORE_FORMAT_X_IDXEN_vi
    UINT64_C(3759149056),	// BUFFER_STORE_FORMAT_X_OFFEN_si
    UINT64_C(3759149056),	// BUFFER_STORE_FORMAT_X_OFFEN_vi
    UINT64_C(3759144960),	// BUFFER_STORE_FORMAT_X_OFFSET_si
    UINT64_C(3759144960),	// BUFFER_STORE_FORMAT_X_OFFSET_vi
    UINT64_C(3774152704),	// BUFFER_STORE_LDS_DWORD_vi
    UINT64_C(3764944896),	// BUFFER_STORE_SHORT_ADDR64_si
    UINT64_C(3764924416),	// BUFFER_STORE_SHORT_BOTHEN_si
    UINT64_C(3764924416),	// BUFFER_STORE_SHORT_BOTHEN_vi
    UINT64_C(3765186560),	// BUFFER_STORE_SHORT_D16_HI_BOTHEN_vi
    UINT64_C(3765182464),	// BUFFER_STORE_SHORT_D16_HI_IDXEN_vi
    UINT64_C(3765178368),	// BUFFER_STORE_SHORT_D16_HI_OFFEN_vi
    UINT64_C(3765174272),	// BUFFER_STORE_SHORT_D16_HI_OFFSET_vi
    UINT64_C(3764920320),	// BUFFER_STORE_SHORT_IDXEN_si
    UINT64_C(3764920320),	// BUFFER_STORE_SHORT_IDXEN_vi
    UINT64_C(3764916224),	// BUFFER_STORE_SHORT_OFFEN_si
    UINT64_C(3764916224),	// BUFFER_STORE_SHORT_OFFEN_vi
    UINT64_C(3764912128),	// BUFFER_STORE_SHORT_OFFSET_si
    UINT64_C(3764912128),	// BUFFER_STORE_SHORT_OFFSET_vi
    UINT64_C(3787456512),	// BUFFER_WBINVL1_SC_si
    UINT64_C(3787456512),	// BUFFER_WBINVL1_VOL_ci
    UINT64_C(3774611456),	// BUFFER_WBINVL1_VOL_vi
    UINT64_C(3787718656),	// BUFFER_WBINVL1_si
    UINT64_C(3774349312),	// BUFFER_WBINVL1_vi
    UINT64_C(3626631168),	// DS_ADD_F32_vi
    UINT64_C(3630825472),	// DS_ADD_RTN_F32_vi
    UINT64_C(3632267264),	// DS_ADD_RTN_U32_si
    UINT64_C(3628072960),	// DS_ADD_RTN_U32_vi
    UINT64_C(3649044480),	// DS_ADD_RTN_U64_si
    UINT64_C(3636461568),	// DS_ADD_RTN_U64_vi
    UINT64_C(3643408384),	// DS_ADD_SRC2_F32_vi
    UINT64_C(3657433088),	// DS_ADD_SRC2_U32_si
    UINT64_C(3640655872),	// DS_ADD_SRC2_U32_vi
    UINT64_C(3674210304),	// DS_ADD_SRC2_U64_si
    UINT64_C(3649044480),	// DS_ADD_SRC2_U64_vi
    UINT64_C(3623878656),	// DS_ADD_U32_si
    UINT64_C(3623878656),	// DS_ADD_U32_vi
    UINT64_C(3640655872),	// DS_ADD_U64_si
    UINT64_C(3632267264),	// DS_ADD_U64_vi
    UINT64_C(3626237952),	// DS_AND_B32_si
    UINT64_C(3625058304),	// DS_AND_B32_vi
    UINT64_C(3643015168),	// DS_AND_B64_si
    UINT64_C(3633446912),	// DS_AND_B64_vi
    UINT64_C(3634626560),	// DS_AND_RTN_B32_si
    UINT64_C(3629252608),	// DS_AND_RTN_B32_vi
    UINT64_C(3651403776),	// DS_AND_RTN_B64_si
    UINT64_C(3637641216),	// DS_AND_RTN_B64_vi
    UINT64_C(3659792384),	// DS_AND_SRC2_B32_si
    UINT64_C(3641835520),	// DS_AND_SRC2_B32_vi
    UINT64_C(3676569600),	// DS_AND_SRC2_B64_si
    UINT64_C(3650224128),	// DS_AND_SRC2_B64_vi
    UINT64_C(3640131584),	// DS_APPEND_si
    UINT64_C(3648782336),	// DS_APPEND_vi
    UINT64_C(3632136192),	// DS_BPERMUTE_B32_vi
    UINT64_C(3628072960),	// DS_CMPST_B32_si
    UINT64_C(3625975808),	// DS_CMPST_B32_vi
    UINT64_C(3644850176),	// DS_CMPST_B64_si
    UINT64_C(3634364416),	// DS_CMPST_B64_vi
    UINT64_C(3628335104),	// DS_CMPST_F32_si
    UINT64_C(3626106880),	// DS_CMPST_F32_vi
    UINT64_C(3645112320),	// DS_CMPST_F64_si
    UINT64_C(3634495488),	// DS_CMPST_F64_vi
    UINT64_C(3636461568),	// DS_CMPST_RTN_B32_si
    UINT64_C(3630170112),	// DS_CMPST_RTN_B32_vi
    UINT64_C(3653238784),	// DS_CMPST_RTN_B64_si
    UINT64_C(3638558720),	// DS_CMPST_RTN_B64_vi
    UINT64_C(3636723712),	// DS_CMPST_RTN_F32_si
    UINT64_C(3630301184),	// DS_CMPST_RTN_F32_vi
    UINT64_C(3653500928),	// DS_CMPST_RTN_F64_si
    UINT64_C(3638689792),	// DS_CMPST_RTN_F64_vi
    UINT64_C(3656908800),	// DS_CONDXCHG32_RTN_B64_si
    UINT64_C(3640393728),	// DS_CONDXCHG32_RTN_B64_vi
    UINT64_C(3639869440),	// DS_CONSUME_si
    UINT64_C(3648651264),	// DS_CONSUME_vi
    UINT64_C(3633315840),	// DS_DEC_RTN_U32_si
    UINT64_C(3628597248),	// DS_DEC_RTN_U32_vi
    UINT64_C(3650093056),	// DS_DEC_RTN_U64_si
    UINT64_C(3636985856),	// DS_DEC_RTN_U64_vi
    UINT64_C(3658481664),	// DS_DEC_SRC2_U32_si
    UINT64_C(3641180160),	// DS_DEC_SRC2_U32_vi
    UINT64_C(3675258880),	// DS_DEC_SRC2_U64_si
    UINT64_C(3649568768),	// DS_DEC_SRC2_U64_vi
    UINT64_C(3624927232),	// DS_DEC_U32_si
    UINT64_C(3624402944),	// DS_DEC_U32_vi
    UINT64_C(3641704448),	// DS_DEC_U64_si
    UINT64_C(3632791552),	// DS_DEC_U64_vi
    UINT64_C(3631611904),	// DS_GWS_BARRIER_si
    UINT64_C(3644522496),	// DS_GWS_BARRIER_vi
    UINT64_C(3630563328),	// DS_GWS_INIT_si
    UINT64_C(3643998208),	// DS_GWS_INIT_vi
    UINT64_C(3631087616),	// DS_GWS_SEMA_BR_si
    UINT64_C(3644260352),	// DS_GWS_SEMA_BR_vi
    UINT64_C(3631349760),	// DS_GWS_SEMA_P_si
    UINT64_C(3644391424),	// DS_GWS_SEMA_P_vi
    UINT64_C(3630301184),	// DS_GWS_SEMA_RELEASE_ALL_si
    UINT64_C(3643867136),	// DS_GWS_SEMA_RELEASE_ALL_vi
    UINT64_C(3630825472),	// DS_GWS_SEMA_V_si
    UINT64_C(3644129280),	// DS_GWS_SEMA_V_vi
    UINT64_C(3633053696),	// DS_INC_RTN_U32_si
    UINT64_C(3628466176),	// DS_INC_RTN_U32_vi
    UINT64_C(3649830912),	// DS_INC_RTN_U64_si
    UINT64_C(3636854784),	// DS_INC_RTN_U64_vi
    UINT64_C(3658219520),	// DS_INC_SRC2_U32_si
    UINT64_C(3641049088),	// DS_INC_SRC2_U32_vi
    UINT64_C(3674996736),	// DS_INC_SRC2_U64_si
    UINT64_C(3649437696),	// DS_INC_SRC2_U64_vi
    UINT64_C(3624665088),	// DS_INC_U32_si
    UINT64_C(3624271872),	// DS_INC_U32_vi
    UINT64_C(3641442304),	// DS_INC_U64_si
    UINT64_C(3632660480),	// DS_INC_U64_vi
    UINT64_C(3628859392),	// DS_MAX_F32_si
    UINT64_C(3626369024),	// DS_MAX_F32_vi
    UINT64_C(3645636608),	// DS_MAX_F64_si
    UINT64_C(3634757632),	// DS_MAX_F64_vi
    UINT64_C(3625451520),	// DS_MAX_I32_si
    UINT64_C(3624665088),	// DS_MAX_I32_vi
    UINT64_C(3642228736),	// DS_MAX_I64_si
    UINT64_C(3633053696),	// DS_MAX_I64_vi
    UINT64_C(3637248000),	// DS_MAX_RTN_F32_si
    UINT64_C(3630563328),	// DS_MAX_RTN_F32_vi
    UINT64_C(3654025216),	// DS_MAX_RTN_F64_si
    UINT64_C(3638951936),	// DS_MAX_RTN_F64_vi
    UINT64_C(3633840128),	// DS_MAX_RTN_I32_si
    UINT64_C(3628859392),	// DS_MAX_RTN_I32_vi
    UINT64_C(3650617344),	// DS_MAX_RTN_I64_si
    UINT64_C(3637248000),	// DS_MAX_RTN_I64_vi
    UINT64_C(3634364416),	// DS_MAX_RTN_U32_si
    UINT64_C(3629121536),	// DS_MAX_RTN_U32_vi
    UINT64_C(3651141632),	// DS_MAX_RTN_U64_si
    UINT64_C(3637510144),	// DS_MAX_RTN_U64_vi
    UINT64_C(3662413824),	// DS_MAX_SRC2_F32_si
    UINT64_C(3643146240),	// DS_MAX_SRC2_F32_vi
    UINT64_C(3679191040),	// DS_MAX_SRC2_F64_si
    UINT64_C(3651534848),	// DS_MAX_SRC2_F64_vi
    UINT64_C(3659005952),	// DS_MAX_SRC2_I32_si
    UINT64_C(3641442304),	// DS_MAX_SRC2_I32_vi
    UINT64_C(3675783168),	// DS_MAX_SRC2_I64_si
    UINT64_C(3649830912),	// DS_MAX_SRC2_I64_vi
    UINT64_C(3659530240),	// DS_MAX_SRC2_U32_si
    UINT64_C(3641704448),	// DS_MAX_SRC2_U32_vi
    UINT64_C(3676307456),	// DS_MAX_SRC2_U64_si
    UINT64_C(3650093056),	// DS_MAX_SRC2_U64_vi
    UINT64_C(3625975808),	// DS_MAX_U32_si
    UINT64_C(3624927232),	// DS_MAX_U32_vi
    UINT64_C(3642753024),	// DS_MAX_U64_si
    UINT64_C(3633315840),	// DS_MAX_U64_vi
    UINT64_C(3628597248),	// DS_MIN_F32_si
    UINT64_C(3626237952),	// DS_MIN_F32_vi
    UINT64_C(3645374464),	// DS_MIN_F64_si
    UINT64_C(3634626560),	// DS_MIN_F64_vi
    UINT64_C(3625189376),	// DS_MIN_I32_si
    UINT64_C(3624534016),	// DS_MIN_I32_vi
    UINT64_C(3641966592),	// DS_MIN_I64_si
    UINT64_C(3632922624),	// DS_MIN_I64_vi
    UINT64_C(3636985856),	// DS_MIN_RTN_F32_si
    UINT64_C(3630432256),	// DS_MIN_RTN_F32_vi
    UINT64_C(3653763072),	// DS_MIN_RTN_F64_si
    UINT64_C(3638820864),	// DS_MIN_RTN_F64_vi
    UINT64_C(3633577984),	// DS_MIN_RTN_I32_si
    UINT64_C(3628728320),	// DS_MIN_RTN_I32_vi
    UINT64_C(3650355200),	// DS_MIN_RTN_I64_si
    UINT64_C(3637116928),	// DS_MIN_RTN_I64_vi
    UINT64_C(3634102272),	// DS_MIN_RTN_U32_si
    UINT64_C(3628990464),	// DS_MIN_RTN_U32_vi
    UINT64_C(3650879488),	// DS_MIN_RTN_U64_si
    UINT64_C(3637379072),	// DS_MIN_RTN_U64_vi
    UINT64_C(3662151680),	// DS_MIN_SRC2_F32_si
    UINT64_C(3643015168),	// DS_MIN_SRC2_F32_vi
    UINT64_C(3678928896),	// DS_MIN_SRC2_F64_si
    UINT64_C(3651403776),	// DS_MIN_SRC2_F64_vi
    UINT64_C(3658743808),	// DS_MIN_SRC2_I32_si
    UINT64_C(3641311232),	// DS_MIN_SRC2_I32_vi
    UINT64_C(3675521024),	// DS_MIN_SRC2_I64_si
    UINT64_C(3649699840),	// DS_MIN_SRC2_I64_vi
    UINT64_C(3659268096),	// DS_MIN_SRC2_U32_si
    UINT64_C(3641573376),	// DS_MIN_SRC2_U32_vi
    UINT64_C(3676045312),	// DS_MIN_SRC2_U64_si
    UINT64_C(3649961984),	// DS_MIN_SRC2_U64_vi
    UINT64_C(3625713664),	// DS_MIN_U32_si
    UINT64_C(3624796160),	// DS_MIN_U32_vi
    UINT64_C(3642490880),	// DS_MIN_U64_si
    UINT64_C(3633184768),	// DS_MIN_U64_vi
    UINT64_C(3627024384),	// DS_MSKOR_B32_si
    UINT64_C(3625451520),	// DS_MSKOR_B32_vi
    UINT64_C(3643801600),	// DS_MSKOR_B64_si
    UINT64_C(3633840128),	// DS_MSKOR_B64_vi
    UINT64_C(3635412992),	// DS_MSKOR_RTN_B32_si
    UINT64_C(3629645824),	// DS_MSKOR_RTN_B32_vi
    UINT64_C(3652190208),	// DS_MSKOR_RTN_B64_si
    UINT64_C(3638034432),	// DS_MSKOR_RTN_B64_vi
    UINT64_C(3629121536),	// DS_NOP_si
    UINT64_C(3626500096),	// DS_NOP_vi
    UINT64_C(3640524800),	// DS_ORDERED_COUNT_si
    UINT64_C(3648978944),	// DS_ORDERED_COUNT_vi
    UINT64_C(3626500096),	// DS_OR_B32_si
    UINT64_C(3625189376),	// DS_OR_B32_vi
    UINT64_C(3643277312),	// DS_OR_B64_si
    UINT64_C(3633577984),	// DS_OR_B64_vi
    UINT64_C(3634888704),	// DS_OR_RTN_B32_si
    UINT64_C(3629383680),	// DS_OR_RTN_B32_vi
    UINT64_C(3651665920),	// DS_OR_RTN_B64_si
    UINT64_C(3637772288),	// DS_OR_RTN_B64_vi
    UINT64_C(3660054528),	// DS_OR_SRC2_B32_si
    UINT64_C(3641966592),	// DS_OR_SRC2_B32_vi
    UINT64_C(3676831744),	// DS_OR_SRC2_B64_si
    UINT64_C(3650355200),	// DS_OR_SRC2_B64_vi
    UINT64_C(3632005120),	// DS_PERMUTE_B32_vi
    UINT64_C(3638558720),	// DS_READ2ST64_B32_si
    UINT64_C(3631218688),	// DS_READ2ST64_B32_vi
    UINT64_C(3655335936),	// DS_READ2ST64_B64_si
    UINT64_C(3639607296),	// DS_READ2ST64_B64_vi
    UINT64_C(3638296576),	// DS_READ2_B32_si
    UINT64_C(3631087616),	// DS_READ2_B32_vi
    UINT64_C(3655073792),	// DS_READ2_B64_si
    UINT64_C(3639476224),	// DS_READ2_B64_vi
    UINT64_C(3647733760),	// DS_READ_ADDTID_B32_vi
    UINT64_C(3690725376),	// DS_READ_B128_si
    UINT64_C(3657302016),	// DS_READ_B128_vi
    UINT64_C(3638034432),	// DS_READ_B32_si
    UINT64_C(3630956544),	// DS_READ_B32_vi
    UINT64_C(3654811648),	// DS_READ_B64_si
    UINT64_C(3639345152),	// DS_READ_B64_vi
    UINT64_C(3690463232),	// DS_READ_B96_si
    UINT64_C(3657170944),	// DS_READ_B96_vi
    UINT64_C(3639345152),	// DS_READ_I16_si
    UINT64_C(3631611904),	// DS_READ_I16_vi
    UINT64_C(3635544064),	// DS_READ_I8_D16_HI_vi
    UINT64_C(3635412992),	// DS_READ_I8_D16_vi
    UINT64_C(3638820864),	// DS_READ_I8_si
    UINT64_C(3631349760),	// DS_READ_I8_vi
    UINT64_C(3635806208),	// DS_READ_U16_D16_HI_vi
    UINT64_C(3635675136),	// DS_READ_U16_D16_vi
    UINT64_C(3639607296),	// DS_READ_U16_si
    UINT64_C(3631742976),	// DS_READ_U16_vi
    UINT64_C(3635281920),	// DS_READ_U8_D16_HI_vi
    UINT64_C(3635150848),	// DS_READ_U8_D16_vi
    UINT64_C(3639083008),	// DS_READ_U8_si
    UINT64_C(3631480832),	// DS_READ_U8_vi
    UINT64_C(3632791552),	// DS_RSUB_RTN_U32_si
    UINT64_C(3628335104),	// DS_RSUB_RTN_U32_vi
    UINT64_C(3649568768),	// DS_RSUB_RTN_U64_si
    UINT64_C(3636723712),	// DS_RSUB_RTN_U64_vi
    UINT64_C(3657957376),	// DS_RSUB_SRC2_U32_si
    UINT64_C(3640918016),	// DS_RSUB_SRC2_U32_vi
    UINT64_C(3674734592),	// DS_RSUB_SRC2_U64_si
    UINT64_C(3649306624),	// DS_RSUB_SRC2_U64_vi
    UINT64_C(3624402944),	// DS_RSUB_U32_si
    UINT64_C(3624140800),	// DS_RSUB_U32_vi
    UINT64_C(3641180160),	// DS_RSUB_U64_si
    UINT64_C(3632529408),	// DS_RSUB_U64_vi
    UINT64_C(3632529408),	// DS_SUB_RTN_U32_si
    UINT64_C(3628204032),	// DS_SUB_RTN_U32_vi
    UINT64_C(3649306624),	// DS_SUB_RTN_U64_si
    UINT64_C(3636592640),	// DS_SUB_RTN_U64_vi
    UINT64_C(3657695232),	// DS_SUB_SRC2_U32_si
    UINT64_C(3640786944),	// DS_SUB_SRC2_U32_vi
    UINT64_C(3674472448),	// DS_SUB_SRC2_U64_si
    UINT64_C(3649175552),	// DS_SUB_SRC2_U64_vi
    UINT64_C(3624140800),	// DS_SUB_U32_si
    UINT64_C(3624009728),	// DS_SUB_U32_vi
    UINT64_C(3640918016),	// DS_SUB_U64_si
    UINT64_C(3632398336),	// DS_SUB_U64_vi
    UINT64_C(3637772288),	// DS_SWIZZLE_B32_si
    UINT64_C(3631874048),	// DS_SWIZZLE_B32_vi
    UINT64_C(3637510144),	// DS_WRAP_RTN_B32_si
    UINT64_C(3630694400),	// DS_WRAP_RTN_B32_vi
    UINT64_C(3627810816),	// DS_WRITE2ST64_B32_si
    UINT64_C(3625844736),	// DS_WRITE2ST64_B32_vi
    UINT64_C(3644588032),	// DS_WRITE2ST64_B64_si
    UINT64_C(3634233344),	// DS_WRITE2ST64_B64_vi
    UINT64_C(3627548672),	// DS_WRITE2_B32_si
    UINT64_C(3625713664),	// DS_WRITE2_B32_vi
    UINT64_C(3644325888),	// DS_WRITE2_B64_si
    UINT64_C(3634102272),	// DS_WRITE2_B64_vi
    UINT64_C(3627679744),	// DS_WRITE_ADDTID_B32_vi
    UINT64_C(3682336768),	// DS_WRITE_B128_si
    UINT64_C(3653107712),	// DS_WRITE_B128_vi
    UINT64_C(3635019776),	// DS_WRITE_B16_D16_HI_vi
    UINT64_C(3632005120),	// DS_WRITE_B16_si
    UINT64_C(3627941888),	// DS_WRITE_B16_vi
    UINT64_C(3627286528),	// DS_WRITE_B32_si
    UINT64_C(3625582592),	// DS_WRITE_B32_vi
    UINT64_C(3644063744),	// DS_WRITE_B64_si
    UINT64_C(3633971200),	// DS_WRITE_B64_vi
    UINT64_C(3634888704),	// DS_WRITE_B8_D16_HI_vi
    UINT64_C(3631742976),	// DS_WRITE_B8_si
    UINT64_C(3627810816),	// DS_WRITE_B8_vi
    UINT64_C(3682074624),	// DS_WRITE_B96_si
    UINT64_C(3652976640),	// DS_WRITE_B96_vi
    UINT64_C(3660840960),	// DS_WRITE_SRC2_B32_si
    UINT64_C(3642359808),	// DS_WRITE_SRC2_B32_vi
    UINT64_C(3677618176),	// DS_WRITE_SRC2_B64_si
    UINT64_C(3650748416),	// DS_WRITE_SRC2_B64_vi
    UINT64_C(3636199424),	// DS_WRXCHG2ST64_RTN_B32_si
    UINT64_C(3630039040),	// DS_WRXCHG2ST64_RTN_B32_vi
    UINT64_C(3652976640),	// DS_WRXCHG2ST64_RTN_B64_si
    UINT64_C(3638427648),	// DS_WRXCHG2ST64_RTN_B64_vi
    UINT64_C(3635937280),	// DS_WRXCHG2_RTN_B32_si
    UINT64_C(3629907968),	// DS_WRXCHG2_RTN_B32_vi
    UINT64_C(3652714496),	// DS_WRXCHG2_RTN_B64_si
    UINT64_C(3638296576),	// DS_WRXCHG2_RTN_B64_vi
    UINT64_C(3635675136),	// DS_WRXCHG_RTN_B32_si
    UINT64_C(3629776896),	// DS_WRXCHG_RTN_B32_vi
    UINT64_C(3652452352),	// DS_WRXCHG_RTN_B64_si
    UINT64_C(3638165504),	// DS_WRXCHG_RTN_B64_vi
    UINT64_C(3626762240),	// DS_XOR_B32_si
    UINT64_C(3625320448),	// DS_XOR_B32_vi
    UINT64_C(3643539456),	// DS_XOR_B64_si
    UINT64_C(3633709056),	// DS_XOR_B64_vi
    UINT64_C(3635150848),	// DS_XOR_RTN_B32_si
    UINT64_C(3629514752),	// DS_XOR_RTN_B32_vi
    UINT64_C(3651928064),	// DS_XOR_RTN_B64_si
    UINT64_C(3637903360),	// DS_XOR_RTN_B64_vi
    UINT64_C(3660316672),	// DS_XOR_SRC2_B32_si
    UINT64_C(3642097664),	// DS_XOR_SRC2_B32_vi
    UINT64_C(3677093888),	// DS_XOR_SRC2_B64_si
    UINT64_C(3650486272),	// DS_XOR_SRC2_B64_vi
    UINT64_C(4160751616),	// EXP_DONE_si
    UINT64_C(3288336384),	// EXP_DONE_vi
    UINT64_C(4160749568),	// EXP_si
    UINT64_C(3288334336),	// EXP_vi
    UINT64_C(3704160256),	// FLAT_ATOMIC_ADD_RTN_ci
    UINT64_C(3708354560),	// FLAT_ATOMIC_ADD_RTN_vi
    UINT64_C(3712548864),	// FLAT_ATOMIC_ADD_X2_RTN_ci
    UINT64_C(3716743168),	// FLAT_ATOMIC_ADD_X2_RTN_vi
    UINT64_C(3712483328),	// FLAT_ATOMIC_ADD_X2_ci
    UINT64_C(3716677632),	// FLAT_ATOMIC_ADD_X2_vi
    UINT64_C(3704094720),	// FLAT_ATOMIC_ADD_ci
    UINT64_C(3708289024),	// FLAT_ATOMIC_ADD_vi
    UINT64_C(3705995264),	// FLAT_ATOMIC_AND_RTN_ci
    UINT64_C(3709927424),	// FLAT_ATOMIC_AND_RTN_vi
    UINT64_C(3714383872),	// FLAT_ATOMIC_AND_X2_RTN_ci
    UINT64_C(3718316032),	// FLAT_ATOMIC_AND_X2_RTN_vi
    UINT64_C(3714318336),	// FLAT_ATOMIC_AND_X2_ci
    UINT64_C(3718250496),	// FLAT_ATOMIC_AND_X2_vi
    UINT64_C(3705929728),	// FLAT_ATOMIC_AND_ci
    UINT64_C(3709861888),	// FLAT_ATOMIC_AND_vi
    UINT64_C(3703898112),	// FLAT_ATOMIC_CMPSWAP_RTN_ci
    UINT64_C(3708092416),	// FLAT_ATOMIC_CMPSWAP_RTN_vi
    UINT64_C(3712286720),	// FLAT_ATOMIC_CMPSWAP_X2_RTN_ci
    UINT64_C(3716481024),	// FLAT_ATOMIC_CMPSWAP_X2_RTN_vi
    UINT64_C(3712221184),	// FLAT_ATOMIC_CMPSWAP_X2_ci
    UINT64_C(3716415488),	// FLAT_ATOMIC_CMPSWAP_X2_vi
    UINT64_C(3703832576),	// FLAT_ATOMIC_CMPSWAP_ci
    UINT64_C(3708026880),	// FLAT_ATOMIC_CMPSWAP_vi
    UINT64_C(3707043840),	// FLAT_ATOMIC_DEC_RTN_ci
    UINT64_C(3710976000),	// FLAT_ATOMIC_DEC_RTN_vi
    UINT64_C(3715432448),	// FLAT_ATOMIC_DEC_X2_RTN_ci
    UINT64_C(3719364608),	// FLAT_ATOMIC_DEC_X2_RTN_vi
    UINT64_C(3715366912),	// FLAT_ATOMIC_DEC_X2_ci
    UINT64_C(3719299072),	// FLAT_ATOMIC_DEC_X2_vi
    UINT64_C(3706978304),	// FLAT_ATOMIC_DEC_ci
    UINT64_C(3710910464),	// FLAT_ATOMIC_DEC_vi
    UINT64_C(3707305984),	// FLAT_ATOMIC_FCMPSWAP_RTN_ci
    UINT64_C(3715694592),	// FLAT_ATOMIC_FCMPSWAP_X2_RTN_ci
    UINT64_C(3715629056),	// FLAT_ATOMIC_FCMPSWAP_X2_ci
    UINT64_C(3707240448),	// FLAT_ATOMIC_FCMPSWAP_ci
    UINT64_C(3707830272),	// FLAT_ATOMIC_FMAX_RTN_ci
    UINT64_C(3716218880),	// FLAT_ATOMIC_FMAX_X2_RTN_ci
    UINT64_C(3716153344),	// FLAT_ATOMIC_FMAX_X2_ci
    UINT64_C(3707764736),	// FLAT_ATOMIC_FMAX_ci
    UINT64_C(3707568128),	// FLAT_ATOMIC_FMIN_RTN_ci
    UINT64_C(3715956736),	// FLAT_ATOMIC_FMIN_X2_RTN_ci
    UINT64_C(3715891200),	// FLAT_ATOMIC_FMIN_X2_ci
    UINT64_C(3707502592),	// FLAT_ATOMIC_FMIN_ci
    UINT64_C(3706781696),	// FLAT_ATOMIC_INC_RTN_ci
    UINT64_C(3710713856),	// FLAT_ATOMIC_INC_RTN_vi
    UINT64_C(3715170304),	// FLAT_ATOMIC_INC_X2_RTN_ci
    UINT64_C(3719102464),	// FLAT_ATOMIC_INC_X2_RTN_vi
    UINT64_C(3715104768),	// FLAT_ATOMIC_INC_X2_ci
    UINT64_C(3719036928),	// FLAT_ATOMIC_INC_X2_vi
    UINT64_C(3706716160),	// FLAT_ATOMIC_INC_ci
    UINT64_C(3710648320),	// FLAT_ATOMIC_INC_vi
    UINT64_C(3706257408),	// FLAT_ATOMIC_OR_RTN_ci
    UINT64_C(3710189568),	// FLAT_ATOMIC_OR_RTN_vi
    UINT64_C(3714646016),	// FLAT_ATOMIC_OR_X2_RTN_ci
    UINT64_C(3718578176),	// FLAT_ATOMIC_OR_X2_RTN_vi
    UINT64_C(3714580480),	// FLAT_ATOMIC_OR_X2_ci
    UINT64_C(3718512640),	// FLAT_ATOMIC_OR_X2_vi
    UINT64_C(3706191872),	// FLAT_ATOMIC_OR_ci
    UINT64_C(3710124032),	// FLAT_ATOMIC_OR_vi
    UINT64_C(3705470976),	// FLAT_ATOMIC_SMAX_RTN_ci
    UINT64_C(3709403136),	// FLAT_ATOMIC_SMAX_RTN_vi
    UINT64_C(3713859584),	// FLAT_ATOMIC_SMAX_X2_RTN_ci
    UINT64_C(3717791744),	// FLAT_ATOMIC_SMAX_X2_RTN_vi
    UINT64_C(3713794048),	// FLAT_ATOMIC_SMAX_X2_ci
    UINT64_C(3717726208),	// FLAT_ATOMIC_SMAX_X2_vi
    UINT64_C(3705405440),	// FLAT_ATOMIC_SMAX_ci
    UINT64_C(3709337600),	// FLAT_ATOMIC_SMAX_vi
    UINT64_C(3704946688),	// FLAT_ATOMIC_SMIN_RTN_ci
    UINT64_C(3708878848),	// FLAT_ATOMIC_SMIN_RTN_vi
    UINT64_C(3713335296),	// FLAT_ATOMIC_SMIN_X2_RTN_ci
    UINT64_C(3717267456),	// FLAT_ATOMIC_SMIN_X2_RTN_vi
    UINT64_C(3713269760),	// FLAT_ATOMIC_SMIN_X2_ci
    UINT64_C(3717201920),	// FLAT_ATOMIC_SMIN_X2_vi
    UINT64_C(3704881152),	// FLAT_ATOMIC_SMIN_ci
    UINT64_C(3708813312),	// FLAT_ATOMIC_SMIN_vi
    UINT64_C(3704422400),	// FLAT_ATOMIC_SUB_RTN_ci
    UINT64_C(3708616704),	// FLAT_ATOMIC_SUB_RTN_vi
    UINT64_C(3712811008),	// FLAT_ATOMIC_SUB_X2_RTN_ci
    UINT64_C(3717005312),	// FLAT_ATOMIC_SUB_X2_RTN_vi
    UINT64_C(3712745472),	// FLAT_ATOMIC_SUB_X2_ci
    UINT64_C(3716939776),	// FLAT_ATOMIC_SUB_X2_vi
    UINT64_C(3704356864),	// FLAT_ATOMIC_SUB_ci
    UINT64_C(3708551168),	// FLAT_ATOMIC_SUB_vi
    UINT64_C(3703635968),	// FLAT_ATOMIC_SWAP_RTN_ci
    UINT64_C(3707830272),	// FLAT_ATOMIC_SWAP_RTN_vi
    UINT64_C(3712024576),	// FLAT_ATOMIC_SWAP_X2_RTN_ci
    UINT64_C(3716218880),	// FLAT_ATOMIC_SWAP_X2_RTN_vi
    UINT64_C(3711959040),	// FLAT_ATOMIC_SWAP_X2_ci
    UINT64_C(3716153344),	// FLAT_ATOMIC_SWAP_X2_vi
    UINT64_C(3703570432),	// FLAT_ATOMIC_SWAP_ci
    UINT64_C(3707764736),	// FLAT_ATOMIC_SWAP_vi
    UINT64_C(3705733120),	// FLAT_ATOMIC_UMAX_RTN_ci
    UINT64_C(3709665280),	// FLAT_ATOMIC_UMAX_RTN_vi
    UINT64_C(3714121728),	// FLAT_ATOMIC_UMAX_X2_RTN_ci
    UINT64_C(3718053888),	// FLAT_ATOMIC_UMAX_X2_RTN_vi
    UINT64_C(3714056192),	// FLAT_ATOMIC_UMAX_X2_ci
    UINT64_C(3717988352),	// FLAT_ATOMIC_UMAX_X2_vi
    UINT64_C(3705667584),	// FLAT_ATOMIC_UMAX_ci
    UINT64_C(3709599744),	// FLAT_ATOMIC_UMAX_vi
    UINT64_C(3705208832),	// FLAT_ATOMIC_UMIN_RTN_ci
    UINT64_C(3709140992),	// FLAT_ATOMIC_UMIN_RTN_vi
    UINT64_C(3713597440),	// FLAT_ATOMIC_UMIN_X2_RTN_ci
    UINT64_C(3717529600),	// FLAT_ATOMIC_UMIN_X2_RTN_vi
    UINT64_C(3713531904),	// FLAT_ATOMIC_UMIN_X2_ci
    UINT64_C(3717464064),	// FLAT_ATOMIC_UMIN_X2_vi
    UINT64_C(3705143296),	// FLAT_ATOMIC_UMIN_ci
    UINT64_C(3709075456),	// FLAT_ATOMIC_UMIN_vi
    UINT64_C(3706519552),	// FLAT_ATOMIC_XOR_RTN_ci
    UINT64_C(3710451712),	// FLAT_ATOMIC_XOR_RTN_vi
    UINT64_C(3714908160),	// FLAT_ATOMIC_XOR_X2_RTN_ci
    UINT64_C(3718840320),	// FLAT_ATOMIC_XOR_X2_RTN_vi
    UINT64_C(3714842624),	// FLAT_ATOMIC_XOR_X2_ci
    UINT64_C(3718774784),	// FLAT_ATOMIC_XOR_X2_vi
    UINT64_C(3706454016),	// FLAT_ATOMIC_XOR_ci
    UINT64_C(3710386176),	// FLAT_ATOMIC_XOR_vi
    UINT64_C(3694395392),	// FLAT_LOAD_DWORDX2_ci
    UINT64_C(3696492544),	// FLAT_LOAD_DWORDX2_vi
    UINT64_C(3694919680),	// FLAT_LOAD_DWORDX3_ci
    UINT64_C(3696754688),	// FLAT_LOAD_DWORDX3_vi
    UINT64_C(3694657536),	// FLAT_LOAD_DWORDX4_ci
    UINT64_C(3697016832),	// FLAT_LOAD_DWORDX4_vi
    UINT64_C(3694133248),	// FLAT_LOAD_DWORD_ci
    UINT64_C(3696230400),	// FLAT_LOAD_DWORD_vi
    UINT64_C(3700162560),	// FLAT_LOAD_SBYTE_D16_HI_vi
    UINT64_C(3699900416),	// FLAT_LOAD_SBYTE_D16_vi
    UINT64_C(3693346816),	// FLAT_LOAD_SBYTE_ci
    UINT64_C(3695443968),	// FLAT_LOAD_SBYTE_vi
    UINT64_C(3700686848),	// FLAT_LOAD_SHORT_D16_HI_vi
    UINT64_C(3700424704),	// FLAT_LOAD_SHORT_D16_vi
    UINT64_C(3693871104),	// FLAT_LOAD_SSHORT_ci
    UINT64_C(3695968256),	// FLAT_LOAD_SSHORT_vi
    UINT64_C(3699638272),	// FLAT_LOAD_UBYTE_D16_HI_vi
    UINT64_C(3699376128),	// FLAT_LOAD_UBYTE_D16_vi
    UINT64_C(3693084672),	// FLAT_LOAD_UBYTE_ci
    UINT64_C(3695181824),	// FLAT_LOAD_UBYTE_vi
    UINT64_C(3693608960),	// FLAT_LOAD_USHORT_ci
    UINT64_C(3695706112),	// FLAT_LOAD_USHORT_vi
    UINT64_C(3697541120),	// FLAT_STORE_BYTE_D16_HI_vi
    UINT64_C(3697278976),	// FLAT_STORE_BYTE_ci
    UINT64_C(3697278976),	// FLAT_STORE_BYTE_vi
    UINT64_C(3698589696),	// FLAT_STORE_DWORDX2_ci
    UINT64_C(3698589696),	// FLAT_STORE_DWORDX2_vi
    UINT64_C(3699113984),	// FLAT_STORE_DWORDX3_ci
    UINT64_C(3698851840),	// FLAT_STORE_DWORDX3_vi
    UINT64_C(3698851840),	// FLAT_STORE_DWORDX4_ci
    UINT64_C(3699113984),	// FLAT_STORE_DWORDX4_vi
    UINT64_C(3698327552),	// FLAT_STORE_DWORD_ci
    UINT64_C(3698327552),	// FLAT_STORE_DWORD_vi
    UINT64_C(3698065408),	// FLAT_STORE_SHORT_D16_HI_vi
    UINT64_C(3697803264),	// FLAT_STORE_SHORT_ci
    UINT64_C(3697803264),	// FLAT_STORE_SHORT_vi
    UINT64_C(35747325750640640),	// GLOBAL_ATOMIC_ADD_RTN_vi
    UINT64_C(3708387328),	// GLOBAL_ATOMIC_ADD_SADDR_RTN_vi
    UINT64_C(3708321792),	// GLOBAL_ATOMIC_ADD_SADDR_vi
    UINT64_C(35747325759029248),	// GLOBAL_ATOMIC_ADD_X2_RTN_vi
    UINT64_C(3716775936),	// GLOBAL_ATOMIC_ADD_X2_SADDR_RTN_vi
    UINT64_C(3716710400),	// GLOBAL_ATOMIC_ADD_X2_SADDR_vi
    UINT64_C(35747325758963712),	// GLOBAL_ATOMIC_ADD_X2_vi
    UINT64_C(35747325750575104),	// GLOBAL_ATOMIC_ADD_vi
    UINT64_C(35747325752213504),	// GLOBAL_ATOMIC_AND_RTN_vi
    UINT64_C(3709960192),	// GLOBAL_ATOMIC_AND_SADDR_RTN_vi
    UINT64_C(3709894656),	// GLOBAL_ATOMIC_AND_SADDR_vi
    UINT64_C(35747325760602112),	// GLOBAL_ATOMIC_AND_X2_RTN_vi
    UINT64_C(3718348800),	// GLOBAL_ATOMIC_AND_X2_SADDR_RTN_vi
    UINT64_C(3718283264),	// GLOBAL_ATOMIC_AND_X2_SADDR_vi
    UINT64_C(35747325760536576),	// GLOBAL_ATOMIC_AND_X2_vi
    UINT64_C(35747325752147968),	// GLOBAL_ATOMIC_AND_vi
    UINT64_C(35747325750378496),	// GLOBAL_ATOMIC_CMPSWAP_RTN_vi
    UINT64_C(3708125184),	// GLOBAL_ATOMIC_CMPSWAP_SADDR_RTN_vi
    UINT64_C(3708059648),	// GLOBAL_ATOMIC_CMPSWAP_SADDR_vi
    UINT64_C(35747325758767104),	// GLOBAL_ATOMIC_CMPSWAP_X2_RTN_vi
    UINT64_C(3716513792),	// GLOBAL_ATOMIC_CMPSWAP_X2_SADDR_RTN_vi
    UINT64_C(3716448256),	// GLOBAL_ATOMIC_CMPSWAP_X2_SADDR_vi
    UINT64_C(35747325758701568),	// GLOBAL_ATOMIC_CMPSWAP_X2_vi
    UINT64_C(35747325750312960),	// GLOBAL_ATOMIC_CMPSWAP_vi
    UINT64_C(35747325753262080),	// GLOBAL_ATOMIC_DEC_RTN_vi
    UINT64_C(3711008768),	// GLOBAL_ATOMIC_DEC_SADDR_RTN_vi
    UINT64_C(3710943232),	// GLOBAL_ATOMIC_DEC_SADDR_vi
    UINT64_C(35747325761650688),	// GLOBAL_ATOMIC_DEC_X2_RTN_vi
    UINT64_C(3719397376),	// GLOBAL_ATOMIC_DEC_X2_SADDR_RTN_vi
    UINT64_C(3719331840),	// GLOBAL_ATOMIC_DEC_X2_SADDR_vi
    UINT64_C(35747325761585152),	// GLOBAL_ATOMIC_DEC_X2_vi
    UINT64_C(35747325753196544),	// GLOBAL_ATOMIC_DEC_vi
    UINT64_C(35747325752999936),	// GLOBAL_ATOMIC_INC_RTN_vi
    UINT64_C(3710746624),	// GLOBAL_ATOMIC_INC_SADDR_RTN_vi
    UINT64_C(3710681088),	// GLOBAL_ATOMIC_INC_SADDR_vi
    UINT64_C(35747325761388544),	// GLOBAL_ATOMIC_INC_X2_RTN_vi
    UINT64_C(3719135232),	// GLOBAL_ATOMIC_INC_X2_SADDR_RTN_vi
    UINT64_C(3719069696),	// GLOBAL_ATOMIC_INC_X2_SADDR_vi
    UINT64_C(35747325761323008),	// GLOBAL_ATOMIC_INC_X2_vi
    UINT64_C(35747325752934400),	// GLOBAL_ATOMIC_INC_vi
    UINT64_C(35747325752475648),	// GLOBAL_ATOMIC_OR_RTN_vi
    UINT64_C(3710222336),	// GLOBAL_ATOMIC_OR_SADDR_RTN_vi
    UINT64_C(3710156800),	// GLOBAL_ATOMIC_OR_SADDR_vi
    UINT64_C(35747325760864256),	// GLOBAL_ATOMIC_OR_X2_RTN_vi
    UINT64_C(3718610944),	// GLOBAL_ATOMIC_OR_X2_SADDR_RTN_vi
    UINT64_C(3718545408),	// GLOBAL_ATOMIC_OR_X2_SADDR_vi
    UINT64_C(35747325760798720),	// GLOBAL_ATOMIC_OR_X2_vi
    UINT64_C(35747325752410112),	// GLOBAL_ATOMIC_OR_vi
    UINT64_C(35747325751689216),	// GLOBAL_ATOMIC_SMAX_RTN_vi
    UINT64_C(3709435904),	// GLOBAL_ATOMIC_SMAX_SADDR_RTN_vi
    UINT64_C(3709370368),	// GLOBAL_ATOMIC_SMAX_SADDR_vi
    UINT64_C(35747325760077824),	// GLOBAL_ATOMIC_SMAX_X2_RTN_vi
    UINT64_C(3717824512),	// GLOBAL_ATOMIC_SMAX_X2_SADDR_RTN_vi
    UINT64_C(3717758976),	// GLOBAL_ATOMIC_SMAX_X2_SADDR_vi
    UINT64_C(35747325760012288),	// GLOBAL_ATOMIC_SMAX_X2_vi
    UINT64_C(35747325751623680),	// GLOBAL_ATOMIC_SMAX_vi
    UINT64_C(35747325751164928),	// GLOBAL_ATOMIC_SMIN_RTN_vi
    UINT64_C(3708911616),	// GLOBAL_ATOMIC_SMIN_SADDR_RTN_vi
    UINT64_C(3708846080),	// GLOBAL_ATOMIC_SMIN_SADDR_vi
    UINT64_C(35747325759553536),	// GLOBAL_ATOMIC_SMIN_X2_RTN_vi
    UINT64_C(3717300224),	// GLOBAL_ATOMIC_SMIN_X2_SADDR_RTN_vi
    UINT64_C(3717234688),	// GLOBAL_ATOMIC_SMIN_X2_SADDR_vi
    UINT64_C(35747325759488000),	// GLOBAL_ATOMIC_SMIN_X2_vi
    UINT64_C(35747325751099392),	// GLOBAL_ATOMIC_SMIN_vi
    UINT64_C(35747325750902784),	// GLOBAL_ATOMIC_SUB_RTN_vi
    UINT64_C(3708649472),	// GLOBAL_ATOMIC_SUB_SADDR_RTN_vi
    UINT64_C(3708583936),	// GLOBAL_ATOMIC_SUB_SADDR_vi
    UINT64_C(35747325759291392),	// GLOBAL_ATOMIC_SUB_X2_RTN_vi
    UINT64_C(3717038080),	// GLOBAL_ATOMIC_SUB_X2_SADDR_RTN_vi
    UINT64_C(3716972544),	// GLOBAL_ATOMIC_SUB_X2_SADDR_vi
    UINT64_C(35747325759225856),	// GLOBAL_ATOMIC_SUB_X2_vi
    UINT64_C(35747325750837248),	// GLOBAL_ATOMIC_SUB_vi
    UINT64_C(35747325750116352),	// GLOBAL_ATOMIC_SWAP_RTN_vi
    UINT64_C(3707863040),	// GLOBAL_ATOMIC_SWAP_SADDR_RTN_vi
    UINT64_C(3707797504),	// GLOBAL_ATOMIC_SWAP_SADDR_vi
    UINT64_C(35747325758504960),	// GLOBAL_ATOMIC_SWAP_X2_RTN_vi
    UINT64_C(3716251648),	// GLOBAL_ATOMIC_SWAP_X2_SADDR_RTN_vi
    UINT64_C(3716186112),	// GLOBAL_ATOMIC_SWAP_X2_SADDR_vi
    UINT64_C(35747325758439424),	// GLOBAL_ATOMIC_SWAP_X2_vi
    UINT64_C(35747325750050816),	// GLOBAL_ATOMIC_SWAP_vi
    UINT64_C(35747325751951360),	// GLOBAL_ATOMIC_UMAX_RTN_vi
    UINT64_C(3709698048),	// GLOBAL_ATOMIC_UMAX_SADDR_RTN_vi
    UINT64_C(3709632512),	// GLOBAL_ATOMIC_UMAX_SADDR_vi
    UINT64_C(35747325760339968),	// GLOBAL_ATOMIC_UMAX_X2_RTN_vi
    UINT64_C(3718086656),	// GLOBAL_ATOMIC_UMAX_X2_SADDR_RTN_vi
    UINT64_C(3718021120),	// GLOBAL_ATOMIC_UMAX_X2_SADDR_vi
    UINT64_C(35747325760274432),	// GLOBAL_ATOMIC_UMAX_X2_vi
    UINT64_C(35747325751885824),	// GLOBAL_ATOMIC_UMAX_vi
    UINT64_C(35747325751427072),	// GLOBAL_ATOMIC_UMIN_RTN_vi
    UINT64_C(3709173760),	// GLOBAL_ATOMIC_UMIN_SADDR_RTN_vi
    UINT64_C(3709108224),	// GLOBAL_ATOMIC_UMIN_SADDR_vi
    UINT64_C(35747325759815680),	// GLOBAL_ATOMIC_UMIN_X2_RTN_vi
    UINT64_C(3717562368),	// GLOBAL_ATOMIC_UMIN_X2_SADDR_RTN_vi
    UINT64_C(3717496832),	// GLOBAL_ATOMIC_UMIN_X2_SADDR_vi
    UINT64_C(35747325759750144),	// GLOBAL_ATOMIC_UMIN_X2_vi
    UINT64_C(35747325751361536),	// GLOBAL_ATOMIC_UMIN_vi
    UINT64_C(35747325752737792),	// GLOBAL_ATOMIC_XOR_RTN_vi
    UINT64_C(3710484480),	// GLOBAL_ATOMIC_XOR_SADDR_RTN_vi
    UINT64_C(3710418944),	// GLOBAL_ATOMIC_XOR_SADDR_vi
    UINT64_C(35747325761126400),	// GLOBAL_ATOMIC_XOR_X2_RTN_vi
    UINT64_C(3718873088),	// GLOBAL_ATOMIC_XOR_X2_SADDR_RTN_vi
    UINT64_C(3718807552),	// GLOBAL_ATOMIC_XOR_X2_SADDR_vi
    UINT64_C(35747325761060864),	// GLOBAL_ATOMIC_XOR_X2_vi
    UINT64_C(35747325752672256),	// GLOBAL_ATOMIC_XOR_vi
    UINT64_C(3696525312),	// GLOBAL_LOAD_DWORDX2_SADDR_vi
    UINT64_C(35747325738778624),	// GLOBAL_LOAD_DWORDX2_vi
    UINT64_C(3696787456),	// GLOBAL_LOAD_DWORDX3_SADDR_vi
    UINT64_C(35747325739040768),	// GLOBAL_LOAD_DWORDX3_vi
    UINT64_C(3697049600),	// GLOBAL_LOAD_DWORDX4_SADDR_vi
    UINT64_C(35747325739302912),	// GLOBAL_LOAD_DWORDX4_vi
    UINT64_C(3696263168),	// GLOBAL_LOAD_DWORD_SADDR_vi
    UINT64_C(35747325738516480),	// GLOBAL_LOAD_DWORD_vi
    UINT64_C(3700195328),	// GLOBAL_LOAD_SBYTE_D16_HI_SADDR_vi
    UINT64_C(35747325742448640),	// GLOBAL_LOAD_SBYTE_D16_HI_vi
    UINT64_C(3699933184),	// GLOBAL_LOAD_SBYTE_D16_SADDR_vi
    UINT64_C(35747325742186496),	// GLOBAL_LOAD_SBYTE_D16_vi
    UINT64_C(3695476736),	// GLOBAL_LOAD_SBYTE_SADDR_vi
    UINT64_C(35747325737730048),	// GLOBAL_LOAD_SBYTE_vi
    UINT64_C(3700719616),	// GLOBAL_LOAD_SHORT_D16_HI_SADDR_vi
    UINT64_C(35747325742972928),	// GLOBAL_LOAD_SHORT_D16_HI_vi
    UINT64_C(3700457472),	// GLOBAL_LOAD_SHORT_D16_SADDR_vi
    UINT64_C(35747325742710784),	// GLOBAL_LOAD_SHORT_D16_vi
    UINT64_C(3696001024),	// GLOBAL_LOAD_SSHORT_SADDR_vi
    UINT64_C(35747325738254336),	// GLOBAL_LOAD_SSHORT_vi
    UINT64_C(3699671040),	// GLOBAL_LOAD_UBYTE_D16_HI_SADDR_vi
    UINT64_C(35747325741924352),	// GLOBAL_LOAD_UBYTE_D16_HI_vi
    UINT64_C(3699408896),	// GLOBAL_LOAD_UBYTE_D16_SADDR_vi
    UINT64_C(35747325741662208),	// GLOBAL_LOAD_UBYTE_D16_vi
    UINT64_C(3695214592),	// GLOBAL_LOAD_UBYTE_SADDR_vi
    UINT64_C(35747325737467904),	// GLOBAL_LOAD_UBYTE_vi
    UINT64_C(3695738880),	// GLOBAL_LOAD_USHORT_SADDR_vi
    UINT64_C(35747325737992192),	// GLOBAL_LOAD_USHORT_vi
    UINT64_C(3697573888),	// GLOBAL_STORE_BYTE_D16_HI_SADDR_vi
    UINT64_C(35747325739827200),	// GLOBAL_STORE_BYTE_D16_HI_vi
    UINT64_C(3697311744),	// GLOBAL_STORE_BYTE_SADDR_vi
    UINT64_C(35747325739565056),	// GLOBAL_STORE_BYTE_vi
    UINT64_C(3698622464),	// GLOBAL_STORE_DWORDX2_SADDR_vi
    UINT64_C(35747325740875776),	// GLOBAL_STORE_DWORDX2_vi
    UINT64_C(3698884608),	// GLOBAL_STORE_DWORDX3_SADDR_vi
    UINT64_C(35747325741137920),	// GLOBAL_STORE_DWORDX3_vi
    UINT64_C(3699146752),	// GLOBAL_STORE_DWORDX4_SADDR_vi
    UINT64_C(35747325741400064),	// GLOBAL_STORE_DWORDX4_vi
    UINT64_C(3698360320),	// GLOBAL_STORE_DWORD_SADDR_vi
    UINT64_C(35747325740613632),	// GLOBAL_STORE_DWORD_vi
    UINT64_C(3698098176),	// GLOBAL_STORE_SHORT_D16_HI_SADDR_vi
    UINT64_C(35747325740351488),	// GLOBAL_STORE_SHORT_D16_HI_vi
    UINT64_C(3697836032),	// GLOBAL_STORE_SHORT_SADDR_vi
    UINT64_C(35747325740089344),	// GLOBAL_STORE_SHORT_vi
    UINT64_C(4030988288),	// IMAGE_ATOMIC_ADD_V1_V1_si
    UINT64_C(4031250432),	// IMAGE_ATOMIC_ADD_V1_V1_vi
    UINT64_C(4030988288),	// IMAGE_ATOMIC_ADD_V1_V2_si
    UINT64_C(4031250432),	// IMAGE_ATOMIC_ADD_V1_V2_vi
    UINT64_C(4030988288),	// IMAGE_ATOMIC_ADD_V1_V3_si
    UINT64_C(4031250432),	// IMAGE_ATOMIC_ADD_V1_V3_vi
    UINT64_C(4030988288),	// IMAGE_ATOMIC_ADD_V1_V4_si
    UINT64_C(4031250432),	// IMAGE_ATOMIC_ADD_V1_V4_vi
    UINT64_C(4030988288),	// IMAGE_ATOMIC_ADD_V2_V1_si
    UINT64_C(4031250432),	// IMAGE_ATOMIC_ADD_V2_V1_vi
    UINT64_C(4030988288),	// IMAGE_ATOMIC_ADD_V2_V2_si
    UINT64_C(4031250432),	// IMAGE_ATOMIC_ADD_V2_V2_vi
    UINT64_C(4030988288),	// IMAGE_ATOMIC_ADD_V2_V3_si
    UINT64_C(4031250432),	// IMAGE_ATOMIC_ADD_V2_V3_vi
    UINT64_C(4030988288),	// IMAGE_ATOMIC_ADD_V2_V4_si
    UINT64_C(4031250432),	// IMAGE_ATOMIC_ADD_V2_V4_vi
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V1_V1_si
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V1_V1_vi
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V1_V2_si
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V1_V2_vi
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V1_V3_si
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V1_V3_vi
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V1_V4_si
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V1_V4_vi
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V2_V1_si
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V2_V1_vi
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V2_V2_si
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V2_V2_vi
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V2_V3_si
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V2_V3_vi
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V2_V4_si
    UINT64_C(4032823296),	// IMAGE_ATOMIC_AND_V2_V4_vi
    UINT64_C(4030726144),	// IMAGE_ATOMIC_CMPSWAP_V1_V1_si
    UINT64_C(4030988288),	// IMAGE_ATOMIC_CMPSWAP_V1_V1_vi
    UINT64_C(4030726144),	// IMAGE_ATOMIC_CMPSWAP_V1_V2_si
    UINT64_C(4030988288),	// IMAGE_ATOMIC_CMPSWAP_V1_V2_vi
    UINT64_C(4030726144),	// IMAGE_ATOMIC_CMPSWAP_V1_V3_si
    UINT64_C(4030988288),	// IMAGE_ATOMIC_CMPSWAP_V1_V3_vi
    UINT64_C(4030726144),	// IMAGE_ATOMIC_CMPSWAP_V1_V4_si
    UINT64_C(4030988288),	// IMAGE_ATOMIC_CMPSWAP_V1_V4_vi
    UINT64_C(4030726144),	// IMAGE_ATOMIC_CMPSWAP_V2_V1_si
    UINT64_C(4030988288),	// IMAGE_ATOMIC_CMPSWAP_V2_V1_vi
    UINT64_C(4030726144),	// IMAGE_ATOMIC_CMPSWAP_V2_V2_si
    UINT64_C(4030988288),	// IMAGE_ATOMIC_CMPSWAP_V2_V2_vi
    UINT64_C(4030726144),	// IMAGE_ATOMIC_CMPSWAP_V2_V3_si
    UINT64_C(4030988288),	// IMAGE_ATOMIC_CMPSWAP_V2_V3_vi
    UINT64_C(4030726144),	// IMAGE_ATOMIC_CMPSWAP_V2_V4_si
    UINT64_C(4030988288),	// IMAGE_ATOMIC_CMPSWAP_V2_V4_vi
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V1_V1_si
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V1_V1_vi
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V1_V2_si
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V1_V2_vi
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V1_V3_si
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V1_V3_vi
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V1_V4_si
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V1_V4_vi
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V2_V1_si
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V2_V1_vi
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V2_V2_si
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V2_V2_vi
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V2_V3_si
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V2_V3_vi
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V2_V4_si
    UINT64_C(4033871872),	// IMAGE_ATOMIC_DEC_V2_V4_vi
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V1_V1_si
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V1_V1_vi
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V1_V2_si
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V1_V2_vi
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V1_V3_si
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V1_V3_vi
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V1_V4_si
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V1_V4_vi
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V2_V1_si
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V2_V1_vi
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V2_V2_si
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V2_V2_vi
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V2_V3_si
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V2_V3_vi
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V2_V4_si
    UINT64_C(4033609728),	// IMAGE_ATOMIC_INC_V2_V4_vi
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V1_V1_si
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V1_V1_vi
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V1_V2_si
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V1_V2_vi
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V1_V3_si
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V1_V3_vi
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V1_V4_si
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V1_V4_vi
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V2_V1_si
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V2_V1_vi
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V2_V2_si
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V2_V2_vi
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V2_V3_si
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V2_V3_vi
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V2_V4_si
    UINT64_C(4033085440),	// IMAGE_ATOMIC_OR_V2_V4_vi
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V1_V1_si
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V1_V1_vi
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V1_V2_si
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V1_V2_vi
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V1_V3_si
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V1_V3_vi
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V1_V4_si
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V1_V4_vi
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V2_V1_si
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V2_V1_vi
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V2_V2_si
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V2_V2_vi
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V2_V3_si
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V2_V3_vi
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V2_V4_si
    UINT64_C(4032299008),	// IMAGE_ATOMIC_SMAX_V2_V4_vi
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V1_V1_si
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V1_V1_vi
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V1_V2_si
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V1_V2_vi
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V1_V3_si
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V1_V3_vi
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V1_V4_si
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V1_V4_vi
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V2_V1_si
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V2_V1_vi
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V2_V2_si
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V2_V2_vi
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V2_V3_si
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V2_V3_vi
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V2_V4_si
    UINT64_C(4031774720),	// IMAGE_ATOMIC_SMIN_V2_V4_vi
    UINT64_C(4031250432),	// IMAGE_ATOMIC_SUB_V1_V1_si
    UINT64_C(4031512576),	// IMAGE_ATOMIC_SUB_V1_V1_vi
    UINT64_C(4031250432),	// IMAGE_ATOMIC_SUB_V1_V2_si
    UINT64_C(4031512576),	// IMAGE_ATOMIC_SUB_V1_V2_vi
    UINT64_C(4031250432),	// IMAGE_ATOMIC_SUB_V1_V3_si
    UINT64_C(4031512576),	// IMAGE_ATOMIC_SUB_V1_V3_vi
    UINT64_C(4031250432),	// IMAGE_ATOMIC_SUB_V1_V4_si
    UINT64_C(4031512576),	// IMAGE_ATOMIC_SUB_V1_V4_vi
    UINT64_C(4031250432),	// IMAGE_ATOMIC_SUB_V2_V1_si
    UINT64_C(4031512576),	// IMAGE_ATOMIC_SUB_V2_V1_vi
    UINT64_C(4031250432),	// IMAGE_ATOMIC_SUB_V2_V2_si
    UINT64_C(4031512576),	// IMAGE_ATOMIC_SUB_V2_V2_vi
    UINT64_C(4031250432),	// IMAGE_ATOMIC_SUB_V2_V3_si
    UINT64_C(4031512576),	// IMAGE_ATOMIC_SUB_V2_V3_vi
    UINT64_C(4031250432),	// IMAGE_ATOMIC_SUB_V2_V4_si
    UINT64_C(4031512576),	// IMAGE_ATOMIC_SUB_V2_V4_vi
    UINT64_C(4030464000),	// IMAGE_ATOMIC_SWAP_V1_V1_si
    UINT64_C(4030726144),	// IMAGE_ATOMIC_SWAP_V1_V1_vi
    UINT64_C(4030464000),	// IMAGE_ATOMIC_SWAP_V1_V2_si
    UINT64_C(4030726144),	// IMAGE_ATOMIC_SWAP_V1_V2_vi
    UINT64_C(4030464000),	// IMAGE_ATOMIC_SWAP_V1_V3_si
    UINT64_C(4030726144),	// IMAGE_ATOMIC_SWAP_V1_V3_vi
    UINT64_C(4030464000),	// IMAGE_ATOMIC_SWAP_V1_V4_si
    UINT64_C(4030726144),	// IMAGE_ATOMIC_SWAP_V1_V4_vi
    UINT64_C(4030464000),	// IMAGE_ATOMIC_SWAP_V2_V1_si
    UINT64_C(4030726144),	// IMAGE_ATOMIC_SWAP_V2_V1_vi
    UINT64_C(4030464000),	// IMAGE_ATOMIC_SWAP_V2_V2_si
    UINT64_C(4030726144),	// IMAGE_ATOMIC_SWAP_V2_V2_vi
    UINT64_C(4030464000),	// IMAGE_ATOMIC_SWAP_V2_V3_si
    UINT64_C(4030726144),	// IMAGE_ATOMIC_SWAP_V2_V3_vi
    UINT64_C(4030464000),	// IMAGE_ATOMIC_SWAP_V2_V4_si
    UINT64_C(4030726144),	// IMAGE_ATOMIC_SWAP_V2_V4_vi
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V1_V1_si
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V1_V1_vi
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V1_V2_si
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V1_V2_vi
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V1_V3_si
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V1_V3_vi
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V1_V4_si
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V1_V4_vi
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V2_V1_si
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V2_V1_vi
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V2_V2_si
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V2_V2_vi
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V2_V3_si
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V2_V3_vi
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V2_V4_si
    UINT64_C(4032561152),	// IMAGE_ATOMIC_UMAX_V2_V4_vi
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V1_V1_si
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V1_V1_vi
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V1_V2_si
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V1_V2_vi
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V1_V3_si
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V1_V3_vi
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V1_V4_si
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V1_V4_vi
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V2_V1_si
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V2_V1_vi
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V2_V2_si
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V2_V2_vi
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V2_V3_si
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V2_V3_vi
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V2_V4_si
    UINT64_C(4032036864),	// IMAGE_ATOMIC_UMIN_V2_V4_vi
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V1_V1_si
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V1_V1_vi
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V1_V2_si
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V1_V2_vi
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V1_V3_si
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V1_V3_vi
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V1_V4_si
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V1_V4_vi
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V2_V1_si
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V2_V1_vi
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V2_V2_si
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V2_V2_vi
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V2_V3_si
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V2_V3_vi
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V2_V4_si
    UINT64_C(4033347584),	// IMAGE_ATOMIC_XOR_V2_V4_vi
    UINT64_C(4049076224),	// IMAGE_GATHER4_B_CL_O_V2_V3
    UINT64_C(4049076224),	// IMAGE_GATHER4_B_CL_O_V2_V4
    UINT64_C(4049076224),	// IMAGE_GATHER4_B_CL_O_V2_V8
    UINT64_C(4049076224),	// IMAGE_GATHER4_B_CL_O_V4_V3
    UINT64_C(4049076224),	// IMAGE_GATHER4_B_CL_O_V4_V4
    UINT64_C(4049076224),	// IMAGE_GATHER4_B_CL_O_V4_V8
    UINT64_C(4049076224),	// IMAGE_GATHER4_B_CL_O_V8_V3
    UINT64_C(4049076224),	// IMAGE_GATHER4_B_CL_O_V8_V4
    UINT64_C(4049076224),	// IMAGE_GATHER4_B_CL_O_V8_V8
    UINT64_C(4044881920),	// IMAGE_GATHER4_B_CL_V2_V2
    UINT64_C(4044881920),	// IMAGE_GATHER4_B_CL_V2_V3
    UINT64_C(4044881920),	// IMAGE_GATHER4_B_CL_V2_V4
    UINT64_C(4044881920),	// IMAGE_GATHER4_B_CL_V2_V8
    UINT64_C(4044881920),	// IMAGE_GATHER4_B_CL_V4_V2
    UINT64_C(4044881920),	// IMAGE_GATHER4_B_CL_V4_V3
    UINT64_C(4044881920),	// IMAGE_GATHER4_B_CL_V4_V4
    UINT64_C(4044881920),	// IMAGE_GATHER4_B_CL_V4_V8
    UINT64_C(4044881920),	// IMAGE_GATHER4_B_CL_V8_V2
    UINT64_C(4044881920),	// IMAGE_GATHER4_B_CL_V8_V3
    UINT64_C(4044881920),	// IMAGE_GATHER4_B_CL_V8_V4
    UINT64_C(4044881920),	// IMAGE_GATHER4_B_CL_V8_V8
    UINT64_C(4048814080),	// IMAGE_GATHER4_B_O_V2_V3
    UINT64_C(4048814080),	// IMAGE_GATHER4_B_O_V2_V4
    UINT64_C(4048814080),	// IMAGE_GATHER4_B_O_V2_V8
    UINT64_C(4048814080),	// IMAGE_GATHER4_B_O_V4_V3
    UINT64_C(4048814080),	// IMAGE_GATHER4_B_O_V4_V4
    UINT64_C(4048814080),	// IMAGE_GATHER4_B_O_V4_V8
    UINT64_C(4048814080),	// IMAGE_GATHER4_B_O_V8_V3
    UINT64_C(4048814080),	// IMAGE_GATHER4_B_O_V8_V4
    UINT64_C(4048814080),	// IMAGE_GATHER4_B_O_V8_V8
    UINT64_C(4044619776),	// IMAGE_GATHER4_B_V2_V2
    UINT64_C(4044619776),	// IMAGE_GATHER4_B_V2_V3
    UINT64_C(4044619776),	// IMAGE_GATHER4_B_V2_V4
    UINT64_C(4044619776),	// IMAGE_GATHER4_B_V4_V2
    UINT64_C(4044619776),	// IMAGE_GATHER4_B_V4_V3
    UINT64_C(4044619776),	// IMAGE_GATHER4_B_V4_V4
    UINT64_C(4044619776),	// IMAGE_GATHER4_B_V8_V2
    UINT64_C(4044619776),	// IMAGE_GATHER4_B_V8_V3
    UINT64_C(4044619776),	// IMAGE_GATHER4_B_V8_V4
    UINT64_C(4047765504),	// IMAGE_GATHER4_CL_O_V2_V2
    UINT64_C(4047765504),	// IMAGE_GATHER4_CL_O_V2_V3
    UINT64_C(4047765504),	// IMAGE_GATHER4_CL_O_V2_V4
    UINT64_C(4047765504),	// IMAGE_GATHER4_CL_O_V2_V8
    UINT64_C(4047765504),	// IMAGE_GATHER4_CL_O_V4_V2
    UINT64_C(4047765504),	// IMAGE_GATHER4_CL_O_V4_V3
    UINT64_C(4047765504),	// IMAGE_GATHER4_CL_O_V4_V4
    UINT64_C(4047765504),	// IMAGE_GATHER4_CL_O_V4_V8
    UINT64_C(4047765504),	// IMAGE_GATHER4_CL_O_V8_V2
    UINT64_C(4047765504),	// IMAGE_GATHER4_CL_O_V8_V3
    UINT64_C(4047765504),	// IMAGE_GATHER4_CL_O_V8_V4
    UINT64_C(4047765504),	// IMAGE_GATHER4_CL_O_V8_V8
    UINT64_C(4043571200),	// IMAGE_GATHER4_CL_V2_V1
    UINT64_C(4043571200),	// IMAGE_GATHER4_CL_V2_V2
    UINT64_C(4043571200),	// IMAGE_GATHER4_CL_V2_V3
    UINT64_C(4043571200),	// IMAGE_GATHER4_CL_V2_V4
    UINT64_C(4043571200),	// IMAGE_GATHER4_CL_V4_V1
    UINT64_C(4043571200),	// IMAGE_GATHER4_CL_V4_V2
    UINT64_C(4043571200),	// IMAGE_GATHER4_CL_V4_V3
    UINT64_C(4043571200),	// IMAGE_GATHER4_CL_V4_V4
    UINT64_C(4043571200),	// IMAGE_GATHER4_CL_V8_V1
    UINT64_C(4043571200),	// IMAGE_GATHER4_CL_V8_V2
    UINT64_C(4043571200),	// IMAGE_GATHER4_CL_V8_V3
    UINT64_C(4043571200),	// IMAGE_GATHER4_CL_V8_V4
    UINT64_C(4051173376),	// IMAGE_GATHER4_C_B_CL_O_V2_V4
    UINT64_C(4051173376),	// IMAGE_GATHER4_C_B_CL_O_V2_V8
    UINT64_C(4051173376),	// IMAGE_GATHER4_C_B_CL_O_V4_V4
    UINT64_C(4051173376),	// IMAGE_GATHER4_C_B_CL_O_V4_V8
    UINT64_C(4051173376),	// IMAGE_GATHER4_C_B_CL_O_V8_V4
    UINT64_C(4051173376),	// IMAGE_GATHER4_C_B_CL_O_V8_V8
    UINT64_C(4046979072),	// IMAGE_GATHER4_C_B_CL_V2_V3
    UINT64_C(4046979072),	// IMAGE_GATHER4_C_B_CL_V2_V4
    UINT64_C(4046979072),	// IMAGE_GATHER4_C_B_CL_V2_V8
    UINT64_C(4046979072),	// IMAGE_GATHER4_C_B_CL_V4_V3
    UINT64_C(4046979072),	// IMAGE_GATHER4_C_B_CL_V4_V4
    UINT64_C(4046979072),	// IMAGE_GATHER4_C_B_CL_V4_V8
    UINT64_C(4046979072),	// IMAGE_GATHER4_C_B_CL_V8_V3
    UINT64_C(4046979072),	// IMAGE_GATHER4_C_B_CL_V8_V4
    UINT64_C(4046979072),	// IMAGE_GATHER4_C_B_CL_V8_V8
    UINT64_C(4050911232),	// IMAGE_GATHER4_C_B_O_V2_V4
    UINT64_C(4050911232),	// IMAGE_GATHER4_C_B_O_V2_V8
    UINT64_C(4050911232),	// IMAGE_GATHER4_C_B_O_V4_V4
    UINT64_C(4050911232),	// IMAGE_GATHER4_C_B_O_V4_V8
    UINT64_C(4050911232),	// IMAGE_GATHER4_C_B_O_V8_V4
    UINT64_C(4050911232),	// IMAGE_GATHER4_C_B_O_V8_V8
    UINT64_C(4046716928),	// IMAGE_GATHER4_C_B_V2_V3
    UINT64_C(4046716928),	// IMAGE_GATHER4_C_B_V2_V4
    UINT64_C(4046716928),	// IMAGE_GATHER4_C_B_V2_V8
    UINT64_C(4046716928),	// IMAGE_GATHER4_C_B_V4_V3
    UINT64_C(4046716928),	// IMAGE_GATHER4_C_B_V4_V4
    UINT64_C(4046716928),	// IMAGE_GATHER4_C_B_V4_V8
    UINT64_C(4046716928),	// IMAGE_GATHER4_C_B_V8_V3
    UINT64_C(4046716928),	// IMAGE_GATHER4_C_B_V8_V4
    UINT64_C(4046716928),	// IMAGE_GATHER4_C_B_V8_V8
    UINT64_C(4049862656),	// IMAGE_GATHER4_C_CL_O_V2_V3
    UINT64_C(4049862656),	// IMAGE_GATHER4_C_CL_O_V2_V4
    UINT64_C(4049862656),	// IMAGE_GATHER4_C_CL_O_V2_V8
    UINT64_C(4049862656),	// IMAGE_GATHER4_C_CL_O_V4_V3
    UINT64_C(4049862656),	// IMAGE_GATHER4_C_CL_O_V4_V4
    UINT64_C(4049862656),	// IMAGE_GATHER4_C_CL_O_V4_V8
    UINT64_C(4049862656),	// IMAGE_GATHER4_C_CL_O_V8_V3
    UINT64_C(4049862656),	// IMAGE_GATHER4_C_CL_O_V8_V4
    UINT64_C(4049862656),	// IMAGE_GATHER4_C_CL_O_V8_V8
    UINT64_C(4045668352),	// IMAGE_GATHER4_C_CL_V2_V2
    UINT64_C(4045668352),	// IMAGE_GATHER4_C_CL_V2_V3
    UINT64_C(4045668352),	// IMAGE_GATHER4_C_CL_V2_V4
    UINT64_C(4045668352),	// IMAGE_GATHER4_C_CL_V2_V8
    UINT64_C(4045668352),	// IMAGE_GATHER4_C_CL_V4_V2
    UINT64_C(4045668352),	// IMAGE_GATHER4_C_CL_V4_V3
    UINT64_C(4045668352),	// IMAGE_GATHER4_C_CL_V4_V4
    UINT64_C(4045668352),	// IMAGE_GATHER4_C_CL_V4_V8
    UINT64_C(4045668352),	// IMAGE_GATHER4_C_CL_V8_V2
    UINT64_C(4045668352),	// IMAGE_GATHER4_C_CL_V8_V3
    UINT64_C(4045668352),	// IMAGE_GATHER4_C_CL_V8_V4
    UINT64_C(4045668352),	// IMAGE_GATHER4_C_CL_V8_V8
    UINT64_C(4051435520),	// IMAGE_GATHER4_C_LZ_O_V2_V3
    UINT64_C(4051435520),	// IMAGE_GATHER4_C_LZ_O_V2_V4
    UINT64_C(4051435520),	// IMAGE_GATHER4_C_LZ_O_V2_V8
    UINT64_C(4051435520),	// IMAGE_GATHER4_C_LZ_O_V4_V3
    UINT64_C(4051435520),	// IMAGE_GATHER4_C_LZ_O_V4_V4
    UINT64_C(4051435520),	// IMAGE_GATHER4_C_LZ_O_V4_V8
    UINT64_C(4051435520),	// IMAGE_GATHER4_C_LZ_O_V8_V3
    UINT64_C(4051435520),	// IMAGE_GATHER4_C_LZ_O_V8_V4
    UINT64_C(4051435520),	// IMAGE_GATHER4_C_LZ_O_V8_V8
    UINT64_C(4047241216),	// IMAGE_GATHER4_C_LZ_V2_V2
    UINT64_C(4047241216),	// IMAGE_GATHER4_C_LZ_V2_V3
    UINT64_C(4047241216),	// IMAGE_GATHER4_C_LZ_V2_V4
    UINT64_C(4047241216),	// IMAGE_GATHER4_C_LZ_V4_V2
    UINT64_C(4047241216),	// IMAGE_GATHER4_C_LZ_V4_V3
    UINT64_C(4047241216),	// IMAGE_GATHER4_C_LZ_V4_V4
    UINT64_C(4047241216),	// IMAGE_GATHER4_C_LZ_V8_V2
    UINT64_C(4047241216),	// IMAGE_GATHER4_C_LZ_V8_V3
    UINT64_C(4047241216),	// IMAGE_GATHER4_C_LZ_V8_V4
    UINT64_C(4050649088),	// IMAGE_GATHER4_C_L_O_V2_V3
    UINT64_C(4050649088),	// IMAGE_GATHER4_C_L_O_V2_V4
    UINT64_C(4050649088),	// IMAGE_GATHER4_C_L_O_V2_V8
    UINT64_C(4050649088),	// IMAGE_GATHER4_C_L_O_V4_V3
    UINT64_C(4050649088),	// IMAGE_GATHER4_C_L_O_V4_V4
    UINT64_C(4050649088),	// IMAGE_GATHER4_C_L_O_V4_V8
    UINT64_C(4050649088),	// IMAGE_GATHER4_C_L_O_V8_V3
    UINT64_C(4050649088),	// IMAGE_GATHER4_C_L_O_V8_V4
    UINT64_C(4050649088),	// IMAGE_GATHER4_C_L_O_V8_V8
    UINT64_C(4046454784),	// IMAGE_GATHER4_C_L_V2_V2
    UINT64_C(4046454784),	// IMAGE_GATHER4_C_L_V2_V3
    UINT64_C(4046454784),	// IMAGE_GATHER4_C_L_V2_V4
    UINT64_C(4046454784),	// IMAGE_GATHER4_C_L_V2_V8
    UINT64_C(4046454784),	// IMAGE_GATHER4_C_L_V4_V2
    UINT64_C(4046454784),	// IMAGE_GATHER4_C_L_V4_V3
    UINT64_C(4046454784),	// IMAGE_GATHER4_C_L_V4_V4
    UINT64_C(4046454784),	// IMAGE_GATHER4_C_L_V4_V8
    UINT64_C(4046454784),	// IMAGE_GATHER4_C_L_V8_V2
    UINT64_C(4046454784),	// IMAGE_GATHER4_C_L_V8_V3
    UINT64_C(4046454784),	// IMAGE_GATHER4_C_L_V8_V4
    UINT64_C(4046454784),	// IMAGE_GATHER4_C_L_V8_V8
    UINT64_C(4049600512),	// IMAGE_GATHER4_C_O_V2_V3
    UINT64_C(4049600512),	// IMAGE_GATHER4_C_O_V2_V4
    UINT64_C(4049600512),	// IMAGE_GATHER4_C_O_V2_V8
    UINT64_C(4049600512),	// IMAGE_GATHER4_C_O_V4_V3
    UINT64_C(4049600512),	// IMAGE_GATHER4_C_O_V4_V4
    UINT64_C(4049600512),	// IMAGE_GATHER4_C_O_V4_V8
    UINT64_C(4049600512),	// IMAGE_GATHER4_C_O_V8_V3
    UINT64_C(4049600512),	// IMAGE_GATHER4_C_O_V8_V4
    UINT64_C(4049600512),	// IMAGE_GATHER4_C_O_V8_V8
    UINT64_C(4045406208),	// IMAGE_GATHER4_C_V2_V2
    UINT64_C(4045406208),	// IMAGE_GATHER4_C_V2_V3
    UINT64_C(4045406208),	// IMAGE_GATHER4_C_V2_V4
    UINT64_C(4045406208),	// IMAGE_GATHER4_C_V4_V2
    UINT64_C(4045406208),	// IMAGE_GATHER4_C_V4_V3
    UINT64_C(4045406208),	// IMAGE_GATHER4_C_V4_V4
    UINT64_C(4045406208),	// IMAGE_GATHER4_C_V8_V2
    UINT64_C(4045406208),	// IMAGE_GATHER4_C_V8_V3
    UINT64_C(4045406208),	// IMAGE_GATHER4_C_V8_V4
    UINT64_C(4049338368),	// IMAGE_GATHER4_LZ_O_V2_V2
    UINT64_C(4049338368),	// IMAGE_GATHER4_LZ_O_V2_V3
    UINT64_C(4049338368),	// IMAGE_GATHER4_LZ_O_V2_V4
    UINT64_C(4049338368),	// IMAGE_GATHER4_LZ_O_V4_V2
    UINT64_C(4049338368),	// IMAGE_GATHER4_LZ_O_V4_V3
    UINT64_C(4049338368),	// IMAGE_GATHER4_LZ_O_V4_V4
    UINT64_C(4049338368),	// IMAGE_GATHER4_LZ_O_V8_V2
    UINT64_C(4049338368),	// IMAGE_GATHER4_LZ_O_V8_V3
    UINT64_C(4049338368),	// IMAGE_GATHER4_LZ_O_V8_V4
    UINT64_C(4045144064),	// IMAGE_GATHER4_LZ_V2_V1
    UINT64_C(4045144064),	// IMAGE_GATHER4_LZ_V2_V2
    UINT64_C(4045144064),	// IMAGE_GATHER4_LZ_V2_V3
    UINT64_C(4045144064),	// IMAGE_GATHER4_LZ_V2_V4
    UINT64_C(4045144064),	// IMAGE_GATHER4_LZ_V4_V1
    UINT64_C(4045144064),	// IMAGE_GATHER4_LZ_V4_V2
    UINT64_C(4045144064),	// IMAGE_GATHER4_LZ_V4_V3
    UINT64_C(4045144064),	// IMAGE_GATHER4_LZ_V4_V4
    UINT64_C(4045144064),	// IMAGE_GATHER4_LZ_V8_V1
    UINT64_C(4045144064),	// IMAGE_GATHER4_LZ_V8_V2
    UINT64_C(4045144064),	// IMAGE_GATHER4_LZ_V8_V3
    UINT64_C(4045144064),	// IMAGE_GATHER4_LZ_V8_V4
    UINT64_C(4048551936),	// IMAGE_GATHER4_L_O_V2_V2
    UINT64_C(4048551936),	// IMAGE_GATHER4_L_O_V2_V3
    UINT64_C(4048551936),	// IMAGE_GATHER4_L_O_V2_V4
    UINT64_C(4048551936),	// IMAGE_GATHER4_L_O_V2_V8
    UINT64_C(4048551936),	// IMAGE_GATHER4_L_O_V4_V2
    UINT64_C(4048551936),	// IMAGE_GATHER4_L_O_V4_V3
    UINT64_C(4048551936),	// IMAGE_GATHER4_L_O_V4_V4
    UINT64_C(4048551936),	// IMAGE_GATHER4_L_O_V4_V8
    UINT64_C(4048551936),	// IMAGE_GATHER4_L_O_V8_V2
    UINT64_C(4048551936),	// IMAGE_GATHER4_L_O_V8_V3
    UINT64_C(4048551936),	// IMAGE_GATHER4_L_O_V8_V4
    UINT64_C(4048551936),	// IMAGE_GATHER4_L_O_V8_V8
    UINT64_C(4044357632),	// IMAGE_GATHER4_L_V2_V1
    UINT64_C(4044357632),	// IMAGE_GATHER4_L_V2_V2
    UINT64_C(4044357632),	// IMAGE_GATHER4_L_V2_V3
    UINT64_C(4044357632),	// IMAGE_GATHER4_L_V2_V4
    UINT64_C(4044357632),	// IMAGE_GATHER4_L_V4_V1
    UINT64_C(4044357632),	// IMAGE_GATHER4_L_V4_V2
    UINT64_C(4044357632),	// IMAGE_GATHER4_L_V4_V3
    UINT64_C(4044357632),	// IMAGE_GATHER4_L_V4_V4
    UINT64_C(4044357632),	// IMAGE_GATHER4_L_V8_V1
    UINT64_C(4044357632),	// IMAGE_GATHER4_L_V8_V2
    UINT64_C(4044357632),	// IMAGE_GATHER4_L_V8_V3
    UINT64_C(4044357632),	// IMAGE_GATHER4_L_V8_V4
    UINT64_C(4047503360),	// IMAGE_GATHER4_O_V2_V2
    UINT64_C(4047503360),	// IMAGE_GATHER4_O_V2_V3
    UINT64_C(4047503360),	// IMAGE_GATHER4_O_V2_V4
    UINT64_C(4047503360),	// IMAGE_GATHER4_O_V4_V2
    UINT64_C(4047503360),	// IMAGE_GATHER4_O_V4_V3
    UINT64_C(4047503360),	// IMAGE_GATHER4_O_V4_V4
    UINT64_C(4047503360),	// IMAGE_GATHER4_O_V8_V2
    UINT64_C(4047503360),	// IMAGE_GATHER4_O_V8_V3
    UINT64_C(4047503360),	// IMAGE_GATHER4_O_V8_V4
    UINT64_C(4043309056),	// IMAGE_GATHER4_V2_V1
    UINT64_C(4043309056),	// IMAGE_GATHER4_V2_V2
    UINT64_C(4043309056),	// IMAGE_GATHER4_V2_V3
    UINT64_C(4043309056),	// IMAGE_GATHER4_V2_V4
    UINT64_C(4043309056),	// IMAGE_GATHER4_V4_V1
    UINT64_C(4043309056),	// IMAGE_GATHER4_V4_V2
    UINT64_C(4043309056),	// IMAGE_GATHER4_V4_V3
    UINT64_C(4043309056),	// IMAGE_GATHER4_V4_V4
    UINT64_C(4043309056),	// IMAGE_GATHER4_V8_V1
    UINT64_C(4043309056),	// IMAGE_GATHER4_V8_V2
    UINT64_C(4043309056),	// IMAGE_GATHER4_V8_V3
    UINT64_C(4043309056),	// IMAGE_GATHER4_V8_V4
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V1_V1
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V1_V2
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V1_V3
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V1_V4
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V2_V1
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V2_V2
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V2_V3
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V2_V4
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V3_V1
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V3_V2
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V3_V3
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V3_V4
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V4_V1
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V4_V2
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V4_V3
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V4_V4
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V8_V1
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V8_V2
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V8_V3
    UINT64_C(4051697664),	// IMAGE_GET_LOD_V8_V4
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V1_V1
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V1_V2
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V1_V3
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V1_V4
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V2_V1
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V2_V2
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V2_V3
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V2_V4
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V3_V1
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V3_V2
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V3_V3
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V3_V4
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V4_V1
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V4_V2
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V4_V3
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V4_V4
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V8_V1
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V8_V2
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V8_V3
    UINT64_C(4030201856),	// IMAGE_GET_RESINFO_V8_V4
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V1_V1
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V1_V2
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V1_V3
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V1_V4
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V2_V1
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V2_V2
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V2_V3
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V2_V4
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V3_V1
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V3_V2
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V3_V3
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V3_V4
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V4_V1
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V4_V2
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V4_V3
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V4_V4
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V8_V1
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V8_V2
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V8_V3
    UINT64_C(4027842560),	// IMAGE_LOAD_MIP_PCK_SGN_V8_V4
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V1_V1
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V1_V2
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V1_V3
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V1_V4
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V2_V1
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V2_V2
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V2_V3
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V2_V4
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V3_V1
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V3_V2
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V3_V3
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V3_V4
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V4_V1
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V4_V2
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V4_V3
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V4_V4
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V8_V1
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V8_V2
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V8_V3
    UINT64_C(4027580416),	// IMAGE_LOAD_MIP_PCK_V8_V4
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V1_V1
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V1_V2
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V1_V3
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V1_V4
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V2_V1
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V2_V2
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V2_V3
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V2_V4
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V3_V1
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V3_V2
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V3_V3
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V3_V4
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V4_V1
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V4_V2
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V4_V3
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V4_V4
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V8_V1
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V8_V2
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V8_V3
    UINT64_C(4026793984),	// IMAGE_LOAD_MIP_V8_V4
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V1_V1
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V1_V2
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V1_V3
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V1_V4
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V2_V1
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V2_V2
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V2_V3
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V2_V4
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V3_V1
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V3_V2
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V3_V3
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V3_V4
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V4_V1
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V4_V2
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V4_V3
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V4_V4
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V8_V1
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V8_V2
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V8_V3
    UINT64_C(4027318272),	// IMAGE_LOAD_PCK_SGN_V8_V4
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V1_V1
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V1_V2
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V1_V3
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V1_V4
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V2_V1
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V2_V2
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V2_V3
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V2_V4
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V3_V1
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V3_V2
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V3_V3
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V3_V4
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V4_V1
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V4_V2
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V4_V3
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V4_V4
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V8_V1
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V8_V2
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V8_V3
    UINT64_C(4027056128),	// IMAGE_LOAD_PCK_V8_V4
    UINT64_C(4026531840),	// IMAGE_LOAD_V1_V1
    UINT64_C(4026531840),	// IMAGE_LOAD_V1_V2
    UINT64_C(4026531840),	// IMAGE_LOAD_V1_V3
    UINT64_C(4026531840),	// IMAGE_LOAD_V1_V4
    UINT64_C(4026531840),	// IMAGE_LOAD_V2_V1
    UINT64_C(4026531840),	// IMAGE_LOAD_V2_V2
    UINT64_C(4026531840),	// IMAGE_LOAD_V2_V3
    UINT64_C(4026531840),	// IMAGE_LOAD_V2_V4
    UINT64_C(4026531840),	// IMAGE_LOAD_V3_V1
    UINT64_C(4026531840),	// IMAGE_LOAD_V3_V2
    UINT64_C(4026531840),	// IMAGE_LOAD_V3_V3
    UINT64_C(4026531840),	// IMAGE_LOAD_V3_V4
    UINT64_C(4026531840),	// IMAGE_LOAD_V4_V1
    UINT64_C(4026531840),	// IMAGE_LOAD_V4_V2
    UINT64_C(4026531840),	// IMAGE_LOAD_V4_V3
    UINT64_C(4026531840),	// IMAGE_LOAD_V4_V4
    UINT64_C(4026531840),	// IMAGE_LOAD_V8_V1
    UINT64_C(4026531840),	// IMAGE_LOAD_V8_V2
    UINT64_C(4026531840),	// IMAGE_LOAD_V8_V3
    UINT64_C(4026531840),	// IMAGE_LOAD_V8_V4
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V1_V3
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V1_V4
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V1_V8
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V2_V3
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V2_V4
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V2_V8
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V3_V3
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V3_V4
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V3_V8
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V4_V3
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V4_V4
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V4_V8
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V8_V3
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V8_V4
    UINT64_C(4040687616),	// IMAGE_SAMPLE_B_CL_O_V8_V8
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V1_V2
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V1_V3
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V1_V4
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V1_V8
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V2_V2
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V2_V3
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V2_V4
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V2_V8
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V3_V2
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V3_V3
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V3_V4
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V3_V8
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V4_V2
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V4_V3
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V4_V4
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V4_V8
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V8_V2
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V8_V3
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V8_V4
    UINT64_C(4036493312),	// IMAGE_SAMPLE_B_CL_V8_V8
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V1_V3
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V1_V4
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V1_V8
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V2_V3
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V2_V4
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V2_V8
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V3_V3
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V3_V4
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V3_V8
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V4_V3
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V4_V4
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V4_V8
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V8_V3
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V8_V4
    UINT64_C(4040425472),	// IMAGE_SAMPLE_B_O_V8_V8
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V1_V2
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V1_V3
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V1_V4
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V2_V2
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V2_V3
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V2_V4
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V3_V2
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V3_V3
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V3_V4
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V4_V2
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V4_V3
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V4_V4
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V8_V2
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V8_V3
    UINT64_C(4036231168),	// IMAGE_SAMPLE_B_V8_V4
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V1_V16
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V1_V3
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V1_V4
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V1_V8
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V2_V16
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V2_V3
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V2_V4
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V2_V8
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V3_V16
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V3_V3
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V3_V4
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V3_V8
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V4_V16
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V4_V3
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V4_V4
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V4_V8
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V8_V16
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V8_V3
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V8_V4
    UINT64_C(4055105536),	// IMAGE_SAMPLE_CD_CL_O_V8_V8
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V1_V16
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V1_V2
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V1_V3
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V1_V4
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V1_V8
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V2_V16
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V2_V2
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V2_V3
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V2_V4
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V2_V8
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V3_V16
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V3_V2
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V3_V3
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V3_V4
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V3_V8
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V4_V16
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V4_V2
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V4_V3
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V4_V4
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V4_V8
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V8_V16
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V8_V2
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V8_V3
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V8_V4
    UINT64_C(4054056960),	// IMAGE_SAMPLE_CD_CL_V8_V8
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V1_V16
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V1_V3
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V1_V4
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V1_V8
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V2_V16
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V2_V3
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V2_V4
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V2_V8
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V3_V16
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V3_V3
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V3_V4
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V3_V8
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V4_V16
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V4_V3
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V4_V4
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V4_V8
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V8_V16
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V8_V3
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V8_V4
    UINT64_C(4054843392),	// IMAGE_SAMPLE_CD_O_V8_V8
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V1_V16
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V1_V2
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V1_V3
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V1_V4
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V1_V8
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V2_V16
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V2_V2
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V2_V3
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V2_V4
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V2_V8
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V3_V16
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V3_V2
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V3_V3
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V3_V4
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V3_V8
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V4_V16
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V4_V2
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V4_V3
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V4_V4
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V4_V8
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V8_V16
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V8_V2
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V8_V3
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V8_V4
    UINT64_C(4053794816),	// IMAGE_SAMPLE_CD_V8_V8
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V1_V2
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V1_V3
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V1_V4
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V1_V8
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V2_V2
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V2_V3
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V2_V4
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V2_V8
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V3_V2
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V3_V3
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V3_V4
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V3_V8
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V4_V2
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V4_V3
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V4_V4
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V4_V8
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V8_V2
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V8_V3
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V8_V4
    UINT64_C(4039376896),	// IMAGE_SAMPLE_CL_O_V8_V8
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V1_V1
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V1_V2
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V1_V3
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V1_V4
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V2_V1
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V2_V2
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V2_V3
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V2_V4
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V3_V1
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V3_V2
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V3_V3
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V3_V4
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V4_V1
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V4_V2
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V4_V3
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V4_V4
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V8_V1
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V8_V2
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V8_V3
    UINT64_C(4035182592),	// IMAGE_SAMPLE_CL_V8_V4
    UINT64_C(4042784768),	// IMAGE_SAMPLE_C_B_CL_O_V1_V4
    UINT64_C(4042784768),	// IMAGE_SAMPLE_C_B_CL_O_V1_V8
    UINT64_C(4042784768),	// IMAGE_SAMPLE_C_B_CL_O_V2_V4
    UINT64_C(4042784768),	// IMAGE_SAMPLE_C_B_CL_O_V2_V8
    UINT64_C(4042784768),	// IMAGE_SAMPLE_C_B_CL_O_V3_V4
    UINT64_C(4042784768),	// IMAGE_SAMPLE_C_B_CL_O_V3_V8
    UINT64_C(4042784768),	// IMAGE_SAMPLE_C_B_CL_O_V4_V4
    UINT64_C(4042784768),	// IMAGE_SAMPLE_C_B_CL_O_V4_V8
    UINT64_C(4042784768),	// IMAGE_SAMPLE_C_B_CL_O_V8_V4
    UINT64_C(4042784768),	// IMAGE_SAMPLE_C_B_CL_O_V8_V8
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V1_V3
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V1_V4
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V1_V8
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V2_V3
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V2_V4
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V2_V8
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V3_V3
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V3_V4
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V3_V8
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V4_V3
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V4_V4
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V4_V8
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V8_V3
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V8_V4
    UINT64_C(4038590464),	// IMAGE_SAMPLE_C_B_CL_V8_V8
    UINT64_C(4042522624),	// IMAGE_SAMPLE_C_B_O_V1_V4
    UINT64_C(4042522624),	// IMAGE_SAMPLE_C_B_O_V1_V8
    UINT64_C(4042522624),	// IMAGE_SAMPLE_C_B_O_V2_V4
    UINT64_C(4042522624),	// IMAGE_SAMPLE_C_B_O_V2_V8
    UINT64_C(4042522624),	// IMAGE_SAMPLE_C_B_O_V3_V4
    UINT64_C(4042522624),	// IMAGE_SAMPLE_C_B_O_V3_V8
    UINT64_C(4042522624),	// IMAGE_SAMPLE_C_B_O_V4_V4
    UINT64_C(4042522624),	// IMAGE_SAMPLE_C_B_O_V4_V8
    UINT64_C(4042522624),	// IMAGE_SAMPLE_C_B_O_V8_V4
    UINT64_C(4042522624),	// IMAGE_SAMPLE_C_B_O_V8_V8
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V1_V3
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V1_V4
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V1_V8
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V2_V3
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V2_V4
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V2_V8
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V3_V3
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V3_V4
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V3_V8
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V4_V3
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V4_V4
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V4_V8
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V8_V3
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V8_V4
    UINT64_C(4038328320),	// IMAGE_SAMPLE_C_B_V8_V8
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V1_V16
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V1_V4
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V1_V8
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V2_V16
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V2_V4
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V2_V8
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V3_V16
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V3_V4
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V3_V8
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V4_V16
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V4_V4
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V4_V8
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V8_V16
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V8_V4
    UINT64_C(4055629824),	// IMAGE_SAMPLE_C_CD_CL_O_V8_V8
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V1_V16
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V1_V3
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V1_V4
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V1_V8
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V2_V16
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V2_V3
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V2_V4
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V2_V8
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V3_V16
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V3_V3
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V3_V4
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V3_V8
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V4_V16
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V4_V3
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V4_V4
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V4_V8
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V8_V16
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V8_V3
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V8_V4
    UINT64_C(4054581248),	// IMAGE_SAMPLE_C_CD_CL_V8_V8
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V1_V16
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V1_V4
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V1_V8
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V2_V16
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V2_V4
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V2_V8
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V3_V16
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V3_V4
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V3_V8
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V4_V16
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V4_V4
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V4_V8
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V8_V16
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V8_V4
    UINT64_C(4055367680),	// IMAGE_SAMPLE_C_CD_O_V8_V8
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V1_V16
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V1_V3
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V1_V4
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V1_V8
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V2_V16
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V2_V3
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V2_V4
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V2_V8
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V3_V16
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V3_V3
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V3_V4
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V3_V8
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V4_V16
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V4_V3
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V4_V4
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V4_V8
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V8_V16
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V8_V3
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V8_V4
    UINT64_C(4054319104),	// IMAGE_SAMPLE_C_CD_V8_V8
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V1_V3
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V1_V4
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V1_V8
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V2_V3
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V2_V4
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V2_V8
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V3_V3
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V3_V4
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V3_V8
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V4_V3
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V4_V4
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V4_V8
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V8_V3
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V8_V4
    UINT64_C(4041474048),	// IMAGE_SAMPLE_C_CL_O_V8_V8
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V1_V2
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V1_V3
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V1_V4
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V1_V8
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V2_V2
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V2_V3
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V2_V4
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V2_V8
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V3_V2
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V3_V3
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V3_V4
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V3_V8
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V4_V2
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V4_V3
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V4_V4
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V4_V8
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V8_V2
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V8_V3
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V8_V4
    UINT64_C(4037279744),	// IMAGE_SAMPLE_C_CL_V8_V8
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V1_V16
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V1_V4
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V1_V8
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V2_V16
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V2_V4
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V2_V8
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V3_V16
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V3_V4
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V3_V8
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V4_V16
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V4_V4
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V4_V8
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V8_V16
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V8_V4
    UINT64_C(4041998336),	// IMAGE_SAMPLE_C_D_CL_O_V8_V8
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V1_V16
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V1_V3
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V1_V4
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V1_V8
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V2_V16
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V2_V3
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V2_V4
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V2_V8
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V3_V16
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V3_V3
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V3_V4
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V3_V8
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V4_V16
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V4_V3
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V4_V4
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V4_V8
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V8_V16
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V8_V3
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V8_V4
    UINT64_C(4037804032),	// IMAGE_SAMPLE_C_D_CL_V8_V8
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V1_V16
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V1_V4
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V1_V8
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V2_V16
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V2_V4
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V2_V8
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V3_V16
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V3_V4
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V3_V8
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V4_V16
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V4_V4
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V4_V8
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V8_V16
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V8_V4
    UINT64_C(4041736192),	// IMAGE_SAMPLE_C_D_O_V8_V8
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V1_V16
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V1_V3
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V1_V4
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V1_V8
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V2_V16
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V2_V3
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V2_V4
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V2_V8
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V3_V16
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V3_V3
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V3_V4
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V3_V8
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V4_V16
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V4_V3
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V4_V4
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V4_V8
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V8_V16
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V8_V3
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V8_V4
    UINT64_C(4037541888),	// IMAGE_SAMPLE_C_D_V8_V8
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V1_V3
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V1_V4
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V1_V8
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V2_V3
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V2_V4
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V2_V8
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V3_V3
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V3_V4
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V3_V8
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V4_V3
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V4_V4
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V4_V8
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V8_V3
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V8_V4
    UINT64_C(4043046912),	// IMAGE_SAMPLE_C_LZ_O_V8_V8
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V1_V2
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V1_V3
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V1_V4
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V2_V2
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V2_V3
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V2_V4
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V3_V2
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V3_V3
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V3_V4
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V4_V2
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V4_V3
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V4_V4
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V8_V2
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V8_V3
    UINT64_C(4038852608),	// IMAGE_SAMPLE_C_LZ_V8_V4
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V1_V3
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V1_V4
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V1_V8
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V2_V3
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V2_V4
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V2_V8
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V3_V3
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V3_V4
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V3_V8
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V4_V3
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V4_V4
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V4_V8
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V8_V3
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V8_V4
    UINT64_C(4042260480),	// IMAGE_SAMPLE_C_L_O_V8_V8
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V1_V2
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V1_V3
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V1_V4
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V1_V8
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V2_V2
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V2_V3
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V2_V4
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V2_V8
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V3_V2
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V3_V3
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V3_V4
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V3_V8
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V4_V2
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V4_V3
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V4_V4
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V4_V8
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V8_V2
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V8_V3
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V8_V4
    UINT64_C(4038066176),	// IMAGE_SAMPLE_C_L_V8_V8
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V1_V3
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V1_V4
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V1_V8
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V2_V3
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V2_V4
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V2_V8
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V3_V3
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V3_V4
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V3_V8
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V4_V3
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V4_V4
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V4_V8
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V8_V3
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V8_V4
    UINT64_C(4041211904),	// IMAGE_SAMPLE_C_O_V8_V8
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V1_V2
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V1_V3
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V1_V4
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V2_V2
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V2_V3
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V2_V4
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V3_V2
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V3_V3
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V3_V4
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V4_V2
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V4_V3
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V4_V4
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V8_V2
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V8_V3
    UINT64_C(4037017600),	// IMAGE_SAMPLE_C_V8_V4
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V1_V16
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V1_V3
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V1_V4
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V1_V8
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V2_V16
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V2_V3
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V2_V4
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V2_V8
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V3_V16
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V3_V3
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V3_V4
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V3_V8
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V4_V16
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V4_V3
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V4_V4
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V4_V8
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V8_V16
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V8_V3
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V8_V4
    UINT64_C(4039901184),	// IMAGE_SAMPLE_D_CL_O_V8_V8
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V1_V16
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V1_V2
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V1_V3
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V1_V4
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V1_V8
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V2_V16
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V2_V2
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V2_V3
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V2_V4
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V2_V8
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V3_V16
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V3_V2
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V3_V3
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V3_V4
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V3_V8
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V4_V16
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V4_V2
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V4_V3
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V4_V4
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V4_V8
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V8_V16
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V8_V2
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V8_V3
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V8_V4
    UINT64_C(4035706880),	// IMAGE_SAMPLE_D_CL_V8_V8
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V1_V16
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V1_V3
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V1_V4
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V1_V8
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V2_V16
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V2_V3
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V2_V4
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V2_V8
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V3_V16
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V3_V3
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V3_V4
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V3_V8
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V4_V16
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V4_V3
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V4_V4
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V4_V8
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V8_V16
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V8_V3
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V8_V4
    UINT64_C(4039639040),	// IMAGE_SAMPLE_D_O_V8_V8
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V1_V16
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V1_V2
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V1_V3
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V1_V4
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V1_V8
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V2_V16
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V2_V2
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V2_V3
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V2_V4
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V2_V8
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V3_V16
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V3_V2
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V3_V3
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V3_V4
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V3_V8
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V4_V16
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V4_V2
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V4_V3
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V4_V4
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V4_V8
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V8_V16
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V8_V2
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V8_V3
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V8_V4
    UINT64_C(4035444736),	// IMAGE_SAMPLE_D_V8_V8
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V1_V2
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V1_V3
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V1_V4
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V2_V2
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V2_V3
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V2_V4
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V3_V2
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V3_V3
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V3_V4
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V4_V2
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V4_V3
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V4_V4
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V8_V2
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V8_V3
    UINT64_C(4040949760),	// IMAGE_SAMPLE_LZ_O_V8_V4
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V1_V1
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V1_V2
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V1_V3
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V1_V4
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V2_V1
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V2_V2
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V2_V3
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V2_V4
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V3_V1
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V3_V2
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V3_V3
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V3_V4
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V4_V1
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V4_V2
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V4_V3
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V4_V4
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V8_V1
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V8_V2
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V8_V3
    UINT64_C(4036755456),	// IMAGE_SAMPLE_LZ_V8_V4
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V1_V2
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V1_V3
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V1_V4
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V1_V8
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V2_V2
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V2_V3
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V2_V4
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V2_V8
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V3_V2
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V3_V3
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V3_V4
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V3_V8
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V4_V2
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V4_V3
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V4_V4
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V4_V8
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V8_V2
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V8_V3
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V8_V4
    UINT64_C(4040163328),	// IMAGE_SAMPLE_L_O_V8_V8
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V1_V1
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V1_V2
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V1_V3
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V1_V4
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V2_V1
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V2_V2
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V2_V3
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V2_V4
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V3_V1
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V3_V2
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V3_V3
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V3_V4
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V4_V1
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V4_V2
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V4_V3
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V4_V4
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V8_V1
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V8_V2
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V8_V3
    UINT64_C(4035969024),	// IMAGE_SAMPLE_L_V8_V4
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V1_V2
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V1_V3
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V1_V4
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V2_V2
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V2_V3
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V2_V4
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V3_V2
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V3_V3
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V3_V4
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V4_V2
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V4_V3
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V4_V4
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V8_V2
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V8_V3
    UINT64_C(4039114752),	// IMAGE_SAMPLE_O_V8_V4
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V1_V1
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V1_V2
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V1_V3
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V1_V4
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V2_V1
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V2_V2
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V2_V3
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V2_V4
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V3_V1
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V3_V2
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V3_V3
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V3_V4
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V4_V1
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V4_V2
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V4_V3
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V4_V4
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V8_V1
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V8_V2
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V8_V3
    UINT64_C(4034920448),	// IMAGE_SAMPLE_V8_V4
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V1_V1
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V1_V2
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V1_V3
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V1_V4
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V2_V1
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V2_V2
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V2_V3
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V2_V4
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V3_V1
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V3_V2
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V3_V3
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V3_V4
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V4_V1
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V4_V2
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V4_V3
    UINT64_C(4029415424),	// IMAGE_STORE_MIP_PCK_V4_V4
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V1_V1
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V1_V2
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V1_V3
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V1_V4
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V2_V1
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V2_V2
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V2_V3
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V2_V4
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V3_V1
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V3_V2
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V3_V3
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V3_V4
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V4_V1
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V4_V2
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V4_V3
    UINT64_C(4028891136),	// IMAGE_STORE_MIP_V4_V4
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V1_V1
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V1_V2
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V1_V3
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V1_V4
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V2_V1
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V2_V2
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V2_V3
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V2_V4
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V3_V1
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V3_V2
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V3_V3
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V3_V4
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V4_V1
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V4_V2
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V4_V3
    UINT64_C(4029153280),	// IMAGE_STORE_PCK_V4_V4
    UINT64_C(4028628992),	// IMAGE_STORE_V1_V1
    UINT64_C(4028628992),	// IMAGE_STORE_V1_V2
    UINT64_C(4028628992),	// IMAGE_STORE_V1_V3
    UINT64_C(4028628992),	// IMAGE_STORE_V1_V4
    UINT64_C(4028628992),	// IMAGE_STORE_V2_V1
    UINT64_C(4028628992),	// IMAGE_STORE_V2_V2
    UINT64_C(4028628992),	// IMAGE_STORE_V2_V3
    UINT64_C(4028628992),	// IMAGE_STORE_V2_V4
    UINT64_C(4028628992),	// IMAGE_STORE_V3_V1
    UINT64_C(4028628992),	// IMAGE_STORE_V3_V2
    UINT64_C(4028628992),	// IMAGE_STORE_V3_V3
    UINT64_C(4028628992),	// IMAGE_STORE_V3_V4
    UINT64_C(4028628992),	// IMAGE_STORE_V4_V1
    UINT64_C(4028628992),	// IMAGE_STORE_V4_V2
    UINT64_C(4028628992),	// IMAGE_STORE_V4_V3
    UINT64_C(4028628992),	// IMAGE_STORE_V4_V4
    UINT64_C(3696508928),	// SCRATCH_LOAD_DWORDX2_SADDR_vi
    UINT64_C(35747325738762240),	// SCRATCH_LOAD_DWORDX2_vi
    UINT64_C(3696771072),	// SCRATCH_LOAD_DWORDX3_SADDR_vi
    UINT64_C(35747325739024384),	// SCRATCH_LOAD_DWORDX3_vi
    UINT64_C(3697033216),	// SCRATCH_LOAD_DWORDX4_SADDR_vi
    UINT64_C(35747325739286528),	// SCRATCH_LOAD_DWORDX4_vi
    UINT64_C(3696246784),	// SCRATCH_LOAD_DWORD_SADDR_vi
    UINT64_C(35747325738500096),	// SCRATCH_LOAD_DWORD_vi
    UINT64_C(3700178944),	// SCRATCH_LOAD_SBYTE_D16_HI_SADDR_vi
    UINT64_C(35747325742432256),	// SCRATCH_LOAD_SBYTE_D16_HI_vi
    UINT64_C(3699916800),	// SCRATCH_LOAD_SBYTE_D16_SADDR_vi
    UINT64_C(35747325742170112),	// SCRATCH_LOAD_SBYTE_D16_vi
    UINT64_C(3695460352),	// SCRATCH_LOAD_SBYTE_SADDR_vi
    UINT64_C(35747325737713664),	// SCRATCH_LOAD_SBYTE_vi
    UINT64_C(3700703232),	// SCRATCH_LOAD_SHORT_D16_HI_SADDR_vi
    UINT64_C(35747325742956544),	// SCRATCH_LOAD_SHORT_D16_HI_vi
    UINT64_C(3700441088),	// SCRATCH_LOAD_SHORT_D16_SADDR_vi
    UINT64_C(35747325742694400),	// SCRATCH_LOAD_SHORT_D16_vi
    UINT64_C(3695984640),	// SCRATCH_LOAD_SSHORT_SADDR_vi
    UINT64_C(35747325738237952),	// SCRATCH_LOAD_SSHORT_vi
    UINT64_C(3699654656),	// SCRATCH_LOAD_UBYTE_D16_HI_SADDR_vi
    UINT64_C(35747325741907968),	// SCRATCH_LOAD_UBYTE_D16_HI_vi
    UINT64_C(3699392512),	// SCRATCH_LOAD_UBYTE_D16_SADDR_vi
    UINT64_C(35747325741645824),	// SCRATCH_LOAD_UBYTE_D16_vi
    UINT64_C(3695198208),	// SCRATCH_LOAD_UBYTE_SADDR_vi
    UINT64_C(35747325737451520),	// SCRATCH_LOAD_UBYTE_vi
    UINT64_C(3695722496),	// SCRATCH_LOAD_USHORT_SADDR_vi
    UINT64_C(35747325737975808),	// SCRATCH_LOAD_USHORT_vi
    UINT64_C(3697557504),	// SCRATCH_STORE_BYTE_D16_HI_SADDR_vi
    UINT64_C(35747325739810816),	// SCRATCH_STORE_BYTE_D16_HI_vi
    UINT64_C(3697295360),	// SCRATCH_STORE_BYTE_SADDR_vi
    UINT64_C(35747325739548672),	// SCRATCH_STORE_BYTE_vi
    UINT64_C(3698606080),	// SCRATCH_STORE_DWORDX2_SADDR_vi
    UINT64_C(35747325740859392),	// SCRATCH_STORE_DWORDX2_vi
    UINT64_C(3698868224),	// SCRATCH_STORE_DWORDX3_SADDR_vi
    UINT64_C(35747325741121536),	// SCRATCH_STORE_DWORDX3_vi
    UINT64_C(3699130368),	// SCRATCH_STORE_DWORDX4_SADDR_vi
    UINT64_C(35747325741383680),	// SCRATCH_STORE_DWORDX4_vi
    UINT64_C(3698343936),	// SCRATCH_STORE_DWORD_SADDR_vi
    UINT64_C(35747325740597248),	// SCRATCH_STORE_DWORD_vi
    UINT64_C(3698081792),	// SCRATCH_STORE_SHORT_D16_HI_SADDR_vi
    UINT64_C(35747325740335104),	// SCRATCH_STORE_SHORT_D16_HI_vi
    UINT64_C(3697819648),	// SCRATCH_STORE_SHORT_SADDR_vi
    UINT64_C(35747325740072960),	// SCRATCH_STORE_SHORT_vi
    UINT64_C(2516582400),	// S_ABSDIFF_I32_si
    UINT64_C(2499805184),	// S_ABSDIFF_I32_vi
    UINT64_C(3196072960),	// S_ABS_I32_si
    UINT64_C(3196071936),	// S_ABS_I32_vi
    UINT64_C(2181038080),	// S_ADDC_U32_si
    UINT64_C(2181038080),	// S_ADDC_U32_vi
    UINT64_C(3078619136),	// S_ADDK_I32_si
    UINT64_C(3070230528),	// S_ADDK_I32_vi
    UINT64_C(2164260864),	// S_ADD_I32_si
    UINT64_C(2164260864),	// S_ADD_I32_vi
    UINT64_C(2147483648),	// S_ADD_U32_si
    UINT64_C(2147483648),	// S_ADD_U32_vi
    UINT64_C(3196072704),	// S_ANDN1_SAVEEXEC_B64_vi
    UINT64_C(3196073216),	// S_ANDN1_WREXEC_B64_vi
    UINT64_C(2315255808),	// S_ANDN2_B32_si
    UINT64_C(2298478592),	// S_ANDN2_B32_vi
    UINT64_C(2323644416),	// S_ANDN2_B64_si
    UINT64_C(2306867200),	// S_ANDN2_B64_vi
    UINT64_C(3196069632),	// S_ANDN2_SAVEEXEC_B64_si
    UINT64_C(3196068608),	// S_ANDN2_SAVEEXEC_B64_vi
    UINT64_C(3196073472),	// S_ANDN2_WREXEC_B64_vi
    UINT64_C(2264924160),	// S_AND_B32_si
    UINT64_C(2248146944),	// S_AND_B32_vi
    UINT64_C(2273312768),	// S_AND_B64_si
    UINT64_C(2256535552),	// S_AND_B64_vi
    UINT64_C(3196068864),	// S_AND_SAVEEXEC_B64_si
    UINT64_C(3196067840),	// S_AND_SAVEEXEC_B64_vi
    UINT64_C(2432696320),	// S_ASHR_I32_si
    UINT64_C(2415919104),	// S_ASHR_I32_vi
    UINT64_C(2441084928),	// S_ASHR_I64_si
    UINT64_C(2424307712),	// S_ASHR_I64_vi
    UINT64_C(3231580160),	// S_ATC_PROBE_BUFFER_IMM_vi
    UINT64_C(3231449088),	// S_ATC_PROBE_BUFFER_SGPR_vi
    UINT64_C(3231318016),	// S_ATC_PROBE_IMM_vi
    UINT64_C(3231186944),	// S_ATC_PROBE_SGPR_vi
    UINT64_C(3255500800),	// S_ATOMIC_ADD_IMM_RTN_vi
    UINT64_C(3255435264),	// S_ATOMIC_ADD_IMM_vi
    UINT64_C(3255369728),	// S_ATOMIC_ADD_SGPR_RTN_vi
    UINT64_C(3255304192),	// S_ATOMIC_ADD_SGPR_vi
    UINT64_C(3263889408),	// S_ATOMIC_ADD_X2_IMM_RTN_vi
    UINT64_C(3263823872),	// S_ATOMIC_ADD_X2_IMM_vi
    UINT64_C(3263758336),	// S_ATOMIC_ADD_X2_SGPR_RTN_vi
    UINT64_C(3263692800),	// S_ATOMIC_ADD_X2_SGPR_vi
    UINT64_C(3257073664),	// S_ATOMIC_AND_IMM_RTN_vi
    UINT64_C(3257008128),	// S_ATOMIC_AND_IMM_vi
    UINT64_C(3256942592),	// S_ATOMIC_AND_SGPR_RTN_vi
    UINT64_C(3256877056),	// S_ATOMIC_AND_SGPR_vi
    UINT64_C(3265462272),	// S_ATOMIC_AND_X2_IMM_RTN_vi
    UINT64_C(3265396736),	// S_ATOMIC_AND_X2_IMM_vi
    UINT64_C(3265331200),	// S_ATOMIC_AND_X2_SGPR_RTN_vi
    UINT64_C(3265265664),	// S_ATOMIC_AND_X2_SGPR_vi
    UINT64_C(3255238656),	// S_ATOMIC_CMPSWAP_IMM_RTN_vi
    UINT64_C(3255173120),	// S_ATOMIC_CMPSWAP_IMM_vi
    UINT64_C(3255107584),	// S_ATOMIC_CMPSWAP_SGPR_RTN_vi
    UINT64_C(3255042048),	// S_ATOMIC_CMPSWAP_SGPR_vi
    UINT64_C(3263627264),	// S_ATOMIC_CMPSWAP_X2_IMM_RTN_vi
    UINT64_C(3263561728),	// S_ATOMIC_CMPSWAP_X2_IMM_vi
    UINT64_C(3263496192),	// S_ATOMIC_CMPSWAP_X2_SGPR_RTN_vi
    UINT64_C(3263430656),	// S_ATOMIC_CMPSWAP_X2_SGPR_vi
    UINT64_C(3258122240),	// S_ATOMIC_DEC_IMM_RTN_vi
    UINT64_C(3258056704),	// S_ATOMIC_DEC_IMM_vi
    UINT64_C(3257991168),	// S_ATOMIC_DEC_SGPR_RTN_vi
    UINT64_C(3257925632),	// S_ATOMIC_DEC_SGPR_vi
    UINT64_C(3266510848),	// S_ATOMIC_DEC_X2_IMM_RTN_vi
    UINT64_C(3266445312),	// S_ATOMIC_DEC_X2_IMM_vi
    UINT64_C(3266379776),	// S_ATOMIC_DEC_X2_SGPR_RTN_vi
    UINT64_C(3266314240),	// S_ATOMIC_DEC_X2_SGPR_vi
    UINT64_C(3257860096),	// S_ATOMIC_INC_IMM_RTN_vi
    UINT64_C(3257794560),	// S_ATOMIC_INC_IMM_vi
    UINT64_C(3257729024),	// S_ATOMIC_INC_SGPR_RTN_vi
    UINT64_C(3257663488),	// S_ATOMIC_INC_SGPR_vi
    UINT64_C(3266248704),	// S_ATOMIC_INC_X2_IMM_RTN_vi
    UINT64_C(3266183168),	// S_ATOMIC_INC_X2_IMM_vi
    UINT64_C(3266117632),	// S_ATOMIC_INC_X2_SGPR_RTN_vi
    UINT64_C(3266052096),	// S_ATOMIC_INC_X2_SGPR_vi
    UINT64_C(3257335808),	// S_ATOMIC_OR_IMM_RTN_vi
    UINT64_C(3257270272),	// S_ATOMIC_OR_IMM_vi
    UINT64_C(3257204736),	// S_ATOMIC_OR_SGPR_RTN_vi
    UINT64_C(3257139200),	// S_ATOMIC_OR_SGPR_vi
    UINT64_C(3265724416),	// S_ATOMIC_OR_X2_IMM_RTN_vi
    UINT64_C(3265658880),	// S_ATOMIC_OR_X2_IMM_vi
    UINT64_C(3265593344),	// S_ATOMIC_OR_X2_SGPR_RTN_vi
    UINT64_C(3265527808),	// S_ATOMIC_OR_X2_SGPR_vi
    UINT64_C(3256549376),	// S_ATOMIC_SMAX_IMM_RTN_vi
    UINT64_C(3256483840),	// S_ATOMIC_SMAX_IMM_vi
    UINT64_C(3256418304),	// S_ATOMIC_SMAX_SGPR_RTN_vi
    UINT64_C(3256352768),	// S_ATOMIC_SMAX_SGPR_vi
    UINT64_C(3264937984),	// S_ATOMIC_SMAX_X2_IMM_RTN_vi
    UINT64_C(3264872448),	// S_ATOMIC_SMAX_X2_IMM_vi
    UINT64_C(3264806912),	// S_ATOMIC_SMAX_X2_SGPR_RTN_vi
    UINT64_C(3264741376),	// S_ATOMIC_SMAX_X2_SGPR_vi
    UINT64_C(3256025088),	// S_ATOMIC_SMIN_IMM_RTN_vi
    UINT64_C(3255959552),	// S_ATOMIC_SMIN_IMM_vi
    UINT64_C(3255894016),	// S_ATOMIC_SMIN_SGPR_RTN_vi
    UINT64_C(3255828480),	// S_ATOMIC_SMIN_SGPR_vi
    UINT64_C(3264413696),	// S_ATOMIC_SMIN_X2_IMM_RTN_vi
    UINT64_C(3264348160),	// S_ATOMIC_SMIN_X2_IMM_vi
    UINT64_C(3264282624),	// S_ATOMIC_SMIN_X2_SGPR_RTN_vi
    UINT64_C(3264217088),	// S_ATOMIC_SMIN_X2_SGPR_vi
    UINT64_C(3255762944),	// S_ATOMIC_SUB_IMM_RTN_vi
    UINT64_C(3255697408),	// S_ATOMIC_SUB_IMM_vi
    UINT64_C(3255631872),	// S_ATOMIC_SUB_SGPR_RTN_vi
    UINT64_C(3255566336),	// S_ATOMIC_SUB_SGPR_vi
    UINT64_C(3264151552),	// S_ATOMIC_SUB_X2_IMM_RTN_vi
    UINT64_C(3264086016),	// S_ATOMIC_SUB_X2_IMM_vi
    UINT64_C(3264020480),	// S_ATOMIC_SUB_X2_SGPR_RTN_vi
    UINT64_C(3263954944),	// S_ATOMIC_SUB_X2_SGPR_vi
    UINT64_C(3254976512),	// S_ATOMIC_SWAP_IMM_RTN_vi
    UINT64_C(3254910976),	// S_ATOMIC_SWAP_IMM_vi
    UINT64_C(3254845440),	// S_ATOMIC_SWAP_SGPR_RTN_vi
    UINT64_C(3254779904),	// S_ATOMIC_SWAP_SGPR_vi
    UINT64_C(3263365120),	// S_ATOMIC_SWAP_X2_IMM_RTN_vi
    UINT64_C(3263299584),	// S_ATOMIC_SWAP_X2_IMM_vi
    UINT64_C(3263234048),	// S_ATOMIC_SWAP_X2_SGPR_RTN_vi
    UINT64_C(3263168512),	// S_ATOMIC_SWAP_X2_SGPR_vi
    UINT64_C(3256811520),	// S_ATOMIC_UMAX_IMM_RTN_vi
    UINT64_C(3256745984),	// S_ATOMIC_UMAX_IMM_vi
    UINT64_C(3256680448),	// S_ATOMIC_UMAX_SGPR_RTN_vi
    UINT64_C(3256614912),	// S_ATOMIC_UMAX_SGPR_vi
    UINT64_C(3265200128),	// S_ATOMIC_UMAX_X2_IMM_RTN_vi
    UINT64_C(3265134592),	// S_ATOMIC_UMAX_X2_IMM_vi
    UINT64_C(3265069056),	// S_ATOMIC_UMAX_X2_SGPR_RTN_vi
    UINT64_C(3265003520),	// S_ATOMIC_UMAX_X2_SGPR_vi
    UINT64_C(3256287232),	// S_ATOMIC_UMIN_IMM_RTN_vi
    UINT64_C(3256221696),	// S_ATOMIC_UMIN_IMM_vi
    UINT64_C(3256156160),	// S_ATOMIC_UMIN_SGPR_RTN_vi
    UINT64_C(3256090624),	// S_ATOMIC_UMIN_SGPR_vi
    UINT64_C(3264675840),	// S_ATOMIC_UMIN_X2_IMM_RTN_vi
    UINT64_C(3264610304),	// S_ATOMIC_UMIN_X2_IMM_vi
    UINT64_C(3264544768),	// S_ATOMIC_UMIN_X2_SGPR_RTN_vi
    UINT64_C(3264479232),	// S_ATOMIC_UMIN_X2_SGPR_vi
    UINT64_C(3257597952),	// S_ATOMIC_XOR_IMM_RTN_vi
    UINT64_C(3257532416),	// S_ATOMIC_XOR_IMM_vi
    UINT64_C(3257466880),	// S_ATOMIC_XOR_SGPR_RTN_vi
    UINT64_C(3257401344),	// S_ATOMIC_XOR_SGPR_vi
    UINT64_C(3265986560),	// S_ATOMIC_XOR_X2_IMM_RTN_vi
    UINT64_C(3265921024),	// S_ATOMIC_XOR_X2_IMM_vi
    UINT64_C(3265855488),	// S_ATOMIC_XOR_X2_SGPR_RTN_vi
    UINT64_C(3265789952),	// S_ATOMIC_XOR_X2_SGPR_vi
    UINT64_C(3213492224),	// S_BARRIER
    UINT64_C(3196062976),	// S_BCNT0_I32_B32_si
    UINT64_C(3196062208),	// S_BCNT0_I32_B32_vi
    UINT64_C(3196063232),	// S_BCNT0_I32_B64_si
    UINT64_C(3196062464),	// S_BCNT0_I32_B64_vi
    UINT64_C(3196063488),	// S_BCNT1_I32_B32_si
    UINT64_C(3196062720),	// S_BCNT1_I32_B32_vi
    UINT64_C(3196063744),	// S_BCNT1_I32_B64_si
    UINT64_C(3196062976),	// S_BCNT1_I32_B64_vi
    UINT64_C(2483027968),	// S_BFE_I32_si
    UINT64_C(2466250752),	// S_BFE_I32_vi
    UINT64_C(2499805184),	// S_BFE_I64_si
    UINT64_C(2483027968),	// S_BFE_I64_vi
    UINT64_C(2474639360),	// S_BFE_U32_si
    UINT64_C(2457862144),	// S_BFE_U32_vi
    UINT64_C(2491416576),	// S_BFE_U64_si
    UINT64_C(2474639360),	// S_BFE_U64_vi
    UINT64_C(2449473536),	// S_BFM_B32_si
    UINT64_C(2432696320),	// S_BFM_B32_vi
    UINT64_C(2457862144),	// S_BFM_B64_si
    UINT64_C(2441084928),	// S_BFM_B64_vi
    UINT64_C(3205234688),	// S_BITCMP0_B32
    UINT64_C(3205365760),	// S_BITCMP0_B64
    UINT64_C(3205300224),	// S_BITCMP1_B32
    UINT64_C(3205431296),	// S_BITCMP1_B64
    UINT64_C(3196073728),	// S_BITREPLICATE_B64_B32_vi
    UINT64_C(3196066560),	// S_BITSET0_B32_si
    UINT64_C(3196065792),	// S_BITSET0_B32_vi
    UINT64_C(3196066816),	// S_BITSET0_B64_si
    UINT64_C(3196066048),	// S_BITSET0_B64_vi
    UINT64_C(3196067072),	// S_BITSET1_B32_si
    UINT64_C(3196066304),	// S_BITSET1_B32_vi
    UINT64_C(3196067328),	// S_BITSET1_B64_si
    UINT64_C(3196066560),	// S_BITSET1_B64_vi
    UINT64_C(3212967936),	// S_BRANCH
    UINT64_C(3196062464),	// S_BREV_B32_si
    UINT64_C(3196061696),	// S_BREV_B32_vi
    UINT64_C(3196062720),	// S_BREV_B64_si
    UINT64_C(3196061952),	// S_BREV_B64_vi
    UINT64_C(3238723584),	// S_BUFFER_ATOMIC_ADD_IMM_RTN_vi
    UINT64_C(3238658048),	// S_BUFFER_ATOMIC_ADD_IMM_vi
    UINT64_C(3238592512),	// S_BUFFER_ATOMIC_ADD_SGPR_RTN_vi
    UINT64_C(3238526976),	// S_BUFFER_ATOMIC_ADD_SGPR_vi
    UINT64_C(3247112192),	// S_BUFFER_ATOMIC_ADD_X2_IMM_RTN_vi
    UINT64_C(3247046656),	// S_BUFFER_ATOMIC_ADD_X2_IMM_vi
    UINT64_C(3246981120),	// S_BUFFER_ATOMIC_ADD_X2_SGPR_RTN_vi
    UINT64_C(3246915584),	// S_BUFFER_ATOMIC_ADD_X2_SGPR_vi
    UINT64_C(3240296448),	// S_BUFFER_ATOMIC_AND_IMM_RTN_vi
    UINT64_C(3240230912),	// S_BUFFER_ATOMIC_AND_IMM_vi
    UINT64_C(3240165376),	// S_BUFFER_ATOMIC_AND_SGPR_RTN_vi
    UINT64_C(3240099840),	// S_BUFFER_ATOMIC_AND_SGPR_vi
    UINT64_C(3248685056),	// S_BUFFER_ATOMIC_AND_X2_IMM_RTN_vi
    UINT64_C(3248619520),	// S_BUFFER_ATOMIC_AND_X2_IMM_vi
    UINT64_C(3248553984),	// S_BUFFER_ATOMIC_AND_X2_SGPR_RTN_vi
    UINT64_C(3248488448),	// S_BUFFER_ATOMIC_AND_X2_SGPR_vi
    UINT64_C(3238461440),	// S_BUFFER_ATOMIC_CMPSWAP_IMM_RTN_vi
    UINT64_C(3238395904),	// S_BUFFER_ATOMIC_CMPSWAP_IMM_vi
    UINT64_C(3238330368),	// S_BUFFER_ATOMIC_CMPSWAP_SGPR_RTN_vi
    UINT64_C(3238264832),	// S_BUFFER_ATOMIC_CMPSWAP_SGPR_vi
    UINT64_C(3246850048),	// S_BUFFER_ATOMIC_CMPSWAP_X2_IMM_RTN_vi
    UINT64_C(3246784512),	// S_BUFFER_ATOMIC_CMPSWAP_X2_IMM_vi
    UINT64_C(3246718976),	// S_BUFFER_ATOMIC_CMPSWAP_X2_SGPR_RTN_vi
    UINT64_C(3246653440),	// S_BUFFER_ATOMIC_CMPSWAP_X2_SGPR_vi
    UINT64_C(3241345024),	// S_BUFFER_ATOMIC_DEC_IMM_RTN_vi
    UINT64_C(3241279488),	// S_BUFFER_ATOMIC_DEC_IMM_vi
    UINT64_C(3241213952),	// S_BUFFER_ATOMIC_DEC_SGPR_RTN_vi
    UINT64_C(3241148416),	// S_BUFFER_ATOMIC_DEC_SGPR_vi
    UINT64_C(3249733632),	// S_BUFFER_ATOMIC_DEC_X2_IMM_RTN_vi
    UINT64_C(3249668096),	// S_BUFFER_ATOMIC_DEC_X2_IMM_vi
    UINT64_C(3249602560),	// S_BUFFER_ATOMIC_DEC_X2_SGPR_RTN_vi
    UINT64_C(3249537024),	// S_BUFFER_ATOMIC_DEC_X2_SGPR_vi
    UINT64_C(3241082880),	// S_BUFFER_ATOMIC_INC_IMM_RTN_vi
    UINT64_C(3241017344),	// S_BUFFER_ATOMIC_INC_IMM_vi
    UINT64_C(3240951808),	// S_BUFFER_ATOMIC_INC_SGPR_RTN_vi
    UINT64_C(3240886272),	// S_BUFFER_ATOMIC_INC_SGPR_vi
    UINT64_C(3249471488),	// S_BUFFER_ATOMIC_INC_X2_IMM_RTN_vi
    UINT64_C(3249405952),	// S_BUFFER_ATOMIC_INC_X2_IMM_vi
    UINT64_C(3249340416),	// S_BUFFER_ATOMIC_INC_X2_SGPR_RTN_vi
    UINT64_C(3249274880),	// S_BUFFER_ATOMIC_INC_X2_SGPR_vi
    UINT64_C(3240558592),	// S_BUFFER_ATOMIC_OR_IMM_RTN_vi
    UINT64_C(3240493056),	// S_BUFFER_ATOMIC_OR_IMM_vi
    UINT64_C(3240427520),	// S_BUFFER_ATOMIC_OR_SGPR_RTN_vi
    UINT64_C(3240361984),	// S_BUFFER_ATOMIC_OR_SGPR_vi
    UINT64_C(3248947200),	// S_BUFFER_ATOMIC_OR_X2_IMM_RTN_vi
    UINT64_C(3248881664),	// S_BUFFER_ATOMIC_OR_X2_IMM_vi
    UINT64_C(3248816128),	// S_BUFFER_ATOMIC_OR_X2_SGPR_RTN_vi
    UINT64_C(3248750592),	// S_BUFFER_ATOMIC_OR_X2_SGPR_vi
    UINT64_C(3239772160),	// S_BUFFER_ATOMIC_SMAX_IMM_RTN_vi
    UINT64_C(3239706624),	// S_BUFFER_ATOMIC_SMAX_IMM_vi
    UINT64_C(3239641088),	// S_BUFFER_ATOMIC_SMAX_SGPR_RTN_vi
    UINT64_C(3239575552),	// S_BUFFER_ATOMIC_SMAX_SGPR_vi
    UINT64_C(3248160768),	// S_BUFFER_ATOMIC_SMAX_X2_IMM_RTN_vi
    UINT64_C(3248095232),	// S_BUFFER_ATOMIC_SMAX_X2_IMM_vi
    UINT64_C(3248029696),	// S_BUFFER_ATOMIC_SMAX_X2_SGPR_RTN_vi
    UINT64_C(3247964160),	// S_BUFFER_ATOMIC_SMAX_X2_SGPR_vi
    UINT64_C(3239247872),	// S_BUFFER_ATOMIC_SMIN_IMM_RTN_vi
    UINT64_C(3239182336),	// S_BUFFER_ATOMIC_SMIN_IMM_vi
    UINT64_C(3239116800),	// S_BUFFER_ATOMIC_SMIN_SGPR_RTN_vi
    UINT64_C(3239051264),	// S_BUFFER_ATOMIC_SMIN_SGPR_vi
    UINT64_C(3247636480),	// S_BUFFER_ATOMIC_SMIN_X2_IMM_RTN_vi
    UINT64_C(3247570944),	// S_BUFFER_ATOMIC_SMIN_X2_IMM_vi
    UINT64_C(3247505408),	// S_BUFFER_ATOMIC_SMIN_X2_SGPR_RTN_vi
    UINT64_C(3247439872),	// S_BUFFER_ATOMIC_SMIN_X2_SGPR_vi
    UINT64_C(3238985728),	// S_BUFFER_ATOMIC_SUB_IMM_RTN_vi
    UINT64_C(3238920192),	// S_BUFFER_ATOMIC_SUB_IMM_vi
    UINT64_C(3238854656),	// S_BUFFER_ATOMIC_SUB_SGPR_RTN_vi
    UINT64_C(3238789120),	// S_BUFFER_ATOMIC_SUB_SGPR_vi
    UINT64_C(3247374336),	// S_BUFFER_ATOMIC_SUB_X2_IMM_RTN_vi
    UINT64_C(3247308800),	// S_BUFFER_ATOMIC_SUB_X2_IMM_vi
    UINT64_C(3247243264),	// S_BUFFER_ATOMIC_SUB_X2_SGPR_RTN_vi
    UINT64_C(3247177728),	// S_BUFFER_ATOMIC_SUB_X2_SGPR_vi
    UINT64_C(3238199296),	// S_BUFFER_ATOMIC_SWAP_IMM_RTN_vi
    UINT64_C(3238133760),	// S_BUFFER_ATOMIC_SWAP_IMM_vi
    UINT64_C(3238068224),	// S_BUFFER_ATOMIC_SWAP_SGPR_RTN_vi
    UINT64_C(3238002688),	// S_BUFFER_ATOMIC_SWAP_SGPR_vi
    UINT64_C(3246587904),	// S_BUFFER_ATOMIC_SWAP_X2_IMM_RTN_vi
    UINT64_C(3246522368),	// S_BUFFER_ATOMIC_SWAP_X2_IMM_vi
    UINT64_C(3246456832),	// S_BUFFER_ATOMIC_SWAP_X2_SGPR_RTN_vi
    UINT64_C(3246391296),	// S_BUFFER_ATOMIC_SWAP_X2_SGPR_vi
    UINT64_C(3240034304),	// S_BUFFER_ATOMIC_UMAX_IMM_RTN_vi
    UINT64_C(3239968768),	// S_BUFFER_ATOMIC_UMAX_IMM_vi
    UINT64_C(3239903232),	// S_BUFFER_ATOMIC_UMAX_SGPR_RTN_vi
    UINT64_C(3239837696),	// S_BUFFER_ATOMIC_UMAX_SGPR_vi
    UINT64_C(3248422912),	// S_BUFFER_ATOMIC_UMAX_X2_IMM_RTN_vi
    UINT64_C(3248357376),	// S_BUFFER_ATOMIC_UMAX_X2_IMM_vi
    UINT64_C(3248291840),	// S_BUFFER_ATOMIC_UMAX_X2_SGPR_RTN_vi
    UINT64_C(3248226304),	// S_BUFFER_ATOMIC_UMAX_X2_SGPR_vi
    UINT64_C(3239510016),	// S_BUFFER_ATOMIC_UMIN_IMM_RTN_vi
    UINT64_C(3239444480),	// S_BUFFER_ATOMIC_UMIN_IMM_vi
    UINT64_C(3239378944),	// S_BUFFER_ATOMIC_UMIN_SGPR_RTN_vi
    UINT64_C(3239313408),	// S_BUFFER_ATOMIC_UMIN_SGPR_vi
    UINT64_C(3247898624),	// S_BUFFER_ATOMIC_UMIN_X2_IMM_RTN_vi
    UINT64_C(3247833088),	// S_BUFFER_ATOMIC_UMIN_X2_IMM_vi
    UINT64_C(3247767552),	// S_BUFFER_ATOMIC_UMIN_X2_SGPR_RTN_vi
    UINT64_C(3247702016),	// S_BUFFER_ATOMIC_UMIN_X2_SGPR_vi
    UINT64_C(3240820736),	// S_BUFFER_ATOMIC_XOR_IMM_RTN_vi
    UINT64_C(3240755200),	// S_BUFFER_ATOMIC_XOR_IMM_vi
    UINT64_C(3240689664),	// S_BUFFER_ATOMIC_XOR_SGPR_RTN_vi
    UINT64_C(3240624128),	// S_BUFFER_ATOMIC_XOR_SGPR_vi
    UINT64_C(3249209344),	// S_BUFFER_ATOMIC_XOR_X2_IMM_RTN_vi
    UINT64_C(3249143808),	// S_BUFFER_ATOMIC_XOR_X2_IMM_vi
    UINT64_C(3249078272),	// S_BUFFER_ATOMIC_XOR_X2_SGPR_RTN_vi
    UINT64_C(3249012736),	// S_BUFFER_ATOMIC_XOR_X2_SGPR_vi
    UINT64_C(3271557375),	// S_BUFFER_LOAD_DWORDX16_IMM_ci
    UINT64_C(3271557376),	// S_BUFFER_LOAD_DWORDX16_IMM_si
    UINT64_C(3224502272),	// S_BUFFER_LOAD_DWORDX16_IMM_vi
    UINT64_C(3271557120),	// S_BUFFER_LOAD_DWORDX16_SGPR_si
    UINT64_C(3224371200),	// S_BUFFER_LOAD_DWORDX16_SGPR_vi
    UINT64_C(3258974463),	// S_BUFFER_LOAD_DWORDX2_IMM_ci
    UINT64_C(3258974464),	// S_BUFFER_LOAD_DWORDX2_IMM_si
    UINT64_C(3223715840),	// S_BUFFER_LOAD_DWORDX2_IMM_vi
    UINT64_C(3258974208),	// S_BUFFER_LOAD_DWORDX2_SGPR_si
    UINT64_C(3223584768),	// S_BUFFER_LOAD_DWORDX2_SGPR_vi
    UINT64_C(3263168767),	// S_BUFFER_LOAD_DWORDX4_IMM_ci
    UINT64_C(3263168768),	// S_BUFFER_LOAD_DWORDX4_IMM_si
    UINT64_C(3223977984),	// S_BUFFER_LOAD_DWORDX4_IMM_vi
    UINT64_C(3263168512),	// S_BUFFER_LOAD_DWORDX4_SGPR_si
    UINT64_C(3223846912),	// S_BUFFER_LOAD_DWORDX4_SGPR_vi
    UINT64_C(3267363071),	// S_BUFFER_LOAD_DWORDX8_IMM_ci
    UINT64_C(3267363072),	// S_BUFFER_LOAD_DWORDX8_IMM_si
    UINT64_C(3224240128),	// S_BUFFER_LOAD_DWORDX8_IMM_vi
    UINT64_C(3267362816),	// S_BUFFER_LOAD_DWORDX8_SGPR_si
    UINT64_C(3224109056),	// S_BUFFER_LOAD_DWORDX8_SGPR_vi
    UINT64_C(3254780159),	// S_BUFFER_LOAD_DWORD_IMM_ci
    UINT64_C(3254780160),	// S_BUFFER_LOAD_DWORD_IMM_si
    UINT64_C(3223453696),	// S_BUFFER_LOAD_DWORD_IMM_vi
    UINT64_C(3254779904),	// S_BUFFER_LOAD_DWORD_SGPR_si
    UINT64_C(3223322624),	// S_BUFFER_LOAD_DWORD_SGPR_vi
    UINT64_C(3227910144),	// S_BUFFER_STORE_DWORDX2_IMM_vi
    UINT64_C(3227779072),	// S_BUFFER_STORE_DWORDX2_SGPR_vi
    UINT64_C(3228172288),	// S_BUFFER_STORE_DWORDX4_IMM_vi
    UINT64_C(3228041216),	// S_BUFFER_STORE_DWORDX4_SGPR_vi
    UINT64_C(3227648000),	// S_BUFFER_STORE_DWORD_IMM_vi
    UINT64_C(3227516928),	// S_BUFFER_STORE_DWORD_SGPR_vi
    UINT64_C(3128950784),	// S_CALL_B64_vi
    UINT64_C(3214344192),	// S_CBRANCH_CDBGSYS
    UINT64_C(3214540800),	// S_CBRANCH_CDBGSYS_AND_USER
    UINT64_C(3214475264),	// S_CBRANCH_CDBGSYS_OR_USER
    UINT64_C(3214409728),	// S_CBRANCH_CDBGUSER
    UINT64_C(3213426688),	// S_CBRANCH_EXECNZ
    UINT64_C(3213361152),	// S_CBRANCH_EXECZ
    UINT64_C(2508193792),	// S_CBRANCH_G_FORK_si
    UINT64_C(2491416576),	// S_CBRANCH_G_FORK_vi
    UINT64_C(3095396352),	// S_CBRANCH_I_FORK_si
    UINT64_C(3087007744),	// S_CBRANCH_I_FORK_vi
    UINT64_C(3196072448),	// S_CBRANCH_JOIN_si
    UINT64_C(3196071424),	// S_CBRANCH_JOIN_vi
    UINT64_C(3213099008),	// S_CBRANCH_SCC0
    UINT64_C(3213164544),	// S_CBRANCH_SCC1
    UINT64_C(3213295616),	// S_CBRANCH_VCCNZ
    UINT64_C(3213230080),	// S_CBRANCH_VCCZ
    UINT64_C(2969567232),	// S_CMOVK_I32_si
    UINT64_C(2961178624),	// S_CMOVK_I32_vi
    UINT64_C(3196060928),	// S_CMOV_B32_si
    UINT64_C(3196060160),	// S_CMOV_B32_vi
    UINT64_C(3196061184),	// S_CMOV_B64_si
    UINT64_C(3196060416),	// S_CMOV_B64_vi
    UINT64_C(2977955840),	// S_CMPK_EQ_I32_si
    UINT64_C(2969567232),	// S_CMPK_EQ_I32_vi
    UINT64_C(3028287488),	// S_CMPK_EQ_U32_si
    UINT64_C(3019898880),	// S_CMPK_EQ_U32_vi
    UINT64_C(3003121664),	// S_CMPK_GE_I32_si
    UINT64_C(2994733056),	// S_CMPK_GE_I32_vi
    UINT64_C(3053453312),	// S_CMPK_GE_U32_si
    UINT64_C(3045064704),	// S_CMPK_GE_U32_vi
    UINT64_C(2994733056),	// S_CMPK_GT_I32_si
    UINT64_C(2986344448),	// S_CMPK_GT_I32_vi
    UINT64_C(3045064704),	// S_CMPK_GT_U32_si
    UINT64_C(3036676096),	// S_CMPK_GT_U32_vi
    UINT64_C(3019898880),	// S_CMPK_LE_I32_si
    UINT64_C(3011510272),	// S_CMPK_LE_I32_vi
    UINT64_C(3070230528),	// S_CMPK_LE_U32_si
    UINT64_C(3061841920),	// S_CMPK_LE_U32_vi
    UINT64_C(2986344448),	// S_CMPK_LG_I32_si
    UINT64_C(2977955840),	// S_CMPK_LG_I32_vi
    UINT64_C(3036676096),	// S_CMPK_LG_U32_si
    UINT64_C(3028287488),	// S_CMPK_LG_U32_vi
    UINT64_C(3011510272),	// S_CMPK_LT_I32_si
    UINT64_C(3003121664),	// S_CMPK_LT_I32_vi
    UINT64_C(3061841920),	// S_CMPK_LT_U32_si
    UINT64_C(3053453312),	// S_CMPK_LT_U32_vi
    UINT64_C(3204448256),	// S_CMP_EQ_I32
    UINT64_C(3204841472),	// S_CMP_EQ_U32
    UINT64_C(3205627904),	// S_CMP_EQ_U64
    UINT64_C(3204644864),	// S_CMP_GE_I32
    UINT64_C(3205038080),	// S_CMP_GE_U32
    UINT64_C(3204579328),	// S_CMP_GT_I32
    UINT64_C(3204972544),	// S_CMP_GT_U32
    UINT64_C(3204775936),	// S_CMP_LE_I32
    UINT64_C(3205169152),	// S_CMP_LE_U32
    UINT64_C(3204513792),	// S_CMP_LG_I32
    UINT64_C(3204907008),	// S_CMP_LG_U32
    UINT64_C(3205693440),	// S_CMP_LG_U64
    UINT64_C(3204710400),	// S_CMP_LT_I32
    UINT64_C(3205103616),	// S_CMP_LT_U32
    UINT64_C(2231369728),	// S_CSELECT_B32_si
    UINT64_C(2231369728),	// S_CSELECT_B32_vi
    UINT64_C(2239758336),	// S_CSELECT_B64_si
    UINT64_C(2239758336),	// S_CSELECT_B64_vi
    UINT64_C(3231842304),	// S_DCACHE_DISCARD_IMM_vi
    UINT64_C(3231711232),	// S_DCACHE_DISCARD_SGPR_vi
    UINT64_C(3232104448),	// S_DCACHE_DISCARD_X2_IMM_vi
    UINT64_C(3231973376),	// S_DCACHE_DISCARD_X2_SGPR_vi
    UINT64_C(3342860288),	// S_DCACHE_INV_VOL_ci
    UINT64_C(3230138368),	// S_DCACHE_INV_VOL_vi
    UINT64_C(3351248896),	// S_DCACHE_INV_si
    UINT64_C(3229614080),	// S_DCACHE_INV_vi
    UINT64_C(3230400512),	// S_DCACHE_WB_VOL_vi
    UINT64_C(3229876224),	// S_DCACHE_WB_vi
    UINT64_C(3214213120),	// S_DECPERFLEVEL
    UINT64_C(3212902400),	// S_ENDPGM
    UINT64_C(3214802944),	// S_ENDPGM_ORDERED_PS_DONE
    UINT64_C(3214606336),	// S_ENDPGM_SAVED
    UINT64_C(3196064000),	// S_FF0_I32_B32_si
    UINT64_C(3196063232),	// S_FF0_I32_B32_vi
    UINT64_C(3196064256),	// S_FF0_I32_B64_si
    UINT64_C(3196063488),	// S_FF0_I32_B64_vi
    UINT64_C(3196064512),	// S_FF1_I32_B32_si
    UINT64_C(3196063744),	// S_FF1_I32_B32_vi
    UINT64_C(3196064768),	// S_FF1_I32_B64_si
    UINT64_C(3196064000),	// S_FF1_I32_B64_vi
    UINT64_C(3196065024),	// S_FLBIT_I32_B32_si
    UINT64_C(3196064256),	// S_FLBIT_I32_B32_vi
    UINT64_C(3196065280),	// S_FLBIT_I32_B64_si
    UINT64_C(3196064512),	// S_FLBIT_I32_B64_vi
    UINT64_C(3196065792),	// S_FLBIT_I32_I64_si
    UINT64_C(3196065024),	// S_FLBIT_I32_I64_vi
    UINT64_C(3196065536),	// S_FLBIT_I32_si
    UINT64_C(3196064768),	// S_FLBIT_I32_vi
    UINT64_C(3196067584),	// S_GETPC_B64_si
    UINT64_C(3196066816),	// S_GETPC_B64_vi
    UINT64_C(3103784960),	// S_GETREG_B32_si
    UINT64_C(3095396352),	// S_GETREG_B32_vi
    UINT64_C(3214082048),	// S_ICACHE_INV
    UINT64_C(3214147584),	// S_INCPERFLEVEL
    UINT64_C(3238002943),	// S_LOAD_DWORDX16_IMM_ci
    UINT64_C(3238002944),	// S_LOAD_DWORDX16_IMM_si
    UINT64_C(3222405120),	// S_LOAD_DWORDX16_IMM_vi
    UINT64_C(3238002688),	// S_LOAD_DWORDX16_SGPR_si
    UINT64_C(3222274048),	// S_LOAD_DWORDX16_SGPR_vi
    UINT64_C(3225420031),	// S_LOAD_DWORDX2_IMM_ci
    UINT64_C(3225420032),	// S_LOAD_DWORDX2_IMM_si
    UINT64_C(3221618688),	// S_LOAD_DWORDX2_IMM_vi
    UINT64_C(3225419776),	// S_LOAD_DWORDX2_SGPR_si
    UINT64_C(3221487616),	// S_LOAD_DWORDX2_SGPR_vi
    UINT64_C(3229614335),	// S_LOAD_DWORDX4_IMM_ci
    UINT64_C(3229614336),	// S_LOAD_DWORDX4_IMM_si
    UINT64_C(3221880832),	// S_LOAD_DWORDX4_IMM_vi
    UINT64_C(3229614080),	// S_LOAD_DWORDX4_SGPR_si
    UINT64_C(3221749760),	// S_LOAD_DWORDX4_SGPR_vi
    UINT64_C(3233808639),	// S_LOAD_DWORDX8_IMM_ci
    UINT64_C(3233808640),	// S_LOAD_DWORDX8_IMM_si
    UINT64_C(3222142976),	// S_LOAD_DWORDX8_IMM_vi
    UINT64_C(3233808384),	// S_LOAD_DWORDX8_SGPR_si
    UINT64_C(3222011904),	// S_LOAD_DWORDX8_SGPR_vi
    UINT64_C(3221225727),	// S_LOAD_DWORD_IMM_ci
    UINT64_C(3221225728),	// S_LOAD_DWORD_IMM_si
    UINT64_C(3221356544),	// S_LOAD_DWORD_IMM_vi
    UINT64_C(3221225472),	// S_LOAD_DWORD_SGPR_si
    UINT64_C(3221225472),	// S_LOAD_DWORD_SGPR_vi
    UINT64_C(2533359616),	// S_LSHL1_ADD_U32_vi
    UINT64_C(2541748224),	// S_LSHL2_ADD_U32_vi
    UINT64_C(2550136832),	// S_LSHL3_ADD_U32_vi
    UINT64_C(2558525440),	// S_LSHL4_ADD_U32_vi
    UINT64_C(2399141888),	// S_LSHL_B32_si
    UINT64_C(2382364672),	// S_LSHL_B32_vi
    UINT64_C(2407530496),	// S_LSHL_B64_si
    UINT64_C(2390753280),	// S_LSHL_B64_vi
    UINT64_C(2415919104),	// S_LSHR_B32_si
    UINT64_C(2399141888),	// S_LSHR_B32_vi
    UINT64_C(2424307712),	// S_LSHR_B64_si
    UINT64_C(2407530496),	// S_LSHR_B64_vi
    UINT64_C(2214592512),	// S_MAX_I32_si
    UINT64_C(2214592512),	// S_MAX_I32_vi
    UINT64_C(2222981120),	// S_MAX_U32_si
    UINT64_C(2222981120),	// S_MAX_U32_vi
    UINT64_C(3230924800),	// S_MEMREALTIME_vi
    UINT64_C(3347054592),	// S_MEMTIME_si
    UINT64_C(3230662656),	// S_MEMTIME_vi
    UINT64_C(2197815296),	// S_MIN_I32_si
    UINT64_C(2197815296),	// S_MIN_I32_vi
    UINT64_C(2206203904),	// S_MIN_U32_si
    UINT64_C(2206203904),	// S_MIN_U32_vi
    UINT64_C(2952790016),	// S_MOVK_I32_si
    UINT64_C(2952790016),	// S_MOVK_I32_vi
    UINT64_C(3196071936),	// S_MOVRELD_B32_si
    UINT64_C(3196070912),	// S_MOVRELD_B32_vi
    UINT64_C(3196072192),	// S_MOVRELD_B64_si
    UINT64_C(3196071168),	// S_MOVRELD_B64_vi
    UINT64_C(3196071424),	// S_MOVRELS_B32_si
    UINT64_C(3196070400),	// S_MOVRELS_B32_vi
    UINT64_C(3196071680),	// S_MOVRELS_B64_si
    UINT64_C(3196070656),	// S_MOVRELS_B64_vi
    UINT64_C(3196060416),	// S_MOV_B32_si
    UINT64_C(3196059648),	// S_MOV_B32_vi
    UINT64_C(3196060672),	// S_MOV_B64_si
    UINT64_C(3196059904),	// S_MOV_B64_vi
    UINT64_C(3196073216),	// S_MOV_FED_B32_si
    UINT64_C(3196072192),	// S_MOV_FED_B32_vi
    UINT64_C(3196072704),	// S_MOV_REGRD_B32_si
    UINT64_C(3196071680),	// S_MOV_REGRD_B32_vi
    UINT64_C(3087007744),	// S_MULK_I32_si
    UINT64_C(3078619136),	// S_MULK_I32_vi
    UINT64_C(2524971008),	// S_MUL_HI_I32_vi
    UINT64_C(2516582400),	// S_MUL_HI_U32_vi
    UINT64_C(2466250752),	// S_MUL_I32_si
    UINT64_C(2449473536),	// S_MUL_I32_vi
    UINT64_C(2348810240),	// S_NAND_B32_si
    UINT64_C(2332033024),	// S_NAND_B32_vi
    UINT64_C(2357198848),	// S_NAND_B64_si
    UINT64_C(2340421632),	// S_NAND_B64_vi
    UINT64_C(3196070144),	// S_NAND_SAVEEXEC_B64_si
    UINT64_C(3196069120),	// S_NAND_SAVEEXEC_B64_vi
    UINT64_C(3212836864),	// S_NOP
    UINT64_C(2365587456),	// S_NOR_B32_si
    UINT64_C(2348810240),	// S_NOR_B32_vi
    UINT64_C(2373976064),	// S_NOR_B64_si
    UINT64_C(2357198848),	// S_NOR_B64_vi
    UINT64_C(3196070400),	// S_NOR_SAVEEXEC_B64_si
    UINT64_C(3196069376),	// S_NOR_SAVEEXEC_B64_vi
    UINT64_C(3196061440),	// S_NOT_B32_si
    UINT64_C(3196060672),	// S_NOT_B32_vi
    UINT64_C(3196061696),	// S_NOT_B64_si
    UINT64_C(3196060928),	// S_NOT_B64_vi
    UINT64_C(3196072960),	// S_ORN1_SAVEEXEC_B64_vi
    UINT64_C(2332033024),	// S_ORN2_B32_si
    UINT64_C(2315255808),	// S_ORN2_B32_vi
    UINT64_C(2340421632),	// S_ORN2_B64_si
    UINT64_C(2323644416),	// S_ORN2_B64_vi
    UINT64_C(3196069888),	// S_ORN2_SAVEEXEC_B64_si
    UINT64_C(3196068864),	// S_ORN2_SAVEEXEC_B64_vi
    UINT64_C(2281701376),	// S_OR_B32_si
    UINT64_C(2264924160),	// S_OR_B32_vi
    UINT64_C(2290089984),	// S_OR_B64_si
    UINT64_C(2273312768),	// S_OR_B64_vi
    UINT64_C(3196069120),	// S_OR_SAVEEXEC_B64_si
    UINT64_C(3196068096),	// S_OR_SAVEEXEC_B64_vi
    UINT64_C(2583691264),	// S_PACK_HH_B32_B16_vi
    UINT64_C(2575302656),	// S_PACK_LH_B32_B16_vi
    UINT64_C(2566914048),	// S_PACK_LL_B32_B16_vi
    UINT64_C(3196070912),	// S_QUADMASK_B32_si
    UINT64_C(3196069888),	// S_QUADMASK_B32_vi
    UINT64_C(3196071168),	// S_QUADMASK_B64_si
    UINT64_C(3196070144),	// S_QUADMASK_B64_vi
    UINT64_C(3196068352),	// S_RFE_B64_si
    UINT64_C(3196067584),	// S_RFE_B64_vi
    UINT64_C(2508193792),	// S_RFE_RESTORE_B64_vi
    UINT64_C(3222929408),	// S_SCRATCH_LOAD_DWORDX2_IMM_vi
    UINT64_C(3222798336),	// S_SCRATCH_LOAD_DWORDX2_SGPR_vi
    UINT64_C(3223191552),	// S_SCRATCH_LOAD_DWORDX4_IMM_vi
    UINT64_C(3223060480),	// S_SCRATCH_LOAD_DWORDX4_SGPR_vi
    UINT64_C(3222667264),	// S_SCRATCH_LOAD_DWORD_IMM_vi
    UINT64_C(3222536192),	// S_SCRATCH_LOAD_DWORD_SGPR_vi
    UINT64_C(3227123712),	// S_SCRATCH_STORE_DWORDX2_IMM_vi
    UINT64_C(3226992640),	// S_SCRATCH_STORE_DWORDX2_SGPR_vi
    UINT64_C(3227385856),	// S_SCRATCH_STORE_DWORDX4_IMM_vi
    UINT64_C(3227254784),	// S_SCRATCH_STORE_DWORDX4_SGPR_vi
    UINT64_C(3226861568),	// S_SCRATCH_STORE_DWORD_IMM_vi
    UINT64_C(3226730496),	// S_SCRATCH_STORE_DWORD_SGPR_vi
    UINT64_C(3213885440),	// S_SENDMSG
    UINT64_C(3213950976),	// S_SENDMSGHALT
    UINT64_C(3213688832),	// S_SETHALT
    UINT64_C(3213557760),	// S_SETKILL
    UINT64_C(3196067840),	// S_SETPC_B64_si
    UINT64_C(3196067072),	// S_SETPC_B64_vi
    UINT64_C(3213819904),	// S_SETPRIO
    UINT64_C(3112173568),	// S_SETREG_B32_si
    UINT64_C(3103784960),	// S_SETREG_B32_vi
    UINT64_C(3128950784),	// S_SETREG_IMM32_B32_si
    UINT64_C(3120562176),	// S_SETREG_IMM32_B32_vi
    UINT64_C(3205496832),	// S_SETVSKIP
    UINT64_C(3196072448),	// S_SET_GPR_IDX_IDX_vi
    UINT64_C(3214737408),	// S_SET_GPR_IDX_MODE
    UINT64_C(3214671872),	// S_SET_GPR_IDX_OFF
    UINT64_C(3205562368),	// S_SET_GPR_IDX_ON
    UINT64_C(3196066304),	// S_SEXT_I32_I16_si
    UINT64_C(3196065536),	// S_SEXT_I32_I16_vi
    UINT64_C(3196066048),	// S_SEXT_I32_I8_si
    UINT64_C(3196065280),	// S_SEXT_I32_I8_vi
    UINT64_C(3213754368),	// S_SLEEP
    UINT64_C(3225812992),	// S_STORE_DWORDX2_IMM_vi
    UINT64_C(3225681920),	// S_STORE_DWORDX2_SGPR_vi
    UINT64_C(3226075136),	// S_STORE_DWORDX4_IMM_vi
    UINT64_C(3225944064),	// S_STORE_DWORDX4_SGPR_vi
    UINT64_C(3225550848),	// S_STORE_DWORD_IMM_vi
    UINT64_C(3225419776),	// S_STORE_DWORD_SGPR_vi
    UINT64_C(2189426688),	// S_SUBB_U32_si
    UINT64_C(2189426688),	// S_SUBB_U32_vi
    UINT64_C(2172649472),	// S_SUB_I32_si
    UINT64_C(2172649472),	// S_SUB_I32_vi
    UINT64_C(2155872256),	// S_SUB_U32_si
    UINT64_C(2155872256),	// S_SUB_U32_vi
    UINT64_C(3196068096),	// S_SWAPPC_B64_si
    UINT64_C(3196067328),	// S_SWAPPC_B64_vi
    UINT64_C(3214016512),	// S_TRAP
    UINT64_C(3214278656),	// S_TTRACEDATA
    UINT64_C(3213623296),	// S_WAITCNT
    UINT64_C(3213033472),	// S_WAKEUP
    UINT64_C(3196061952),	// S_WQM_B32_si
    UINT64_C(3196061184),	// S_WQM_B32_vi
    UINT64_C(3196062208),	// S_WQM_B64_si
    UINT64_C(3196061440),	// S_WQM_B64_vi
    UINT64_C(2382364672),	// S_XNOR_B32_si
    UINT64_C(2365587456),	// S_XNOR_B32_vi
    UINT64_C(2390753280),	// S_XNOR_B64_si
    UINT64_C(2373976064),	// S_XNOR_B64_vi
    UINT64_C(3196070656),	// S_XNOR_SAVEEXEC_B64_si
    UINT64_C(3196069632),	// S_XNOR_SAVEEXEC_B64_vi
    UINT64_C(2298478592),	// S_XOR_B32_si
    UINT64_C(2281701376),	// S_XOR_B32_vi
    UINT64_C(2306867200),	// S_XOR_B64_si
    UINT64_C(2290089984),	// S_XOR_B64_vi
    UINT64_C(3196069376),	// S_XOR_SAVEEXEC_B64_si
    UINT64_C(3196068352),	// S_XOR_SAVEEXEC_B64_vi
    UINT64_C(3892686848),	// TBUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN_vi
    UINT64_C(3892682752),	// TBUFFER_LOAD_FORMAT_D16_XYZW_IDXEN_vi
    UINT64_C(3892678656),	// TBUFFER_LOAD_FORMAT_D16_XYZW_OFFEN_vi
    UINT64_C(3892674560),	// TBUFFER_LOAD_FORMAT_D16_XYZW_OFFSET_vi
    UINT64_C(3892686848),	// TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80
    UINT64_C(3892682752),	// TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_IDXEN_gfx80
    UINT64_C(3892678656),	// TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFEN_gfx80
    UINT64_C(3892674560),	// TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80
    UINT64_C(3892654080),	// TBUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN_vi
    UINT64_C(3892649984),	// TBUFFER_LOAD_FORMAT_D16_XYZ_IDXEN_vi
    UINT64_C(3892645888),	// TBUFFER_LOAD_FORMAT_D16_XYZ_OFFEN_vi
    UINT64_C(3892641792),	// TBUFFER_LOAD_FORMAT_D16_XYZ_OFFSET_vi
    UINT64_C(3892654080),	// TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_BOTHEN_gfx80
    UINT64_C(3892649984),	// TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_IDXEN_gfx80
    UINT64_C(3892645888),	// TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFEN_gfx80
    UINT64_C(3892641792),	// TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFSET_gfx80
    UINT64_C(3892621312),	// TBUFFER_LOAD_FORMAT_D16_XY_BOTHEN_vi
    UINT64_C(3892617216),	// TBUFFER_LOAD_FORMAT_D16_XY_IDXEN_vi
    UINT64_C(3892613120),	// TBUFFER_LOAD_FORMAT_D16_XY_OFFEN_vi
    UINT64_C(3892609024),	// TBUFFER_LOAD_FORMAT_D16_XY_OFFSET_vi
    UINT64_C(3892621312),	// TBUFFER_LOAD_FORMAT_D16_XY_gfx80_BOTHEN_gfx80
    UINT64_C(3892617216),	// TBUFFER_LOAD_FORMAT_D16_XY_gfx80_IDXEN_gfx80
    UINT64_C(3892613120),	// TBUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFEN_gfx80
    UINT64_C(3892609024),	// TBUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFSET_gfx80
    UINT64_C(3892588544),	// TBUFFER_LOAD_FORMAT_D16_X_BOTHEN_vi
    UINT64_C(3892584448),	// TBUFFER_LOAD_FORMAT_D16_X_IDXEN_vi
    UINT64_C(3892580352),	// TBUFFER_LOAD_FORMAT_D16_X_OFFEN_vi
    UINT64_C(3892576256),	// TBUFFER_LOAD_FORMAT_D16_X_OFFSET_vi
    UINT64_C(3892588544),	// TBUFFER_LOAD_FORMAT_D16_X_gfx80_BOTHEN_gfx80
    UINT64_C(3892584448),	// TBUFFER_LOAD_FORMAT_D16_X_gfx80_IDXEN_gfx80
    UINT64_C(3892580352),	// TBUFFER_LOAD_FORMAT_D16_X_gfx80_OFFEN_gfx80
    UINT64_C(3892576256),	// TBUFFER_LOAD_FORMAT_D16_X_gfx80_OFFSET_gfx80
    UINT64_C(3892543488),	// TBUFFER_LOAD_FORMAT_XYZW_ADDR64_si
    UINT64_C(3892523008),	// TBUFFER_LOAD_FORMAT_XYZW_BOTHEN_si
    UINT64_C(3892424704),	// TBUFFER_LOAD_FORMAT_XYZW_BOTHEN_vi
    UINT64_C(3892518912),	// TBUFFER_LOAD_FORMAT_XYZW_IDXEN_si
    UINT64_C(3892420608),	// TBUFFER_LOAD_FORMAT_XYZW_IDXEN_vi
    UINT64_C(3892514816),	// TBUFFER_LOAD_FORMAT_XYZW_OFFEN_si
    UINT64_C(3892416512),	// TBUFFER_LOAD_FORMAT_XYZW_OFFEN_vi
    UINT64_C(3892510720),	// TBUFFER_LOAD_FORMAT_XYZW_OFFSET_si
    UINT64_C(3892412416),	// TBUFFER_LOAD_FORMAT_XYZW_OFFSET_vi
    UINT64_C(3892477952),	// TBUFFER_LOAD_FORMAT_XYZ_ADDR64_si
    UINT64_C(3892457472),	// TBUFFER_LOAD_FORMAT_XYZ_BOTHEN_si
    UINT64_C(3892391936),	// TBUFFER_LOAD_FORMAT_XYZ_BOTHEN_vi
    UINT64_C(3892453376),	// TBUFFER_LOAD_FORMAT_XYZ_IDXEN_si
    UINT64_C(3892387840),	// TBUFFER_LOAD_FORMAT_XYZ_IDXEN_vi
    UINT64_C(3892449280),	// TBUFFER_LOAD_FORMAT_XYZ_OFFEN_si
    UINT64_C(3892383744),	// TBUFFER_LOAD_FORMAT_XYZ_OFFEN_vi
    UINT64_C(3892445184),	// TBUFFER_LOAD_FORMAT_XYZ_OFFSET_si
    UINT64_C(3892379648),	// TBUFFER_LOAD_FORMAT_XYZ_OFFSET_vi
    UINT64_C(3892412416),	// TBUFFER_LOAD_FORMAT_XY_ADDR64_si
    UINT64_C(3892391936),	// TBUFFER_LOAD_FORMAT_XY_BOTHEN_si
    UINT64_C(3892359168),	// TBUFFER_LOAD_FORMAT_XY_BOTHEN_vi
    UINT64_C(3892387840),	// TBUFFER_LOAD_FORMAT_XY_IDXEN_si
    UINT64_C(3892355072),	// TBUFFER_LOAD_FORMAT_XY_IDXEN_vi
    UINT64_C(3892383744),	// TBUFFER_LOAD_FORMAT_XY_OFFEN_si
    UINT64_C(3892350976),	// TBUFFER_LOAD_FORMAT_XY_OFFEN_vi
    UINT64_C(3892379648),	// TBUFFER_LOAD_FORMAT_XY_OFFSET_si
    UINT64_C(3892346880),	// TBUFFER_LOAD_FORMAT_XY_OFFSET_vi
    UINT64_C(3892346880),	// TBUFFER_LOAD_FORMAT_X_ADDR64_si
    UINT64_C(3892326400),	// TBUFFER_LOAD_FORMAT_X_BOTHEN_si
    UINT64_C(3892326400),	// TBUFFER_LOAD_FORMAT_X_BOTHEN_vi
    UINT64_C(3892322304),	// TBUFFER_LOAD_FORMAT_X_IDXEN_si
    UINT64_C(3892322304),	// TBUFFER_LOAD_FORMAT_X_IDXEN_vi
    UINT64_C(3892318208),	// TBUFFER_LOAD_FORMAT_X_OFFEN_si
    UINT64_C(3892318208),	// TBUFFER_LOAD_FORMAT_X_OFFEN_vi
    UINT64_C(3892314112),	// TBUFFER_LOAD_FORMAT_X_OFFSET_si
    UINT64_C(3892314112),	// TBUFFER_LOAD_FORMAT_X_OFFSET_vi
    UINT64_C(3892817920),	// TBUFFER_STORE_FORMAT_D16_XYZW_BOTHEN_vi
    UINT64_C(3892813824),	// TBUFFER_STORE_FORMAT_D16_XYZW_IDXEN_vi
    UINT64_C(3892809728),	// TBUFFER_STORE_FORMAT_D16_XYZW_OFFEN_vi
    UINT64_C(3892805632),	// TBUFFER_STORE_FORMAT_D16_XYZW_OFFSET_vi
    UINT64_C(3892817920),	// TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80
    UINT64_C(3892813824),	// TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_IDXEN_gfx80
    UINT64_C(3892809728),	// TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFEN_gfx80
    UINT64_C(3892805632),	// TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80
    UINT64_C(3892785152),	// TBUFFER_STORE_FORMAT_D16_XYZ_BOTHEN_vi
    UINT64_C(3892781056),	// TBUFFER_STORE_FORMAT_D16_XYZ_IDXEN_vi
    UINT64_C(3892776960),	// TBUFFER_STORE_FORMAT_D16_XYZ_OFFEN_vi
    UINT64_C(3892772864),	// TBUFFER_STORE_FORMAT_D16_XYZ_OFFSET_vi
    UINT64_C(3892785152),	// TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_BOTHEN_gfx80
    UINT64_C(3892781056),	// TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_IDXEN_gfx80
    UINT64_C(3892776960),	// TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFEN_gfx80
    UINT64_C(3892772864),	// TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFSET_gfx80
    UINT64_C(3892752384),	// TBUFFER_STORE_FORMAT_D16_XY_BOTHEN_vi
    UINT64_C(3892748288),	// TBUFFER_STORE_FORMAT_D16_XY_IDXEN_vi
    UINT64_C(3892744192),	// TBUFFER_STORE_FORMAT_D16_XY_OFFEN_vi
    UINT64_C(3892740096),	// TBUFFER_STORE_FORMAT_D16_XY_OFFSET_vi
    UINT64_C(3892752384),	// TBUFFER_STORE_FORMAT_D16_XY_gfx80_BOTHEN_gfx80
    UINT64_C(3892748288),	// TBUFFER_STORE_FORMAT_D16_XY_gfx80_IDXEN_gfx80
    UINT64_C(3892744192),	// TBUFFER_STORE_FORMAT_D16_XY_gfx80_OFFEN_gfx80
    UINT64_C(3892740096),	// TBUFFER_STORE_FORMAT_D16_XY_gfx80_OFFSET_gfx80
    UINT64_C(3892719616),	// TBUFFER_STORE_FORMAT_D16_X_BOTHEN_vi
    UINT64_C(3892715520),	// TBUFFER_STORE_FORMAT_D16_X_IDXEN_vi
    UINT64_C(3892711424),	// TBUFFER_STORE_FORMAT_D16_X_OFFEN_vi
    UINT64_C(3892707328),	// TBUFFER_STORE_FORMAT_D16_X_OFFSET_vi
    UINT64_C(3892719616),	// TBUFFER_STORE_FORMAT_D16_X_gfx80_BOTHEN_gfx80
    UINT64_C(3892715520),	// TBUFFER_STORE_FORMAT_D16_X_gfx80_IDXEN_gfx80
    UINT64_C(3892711424),	// TBUFFER_STORE_FORMAT_D16_X_gfx80_OFFEN_gfx80
    UINT64_C(3892707328),	// TBUFFER_STORE_FORMAT_D16_X_gfx80_OFFSET_gfx80
    UINT64_C(3892805632),	// TBUFFER_STORE_FORMAT_XYZW_ADDR64_si
    UINT64_C(3892785152),	// TBUFFER_STORE_FORMAT_XYZW_BOTHEN_si
    UINT64_C(3892555776),	// TBUFFER_STORE_FORMAT_XYZW_BOTHEN_vi
    UINT64_C(3892781056),	// TBUFFER_STORE_FORMAT_XYZW_IDXEN_si
    UINT64_C(3892551680),	// TBUFFER_STORE_FORMAT_XYZW_IDXEN_vi
    UINT64_C(3892776960),	// TBUFFER_STORE_FORMAT_XYZW_OFFEN_si
    UINT64_C(3892547584),	// TBUFFER_STORE_FORMAT_XYZW_OFFEN_vi
    UINT64_C(3892772864),	// TBUFFER_STORE_FORMAT_XYZW_OFFSET_si
    UINT64_C(3892543488),	// TBUFFER_STORE_FORMAT_XYZW_OFFSET_vi
    UINT64_C(3892740096),	// TBUFFER_STORE_FORMAT_XYZ_ADDR64_si
    UINT64_C(3892719616),	// TBUFFER_STORE_FORMAT_XYZ_BOTHEN_si
    UINT64_C(3892523008),	// TBUFFER_STORE_FORMAT_XYZ_BOTHEN_vi
    UINT64_C(3892715520),	// TBUFFER_STORE_FORMAT_XYZ_IDXEN_si
    UINT64_C(3892518912),	// TBUFFER_STORE_FORMAT_XYZ_IDXEN_vi
    UINT64_C(3892711424),	// TBUFFER_STORE_FORMAT_XYZ_OFFEN_si
    UINT64_C(3892514816),	// TBUFFER_STORE_FORMAT_XYZ_OFFEN_vi
    UINT64_C(3892707328),	// TBUFFER_STORE_FORMAT_XYZ_OFFSET_si
    UINT64_C(3892510720),	// TBUFFER_STORE_FORMAT_XYZ_OFFSET_vi
    UINT64_C(3892674560),	// TBUFFER_STORE_FORMAT_XY_ADDR64_si
    UINT64_C(3892654080),	// TBUFFER_STORE_FORMAT_XY_BOTHEN_si
    UINT64_C(3892490240),	// TBUFFER_STORE_FORMAT_XY_BOTHEN_vi
    UINT64_C(3892649984),	// TBUFFER_STORE_FORMAT_XY_IDXEN_si
    UINT64_C(3892486144),	// TBUFFER_STORE_FORMAT_XY_IDXEN_vi
    UINT64_C(3892645888),	// TBUFFER_STORE_FORMAT_XY_OFFEN_si
    UINT64_C(3892482048),	// TBUFFER_STORE_FORMAT_XY_OFFEN_vi
    UINT64_C(3892641792),	// TBUFFER_STORE_FORMAT_XY_OFFSET_si
    UINT64_C(3892477952),	// TBUFFER_STORE_FORMAT_XY_OFFSET_vi
    UINT64_C(3892609024),	// TBUFFER_STORE_FORMAT_X_ADDR64_si
    UINT64_C(3892588544),	// TBUFFER_STORE_FORMAT_X_BOTHEN_si
    UINT64_C(3892457472),	// TBUFFER_STORE_FORMAT_X_BOTHEN_vi
    UINT64_C(3892584448),	// TBUFFER_STORE_FORMAT_X_IDXEN_si
    UINT64_C(3892453376),	// TBUFFER_STORE_FORMAT_X_IDXEN_vi
    UINT64_C(3892580352),	// TBUFFER_STORE_FORMAT_X_OFFEN_si
    UINT64_C(3892449280),	// TBUFFER_STORE_FORMAT_X_OFFEN_vi
    UINT64_C(3892576256),	// TBUFFER_STORE_FORMAT_X_OFFSET_si
    UINT64_C(3892445184),	// TBUFFER_STORE_FORMAT_X_OFFSET_vi
    UINT64_C(3523149824),	// V_ADD3_U32_vi
    UINT64_C(939524346),	// V_ADDC_CO_U32_dpp_gfx9
    UINT64_C(939524096),	// V_ADDC_CO_U32_e32_gfx9
    UINT64_C(3508273152),	// V_ADDC_CO_U32_e64_gfx9
    UINT64_C(939524345),	// V_ADDC_CO_U32_sdwa_gfx9
    UINT64_C(939524346),	// V_ADDC_U32_dpp_vi
    UINT64_C(1342177280),	// V_ADDC_U32_e32_si
    UINT64_C(939524096),	// V_ADDC_U32_e32_vi
    UINT64_C(3528458240),	// V_ADDC_U32_e64_si
    UINT64_C(3508273152),	// V_ADDC_U32_e64_vi
    UINT64_C(939524345),	// V_ADDC_U32_sdwa_vi
    UINT64_C(838861050),	// V_ADD_CO_U32_dpp_gfx9
    UINT64_C(838860800),	// V_ADD_CO_U32_e32_gfx9
    UINT64_C(3508076544),	// V_ADD_CO_U32_e64_gfx9
    UINT64_C(838861049),	// V_ADD_CO_U32_sdwa_gfx9
    UINT64_C(1040187642),	// V_ADD_F16_dpp_vi
    UINT64_C(1040187392),	// V_ADD_F16_e32_vi
    UINT64_C(3508469760),	// V_ADD_F16_e64_vi
    UINT64_C(1040187641),	// V_ADD_F16_sdwa_gfx9
    UINT64_C(1040187641),	// V_ADD_F16_sdwa_vi
    UINT64_C(33554682),	// V_ADD_F32_dpp_vi
    UINT64_C(100663296),	// V_ADD_F32_e32_si
    UINT64_C(33554432),	// V_ADD_F32_e32_vi
    UINT64_C(3523608576),	// V_ADD_F32_e64_si
    UINT64_C(3506503680),	// V_ADD_F32_e64_vi
    UINT64_C(33554681),	// V_ADD_F32_sdwa_gfx9
    UINT64_C(33554681),	// V_ADD_F32_sdwa_vi
    UINT64_C(3536322560),	// V_ADD_F64_si
    UINT64_C(3531603968),	// V_ADD_F64_vi
    UINT64_C(3533570048),	// V_ADD_I16_vi
    UINT64_C(1241513984),	// V_ADD_I32_e32_si
    UINT64_C(3528065024),	// V_ADD_I32_e64_si
    UINT64_C(3533438976),	// V_ADD_I32_gfx9_gfx9
    UINT64_C(3523084288),	// V_ADD_LSHL_U32_vi
    UINT64_C(1275068666),	// V_ADD_U16_dpp_vi
    UINT64_C(1275068416),	// V_ADD_U16_e32_vi
    UINT64_C(3508928512),	// V_ADD_U16_e64_vi
    UINT64_C(1275068665),	// V_ADD_U16_sdwa_gfx9
    UINT64_C(1275068665),	// V_ADD_U16_sdwa_vi
    UINT64_C(1744830714),	// V_ADD_U32_dpp_gfx9
    UINT64_C(838861050),	// V_ADD_U32_dpp_vi
    UINT64_C(1744830464),	// V_ADD_U32_e32_gfx9
    UINT64_C(838860800),	// V_ADD_U32_e32_vi
    UINT64_C(3509846016),	// V_ADD_U32_e64_gfx9
    UINT64_C(3508076544),	// V_ADD_U32_e64_vi
    UINT64_C(1744830713),	// V_ADD_U32_sdwa_gfx9
    UINT64_C(838861049),	// V_ADD_U32_sdwa_vi
    UINT64_C(3533438976),	// V_ALIGNBIT_B32_si
    UINT64_C(3519938560),	// V_ALIGNBIT_B32_vi
    UINT64_C(3533570048),	// V_ALIGNBYTE_B32_si
    UINT64_C(3520004096),	// V_ALIGNBYTE_B32_vi
    UINT64_C(637534458),	// V_AND_B32_dpp_vi
    UINT64_C(905969664),	// V_AND_B32_e32_si
    UINT64_C(637534208),	// V_AND_B32_e32_vi
    UINT64_C(3526754304),	// V_AND_B32_e64_si
    UINT64_C(3507683328),	// V_AND_B32_e64_vi
    UINT64_C(637534457),	// V_AND_B32_sdwa_gfx9
    UINT64_C(637534457),	// V_AND_B32_sdwa_vi
    UINT64_C(3523280896),	// V_AND_OR_B32_vi
    UINT64_C(1476395258),	// V_ASHRREV_I16_dpp_vi
    UINT64_C(1476395008),	// V_ASHRREV_I16_e32_vi
    UINT64_C(3509321728),	// V_ASHRREV_I16_e64_vi
    UINT64_C(1476395257),	// V_ASHRREV_I16_sdwa_gfx9
    UINT64_C(1476395257),	// V_ASHRREV_I16_sdwa_vi
    UINT64_C(570425594),	// V_ASHRREV_I32_dpp_vi
    UINT64_C(805306368),	// V_ASHRREV_I32_e32_si
    UINT64_C(570425344),	// V_ASHRREV_I32_e32_vi
    UINT64_C(3526361088),	// V_ASHRREV_I32_e64_si
    UINT64_C(3507552256),	// V_ASHRREV_I32_e64_vi
    UINT64_C(570425593),	// V_ASHRREV_I32_sdwa_gfx9
    UINT64_C(570425593),	// V_ASHRREV_I32_sdwa_vi
    UINT64_C(3532718080),	// V_ASHRREV_I64_vi
    UINT64_C(771751936),	// V_ASHR_I32_e32_si
    UINT64_C(3526230016),	// V_ASHR_I32_e64_si
    UINT64_C(3536191488),	// V_ASHR_I64_si
    UINT64_C(1140850688),	// V_BCNT_U32_B32_e32_si
    UINT64_C(3527671808),	// V_BCNT_U32_B32_e64_si
    UINT64_C(3532324864),	// V_BCNT_U32_B32_e64_vi
    UINT64_C(3532783616),	// V_BFE_I32_si
    UINT64_C(3519610880),	// V_BFE_I32_vi
    UINT64_C(3532652544),	// V_BFE_U32_si
    UINT64_C(3519545344),	// V_BFE_U32_vi
    UINT64_C(3532914688),	// V_BFI_B32_si
    UINT64_C(3519676416),	// V_BFI_B32_vi
    UINT64_C(1006632960),	// V_BFM_B32_e32_si
    UINT64_C(3527147520),	// V_BFM_B32_e64_si
    UINT64_C(3532849152),	// V_BFM_B32_e64_vi
    UINT64_C(2113951994),	// V_BFREV_B32_dpp_vi
    UINT64_C(2113957888),	// V_BFREV_B32_e32_si
    UINT64_C(2113951744),	// V_BFREV_B32_e32_vi
    UINT64_C(3547332608),	// V_BFREV_B32_e64_si
    UINT64_C(3513516032),	// V_BFREV_B32_e64_vi
    UINT64_C(2113951993),	// V_BFREV_B32_sdwa_gfx9
    UINT64_C(2113951993),	// V_BFREV_B32_sdwa_vi
    UINT64_C(2113964794),	// V_CEIL_F16_dpp_vi
    UINT64_C(2113964544),	// V_CEIL_F16_e32_vi
    UINT64_C(3515154432),	// V_CEIL_F16_e64_vi
    UINT64_C(2113964793),	// V_CEIL_F16_sdwa_gfx9
    UINT64_C(2113964793),	// V_CEIL_F16_sdwa_vi
    UINT64_C(2113944314),	// V_CEIL_F32_dpp_vi
    UINT64_C(2113946624),	// V_CEIL_F32_e32_si
    UINT64_C(2113944064),	// V_CEIL_F32_e32_vi
    UINT64_C(3544449024),	// V_CEIL_F32_e64_si
    UINT64_C(3512532992),	// V_CEIL_F32_e64_vi
    UINT64_C(2113944313),	// V_CEIL_F32_sdwa_gfx9
    UINT64_C(2113944313),	// V_CEIL_F32_sdwa_vi
    UINT64_C(2113941504),	// V_CEIL_F64_e32_ci
    UINT64_C(2113941504),	// V_CEIL_F64_e32_vi
    UINT64_C(3543138304),	// V_CEIL_F64_e64_ci
    UINT64_C(3512205312),	// V_CEIL_F64_e64_vi
    UINT64_C(2113941753),	// V_CEIL_F64_sdwa_gfx9
    UINT64_C(2113941753),	// V_CEIL_F64_sdwa_vi
    UINT64_C(2113962496),	// V_CLREXCP_e32_si
    UINT64_C(2113956352),	// V_CLREXCP_e32_vi
    UINT64_C(3548512256),	// V_CLREXCP_e64_si
    UINT64_C(3514105856),	// V_CLREXCP_e64_vi
    UINT64_C(2113956601),	// V_CLREXCP_sdwa_gfx9
    UINT64_C(2113956601),	// V_CLREXCP_sdwa_vi
    UINT64_C(2091122688),	// V_CMPSX_EQ_F32_e32_si
    UINT64_C(3500408832),	// V_CMPSX_EQ_F32_e64_si
    UINT64_C(2095316992),	// V_CMPSX_EQ_F64_e32_si
    UINT64_C(3504603136),	// V_CMPSX_EQ_F64_e64_si
    UINT64_C(2090860544),	// V_CMPSX_F_F32_e32_si
    UINT64_C(3500146688),	// V_CMPSX_F_F32_e64_si
    UINT64_C(2095054848),	// V_CMPSX_F_F64_e32_si
    UINT64_C(3504340992),	// V_CMPSX_F_F64_e64_si
    UINT64_C(2091646976),	// V_CMPSX_GE_F32_e32_si
    UINT64_C(3500933120),	// V_CMPSX_GE_F32_e64_si
    UINT64_C(2095841280),	// V_CMPSX_GE_F64_e32_si
    UINT64_C(3505127424),	// V_CMPSX_GE_F64_e64_si
    UINT64_C(2091384832),	// V_CMPSX_GT_F32_e32_si
    UINT64_C(3500670976),	// V_CMPSX_GT_F32_e64_si
    UINT64_C(2095579136),	// V_CMPSX_GT_F64_e32_si
    UINT64_C(3504865280),	// V_CMPSX_GT_F64_e64_si
    UINT64_C(2091253760),	// V_CMPSX_LE_F32_e32_si
    UINT64_C(3500539904),	// V_CMPSX_LE_F32_e64_si
    UINT64_C(2095448064),	// V_CMPSX_LE_F64_e32_si
    UINT64_C(3504734208),	// V_CMPSX_LE_F64_e64_si
    UINT64_C(2091515904),	// V_CMPSX_LG_F32_e32_si
    UINT64_C(3500802048),	// V_CMPSX_LG_F32_e64_si
    UINT64_C(2095710208),	// V_CMPSX_LG_F64_e32_si
    UINT64_C(3504996352),	// V_CMPSX_LG_F64_e64_si
    UINT64_C(2090991616),	// V_CMPSX_LT_F32_e32_si
    UINT64_C(3500277760),	// V_CMPSX_LT_F32_e64_si
    UINT64_C(2095185920),	// V_CMPSX_LT_F64_e32_si
    UINT64_C(3504472064),	// V_CMPSX_LT_F64_e64_si
    UINT64_C(2092564480),	// V_CMPSX_NEQ_F32_e32_si
    UINT64_C(3501850624),	// V_CMPSX_NEQ_F32_e64_si
    UINT64_C(2096758784),	// V_CMPSX_NEQ_F64_e32_si
    UINT64_C(3506044928),	// V_CMPSX_NEQ_F64_e64_si
    UINT64_C(2092040192),	// V_CMPSX_NGE_F32_e32_si
    UINT64_C(3501326336),	// V_CMPSX_NGE_F32_e64_si
    UINT64_C(2096234496),	// V_CMPSX_NGE_F64_e32_si
    UINT64_C(3505520640),	// V_CMPSX_NGE_F64_e64_si
    UINT64_C(2092302336),	// V_CMPSX_NGT_F32_e32_si
    UINT64_C(3501588480),	// V_CMPSX_NGT_F32_e64_si
    UINT64_C(2096496640),	// V_CMPSX_NGT_F64_e32_si
    UINT64_C(3505782784),	// V_CMPSX_NGT_F64_e64_si
    UINT64_C(2092433408),	// V_CMPSX_NLE_F32_e32_si
    UINT64_C(3501719552),	// V_CMPSX_NLE_F32_e64_si
    UINT64_C(2096627712),	// V_CMPSX_NLE_F64_e32_si
    UINT64_C(3505913856),	// V_CMPSX_NLE_F64_e64_si
    UINT64_C(2092171264),	// V_CMPSX_NLG_F32_e32_si
    UINT64_C(3501457408),	// V_CMPSX_NLG_F32_e64_si
    UINT64_C(2096365568),	// V_CMPSX_NLG_F64_e32_si
    UINT64_C(3505651712),	// V_CMPSX_NLG_F64_e64_si
    UINT64_C(2092695552),	// V_CMPSX_NLT_F32_e32_si
    UINT64_C(3501981696),	// V_CMPSX_NLT_F32_e64_si
    UINT64_C(2096889856),	// V_CMPSX_NLT_F64_e32_si
    UINT64_C(3506176000),	// V_CMPSX_NLT_F64_e64_si
    UINT64_C(2091778048),	// V_CMPSX_O_F32_e32_si
    UINT64_C(3501064192),	// V_CMPSX_O_F32_e64_si
    UINT64_C(2095972352),	// V_CMPSX_O_F64_e32_si
    UINT64_C(3505258496),	// V_CMPSX_O_F64_e64_si
    UINT64_C(2092826624),	// V_CMPSX_TRU_F32_e32_si
    UINT64_C(3502112768),	// V_CMPSX_TRU_F32_e64_si
    UINT64_C(2097020928),	// V_CMPSX_TRU_F64_e32_si
    UINT64_C(3506307072),	// V_CMPSX_TRU_F64_e64_si
    UINT64_C(2091909120),	// V_CMPSX_U_F32_e32_si
    UINT64_C(3501195264),	// V_CMPSX_U_F32_e64_si
    UINT64_C(2096103424),	// V_CMPSX_U_F64_e32_si
    UINT64_C(3505389568),	// V_CMPSX_U_F64_e64_si
    UINT64_C(2089025536),	// V_CMPS_EQ_F32_e32_si
    UINT64_C(3498311680),	// V_CMPS_EQ_F32_e64_si
    UINT64_C(2093219840),	// V_CMPS_EQ_F64_e32_si
    UINT64_C(3502505984),	// V_CMPS_EQ_F64_e64_si
    UINT64_C(2088763392),	// V_CMPS_F_F32_e32_si
    UINT64_C(3498049536),	// V_CMPS_F_F32_e64_si
    UINT64_C(2092957696),	// V_CMPS_F_F64_e32_si
    UINT64_C(3502243840),	// V_CMPS_F_F64_e64_si
    UINT64_C(2089549824),	// V_CMPS_GE_F32_e32_si
    UINT64_C(3498835968),	// V_CMPS_GE_F32_e64_si
    UINT64_C(2093744128),	// V_CMPS_GE_F64_e32_si
    UINT64_C(3503030272),	// V_CMPS_GE_F64_e64_si
    UINT64_C(2089287680),	// V_CMPS_GT_F32_e32_si
    UINT64_C(3498573824),	// V_CMPS_GT_F32_e64_si
    UINT64_C(2093481984),	// V_CMPS_GT_F64_e32_si
    UINT64_C(3502768128),	// V_CMPS_GT_F64_e64_si
    UINT64_C(2089156608),	// V_CMPS_LE_F32_e32_si
    UINT64_C(3498442752),	// V_CMPS_LE_F32_e64_si
    UINT64_C(2093350912),	// V_CMPS_LE_F64_e32_si
    UINT64_C(3502637056),	// V_CMPS_LE_F64_e64_si
    UINT64_C(2089418752),	// V_CMPS_LG_F32_e32_si
    UINT64_C(3498704896),	// V_CMPS_LG_F32_e64_si
    UINT64_C(2093613056),	// V_CMPS_LG_F64_e32_si
    UINT64_C(3502899200),	// V_CMPS_LG_F64_e64_si
    UINT64_C(2088894464),	// V_CMPS_LT_F32_e32_si
    UINT64_C(3498180608),	// V_CMPS_LT_F32_e64_si
    UINT64_C(2093088768),	// V_CMPS_LT_F64_e32_si
    UINT64_C(3502374912),	// V_CMPS_LT_F64_e64_si
    UINT64_C(2090467328),	// V_CMPS_NEQ_F32_e32_si
    UINT64_C(3499753472),	// V_CMPS_NEQ_F32_e64_si
    UINT64_C(2094661632),	// V_CMPS_NEQ_F64_e32_si
    UINT64_C(3503947776),	// V_CMPS_NEQ_F64_e64_si
    UINT64_C(2089943040),	// V_CMPS_NGE_F32_e32_si
    UINT64_C(3499229184),	// V_CMPS_NGE_F32_e64_si
    UINT64_C(2094137344),	// V_CMPS_NGE_F64_e32_si
    UINT64_C(3503423488),	// V_CMPS_NGE_F64_e64_si
    UINT64_C(2090205184),	// V_CMPS_NGT_F32_e32_si
    UINT64_C(3499491328),	// V_CMPS_NGT_F32_e64_si
    UINT64_C(2094399488),	// V_CMPS_NGT_F64_e32_si
    UINT64_C(3503685632),	// V_CMPS_NGT_F64_e64_si
    UINT64_C(2090336256),	// V_CMPS_NLE_F32_e32_si
    UINT64_C(3499622400),	// V_CMPS_NLE_F32_e64_si
    UINT64_C(2094530560),	// V_CMPS_NLE_F64_e32_si
    UINT64_C(3503816704),	// V_CMPS_NLE_F64_e64_si
    UINT64_C(2090074112),	// V_CMPS_NLG_F32_e32_si
    UINT64_C(3499360256),	// V_CMPS_NLG_F32_e64_si
    UINT64_C(2094268416),	// V_CMPS_NLG_F64_e32_si
    UINT64_C(3503554560),	// V_CMPS_NLG_F64_e64_si
    UINT64_C(2090598400),	// V_CMPS_NLT_F32_e32_si
    UINT64_C(3499884544),	// V_CMPS_NLT_F32_e64_si
    UINT64_C(2094792704),	// V_CMPS_NLT_F64_e32_si
    UINT64_C(3504078848),	// V_CMPS_NLT_F64_e64_si
    UINT64_C(2089680896),	// V_CMPS_O_F32_e32_si
    UINT64_C(3498967040),	// V_CMPS_O_F32_e64_si
    UINT64_C(2093875200),	// V_CMPS_O_F64_e32_si
    UINT64_C(3503161344),	// V_CMPS_O_F64_e64_si
    UINT64_C(2090729472),	// V_CMPS_TRU_F32_e32_si
    UINT64_C(3500015616),	// V_CMPS_TRU_F32_e64_si
    UINT64_C(2094923776),	// V_CMPS_TRU_F64_e32_si
    UINT64_C(3504209920),	// V_CMPS_TRU_F64_e64_si
    UINT64_C(2089811968),	// V_CMPS_U_F32_e32_si
    UINT64_C(3499098112),	// V_CMPS_U_F32_e64_si
    UINT64_C(2094006272),	// V_CMPS_U_F64_e32_si
    UINT64_C(3503292416),	// V_CMPS_U_F64_e64_si
    UINT64_C(2083127296),	// V_CMPX_CLASS_F16_e32_vi
    UINT64_C(3491037184),	// V_CMPX_CLASS_F16_e64_vi
    UINT64_C(2083127545),	// V_CMPX_CLASS_F16_sdwa_gfx9
    UINT64_C(2083127545),	// V_CMPX_CLASS_F16_sdwa_vi
    UINT64_C(2100297728),	// V_CMPX_CLASS_F32_e32_si
    UINT64_C(2082603008),	// V_CMPX_CLASS_F32_e32_vi
    UINT64_C(3509583872),	// V_CMPX_CLASS_F32_e64_si
    UINT64_C(3490775040),	// V_CMPX_CLASS_F32_e64_vi
    UINT64_C(2082603257),	// V_CMPX_CLASS_F32_sdwa_gfx9
    UINT64_C(2082603257),	// V_CMPX_CLASS_F32_sdwa_vi
    UINT64_C(2104492032),	// V_CMPX_CLASS_F64_e32_si
    UINT64_C(2082865152),	// V_CMPX_CLASS_F64_e32_vi
    UINT64_C(3513778176),	// V_CMPX_CLASS_F64_e64_si
    UINT64_C(3490906112),	// V_CMPX_CLASS_F64_e64_vi
    UINT64_C(2082865401),	// V_CMPX_CLASS_F64_sdwa_gfx9
    UINT64_C(2082865401),	// V_CMPX_CLASS_F64_sdwa_vi
    UINT64_C(2086928384),	// V_CMPX_EQ_F16_e32_vi
    UINT64_C(3492937728),	// V_CMPX_EQ_F16_e64_vi
    UINT64_C(2086928633),	// V_CMPX_EQ_F16_sdwa_gfx9
    UINT64_C(2086928633),	// V_CMPX_EQ_F16_sdwa_vi
    UINT64_C(2082734080),	// V_CMPX_EQ_F32_e32_si
    UINT64_C(2091122688),	// V_CMPX_EQ_F32_e32_vi
    UINT64_C(3492020224),	// V_CMPX_EQ_F32_e64_si
    UINT64_C(3495034880),	// V_CMPX_EQ_F32_e64_vi
    UINT64_C(2091122937),	// V_CMPX_EQ_F32_sdwa_gfx9
    UINT64_C(2091122937),	// V_CMPX_EQ_F32_sdwa_vi
    UINT64_C(2086928384),	// V_CMPX_EQ_F64_e32_si
    UINT64_C(2095316992),	// V_CMPX_EQ_F64_e32_vi
    UINT64_C(3496214528),	// V_CMPX_EQ_F64_e64_si
    UINT64_C(3497132032),	// V_CMPX_EQ_F64_e64_vi
    UINT64_C(2095317241),	// V_CMPX_EQ_F64_sdwa_gfx9
    UINT64_C(2095317241),	// V_CMPX_EQ_F64_sdwa_vi
    UINT64_C(2103705600),	// V_CMPX_EQ_I16_e32_vi
    UINT64_C(3501326336),	// V_CMPX_EQ_I16_e64_vi
    UINT64_C(2103705849),	// V_CMPX_EQ_I16_sdwa_gfx9
    UINT64_C(2103705849),	// V_CMPX_EQ_I16_sdwa_vi
    UINT64_C(2099511296),	// V_CMPX_EQ_I32_e32_si
    UINT64_C(2107899904),	// V_CMPX_EQ_I32_e32_vi
    UINT64_C(3508797440),	// V_CMPX_EQ_I32_e64_si
    UINT64_C(3503423488),	// V_CMPX_EQ_I32_e64_vi
    UINT64_C(2107900153),	// V_CMPX_EQ_I32_sdwa_gfx9
    UINT64_C(2107900153),	// V_CMPX_EQ_I32_sdwa_vi
    UINT64_C(2103705600),	// V_CMPX_EQ_I64_e32_si
    UINT64_C(2112094208),	// V_CMPX_EQ_I64_e32_vi
    UINT64_C(3512991744),	// V_CMPX_EQ_I64_e64_si
    UINT64_C(3505520640),	// V_CMPX_EQ_I64_e64_vi
    UINT64_C(2112094457),	// V_CMPX_EQ_I64_sdwa_gfx9
    UINT64_C(2112094457),	// V_CMPX_EQ_I64_sdwa_vi
    UINT64_C(2104754176),	// V_CMPX_EQ_U16_e32_vi
    UINT64_C(3501850624),	// V_CMPX_EQ_U16_e64_vi
    UINT64_C(2104754425),	// V_CMPX_EQ_U16_sdwa_gfx9
    UINT64_C(2104754425),	// V_CMPX_EQ_U16_sdwa_vi
    UINT64_C(2107899904),	// V_CMPX_EQ_U32_e32_si
    UINT64_C(2108948480),	// V_CMPX_EQ_U32_e32_vi
    UINT64_C(3517186048),	// V_CMPX_EQ_U32_e64_si
    UINT64_C(3503947776),	// V_CMPX_EQ_U32_e64_vi
    UINT64_C(2108948729),	// V_CMPX_EQ_U32_sdwa_gfx9
    UINT64_C(2108948729),	// V_CMPX_EQ_U32_sdwa_vi
    UINT64_C(2112094208),	// V_CMPX_EQ_U64_e32_si
    UINT64_C(2113142784),	// V_CMPX_EQ_U64_e32_vi
    UINT64_C(3521380352),	// V_CMPX_EQ_U64_e64_si
    UINT64_C(3506044928),	// V_CMPX_EQ_U64_e64_vi
    UINT64_C(2113143033),	// V_CMPX_EQ_U64_sdwa_gfx9
    UINT64_C(2113143033),	// V_CMPX_EQ_U64_sdwa_vi
    UINT64_C(2086666240),	// V_CMPX_F_F16_e32_vi
    UINT64_C(3492806656),	// V_CMPX_F_F16_e64_vi
    UINT64_C(2086666489),	// V_CMPX_F_F16_sdwa_gfx9
    UINT64_C(2086666489),	// V_CMPX_F_F16_sdwa_vi
    UINT64_C(2082471936),	// V_CMPX_F_F32_e32_si
    UINT64_C(2090860544),	// V_CMPX_F_F32_e32_vi
    UINT64_C(3491758080),	// V_CMPX_F_F32_e64_si
    UINT64_C(3494903808),	// V_CMPX_F_F32_e64_vi
    UINT64_C(2090860793),	// V_CMPX_F_F32_sdwa_gfx9
    UINT64_C(2090860793),	// V_CMPX_F_F32_sdwa_vi
    UINT64_C(2086666240),	// V_CMPX_F_F64_e32_si
    UINT64_C(2095054848),	// V_CMPX_F_F64_e32_vi
    UINT64_C(3495952384),	// V_CMPX_F_F64_e64_si
    UINT64_C(3497000960),	// V_CMPX_F_F64_e64_vi
    UINT64_C(2095055097),	// V_CMPX_F_F64_sdwa_gfx9
    UINT64_C(2095055097),	// V_CMPX_F_F64_sdwa_vi
    UINT64_C(2103443456),	// V_CMPX_F_I16_e32_vi
    UINT64_C(3501195264),	// V_CMPX_F_I16_e64_vi
    UINT64_C(2103443705),	// V_CMPX_F_I16_sdwa_gfx9
    UINT64_C(2103443705),	// V_CMPX_F_I16_sdwa_vi
    UINT64_C(2099249152),	// V_CMPX_F_I32_e32_si
    UINT64_C(2107637760),	// V_CMPX_F_I32_e32_vi
    UINT64_C(3508535296),	// V_CMPX_F_I32_e64_si
    UINT64_C(3503292416),	// V_CMPX_F_I32_e64_vi
    UINT64_C(2107638009),	// V_CMPX_F_I32_sdwa_gfx9
    UINT64_C(2107638009),	// V_CMPX_F_I32_sdwa_vi
    UINT64_C(2103443456),	// V_CMPX_F_I64_e32_si
    UINT64_C(2111832064),	// V_CMPX_F_I64_e32_vi
    UINT64_C(3512729600),	// V_CMPX_F_I64_e64_si
    UINT64_C(3505389568),	// V_CMPX_F_I64_e64_vi
    UINT64_C(2111832313),	// V_CMPX_F_I64_sdwa_gfx9
    UINT64_C(2111832313),	// V_CMPX_F_I64_sdwa_vi
    UINT64_C(2104492032),	// V_CMPX_F_U16_e32_vi
    UINT64_C(3501719552),	// V_CMPX_F_U16_e64_vi
    UINT64_C(2104492281),	// V_CMPX_F_U16_sdwa_gfx9
    UINT64_C(2104492281),	// V_CMPX_F_U16_sdwa_vi
    UINT64_C(2107637760),	// V_CMPX_F_U32_e32_si
    UINT64_C(2108686336),	// V_CMPX_F_U32_e32_vi
    UINT64_C(3516923904),	// V_CMPX_F_U32_e64_si
    UINT64_C(3503816704),	// V_CMPX_F_U32_e64_vi
    UINT64_C(2108686585),	// V_CMPX_F_U32_sdwa_gfx9
    UINT64_C(2108686585),	// V_CMPX_F_U32_sdwa_vi
    UINT64_C(2111832064),	// V_CMPX_F_U64_e32_si
    UINT64_C(2112880640),	// V_CMPX_F_U64_e32_vi
    UINT64_C(3521118208),	// V_CMPX_F_U64_e64_si
    UINT64_C(3505913856),	// V_CMPX_F_U64_e64_vi
    UINT64_C(2112880889),	// V_CMPX_F_U64_sdwa_gfx9
    UINT64_C(2112880889),	// V_CMPX_F_U64_sdwa_vi
    UINT64_C(2087452672),	// V_CMPX_GE_F16_e32_vi
    UINT64_C(3493199872),	// V_CMPX_GE_F16_e64_vi
    UINT64_C(2087452921),	// V_CMPX_GE_F16_sdwa_gfx9
    UINT64_C(2087452921),	// V_CMPX_GE_F16_sdwa_vi
    UINT64_C(2083258368),	// V_CMPX_GE_F32_e32_si
    UINT64_C(2091646976),	// V_CMPX_GE_F32_e32_vi
    UINT64_C(3492544512),	// V_CMPX_GE_F32_e64_si
    UINT64_C(3495297024),	// V_CMPX_GE_F32_e64_vi
    UINT64_C(2091647225),	// V_CMPX_GE_F32_sdwa_gfx9
    UINT64_C(2091647225),	// V_CMPX_GE_F32_sdwa_vi
    UINT64_C(2087452672),	// V_CMPX_GE_F64_e32_si
    UINT64_C(2095841280),	// V_CMPX_GE_F64_e32_vi
    UINT64_C(3496738816),	// V_CMPX_GE_F64_e64_si
    UINT64_C(3497394176),	// V_CMPX_GE_F64_e64_vi
    UINT64_C(2095841529),	// V_CMPX_GE_F64_sdwa_gfx9
    UINT64_C(2095841529),	// V_CMPX_GE_F64_sdwa_vi
    UINT64_C(2104229888),	// V_CMPX_GE_I16_e32_vi
    UINT64_C(3501588480),	// V_CMPX_GE_I16_e64_vi
    UINT64_C(2104230137),	// V_CMPX_GE_I16_sdwa_gfx9
    UINT64_C(2104230137),	// V_CMPX_GE_I16_sdwa_vi
    UINT64_C(2100035584),	// V_CMPX_GE_I32_e32_si
    UINT64_C(2108424192),	// V_CMPX_GE_I32_e32_vi
    UINT64_C(3509321728),	// V_CMPX_GE_I32_e64_si
    UINT64_C(3503685632),	// V_CMPX_GE_I32_e64_vi
    UINT64_C(2108424441),	// V_CMPX_GE_I32_sdwa_gfx9
    UINT64_C(2108424441),	// V_CMPX_GE_I32_sdwa_vi
    UINT64_C(2104229888),	// V_CMPX_GE_I64_e32_si
    UINT64_C(2112618496),	// V_CMPX_GE_I64_e32_vi
    UINT64_C(3513516032),	// V_CMPX_GE_I64_e64_si
    UINT64_C(3505782784),	// V_CMPX_GE_I64_e64_vi
    UINT64_C(2112618745),	// V_CMPX_GE_I64_sdwa_gfx9
    UINT64_C(2112618745),	// V_CMPX_GE_I64_sdwa_vi
    UINT64_C(2105278464),	// V_CMPX_GE_U16_e32_vi
    UINT64_C(3502112768),	// V_CMPX_GE_U16_e64_vi
    UINT64_C(2105278713),	// V_CMPX_GE_U16_sdwa_gfx9
    UINT64_C(2105278713),	// V_CMPX_GE_U16_sdwa_vi
    UINT64_C(2108424192),	// V_CMPX_GE_U32_e32_si
    UINT64_C(2109472768),	// V_CMPX_GE_U32_e32_vi
    UINT64_C(3517710336),	// V_CMPX_GE_U32_e64_si
    UINT64_C(3504209920),	// V_CMPX_GE_U32_e64_vi
    UINT64_C(2109473017),	// V_CMPX_GE_U32_sdwa_gfx9
    UINT64_C(2109473017),	// V_CMPX_GE_U32_sdwa_vi
    UINT64_C(2112618496),	// V_CMPX_GE_U64_e32_si
    UINT64_C(2113667072),	// V_CMPX_GE_U64_e32_vi
    UINT64_C(3521904640),	// V_CMPX_GE_U64_e64_si
    UINT64_C(3506307072),	// V_CMPX_GE_U64_e64_vi
    UINT64_C(2113667321),	// V_CMPX_GE_U64_sdwa_gfx9
    UINT64_C(2113667321),	// V_CMPX_GE_U64_sdwa_vi
    UINT64_C(2087190528),	// V_CMPX_GT_F16_e32_vi
    UINT64_C(3493068800),	// V_CMPX_GT_F16_e64_vi
    UINT64_C(2087190777),	// V_CMPX_GT_F16_sdwa_gfx9
    UINT64_C(2087190777),	// V_CMPX_GT_F16_sdwa_vi
    UINT64_C(2082996224),	// V_CMPX_GT_F32_e32_si
    UINT64_C(2091384832),	// V_CMPX_GT_F32_e32_vi
    UINT64_C(3492282368),	// V_CMPX_GT_F32_e64_si
    UINT64_C(3495165952),	// V_CMPX_GT_F32_e64_vi
    UINT64_C(2091385081),	// V_CMPX_GT_F32_sdwa_gfx9
    UINT64_C(2091385081),	// V_CMPX_GT_F32_sdwa_vi
    UINT64_C(2087190528),	// V_CMPX_GT_F64_e32_si
    UINT64_C(2095579136),	// V_CMPX_GT_F64_e32_vi
    UINT64_C(3496476672),	// V_CMPX_GT_F64_e64_si
    UINT64_C(3497263104),	// V_CMPX_GT_F64_e64_vi
    UINT64_C(2095579385),	// V_CMPX_GT_F64_sdwa_gfx9
    UINT64_C(2095579385),	// V_CMPX_GT_F64_sdwa_vi
    UINT64_C(2103967744),	// V_CMPX_GT_I16_e32_vi
    UINT64_C(3501457408),	// V_CMPX_GT_I16_e64_vi
    UINT64_C(2103967993),	// V_CMPX_GT_I16_sdwa_gfx9
    UINT64_C(2103967993),	// V_CMPX_GT_I16_sdwa_vi
    UINT64_C(2099773440),	// V_CMPX_GT_I32_e32_si
    UINT64_C(2108162048),	// V_CMPX_GT_I32_e32_vi
    UINT64_C(3509059584),	// V_CMPX_GT_I32_e64_si
    UINT64_C(3503554560),	// V_CMPX_GT_I32_e64_vi
    UINT64_C(2108162297),	// V_CMPX_GT_I32_sdwa_gfx9
    UINT64_C(2108162297),	// V_CMPX_GT_I32_sdwa_vi
    UINT64_C(2103967744),	// V_CMPX_GT_I64_e32_si
    UINT64_C(2112356352),	// V_CMPX_GT_I64_e32_vi
    UINT64_C(3513253888),	// V_CMPX_GT_I64_e64_si
    UINT64_C(3505651712),	// V_CMPX_GT_I64_e64_vi
    UINT64_C(2112356601),	// V_CMPX_GT_I64_sdwa_gfx9
    UINT64_C(2112356601),	// V_CMPX_GT_I64_sdwa_vi
    UINT64_C(2105016320),	// V_CMPX_GT_U16_e32_vi
    UINT64_C(3501981696),	// V_CMPX_GT_U16_e64_vi
    UINT64_C(2105016569),	// V_CMPX_GT_U16_sdwa_gfx9
    UINT64_C(2105016569),	// V_CMPX_GT_U16_sdwa_vi
    UINT64_C(2108162048),	// V_CMPX_GT_U32_e32_si
    UINT64_C(2109210624),	// V_CMPX_GT_U32_e32_vi
    UINT64_C(3517448192),	// V_CMPX_GT_U32_e64_si
    UINT64_C(3504078848),	// V_CMPX_GT_U32_e64_vi
    UINT64_C(2109210873),	// V_CMPX_GT_U32_sdwa_gfx9
    UINT64_C(2109210873),	// V_CMPX_GT_U32_sdwa_vi
    UINT64_C(2112356352),	// V_CMPX_GT_U64_e32_si
    UINT64_C(2113404928),	// V_CMPX_GT_U64_e32_vi
    UINT64_C(3521642496),	// V_CMPX_GT_U64_e64_si
    UINT64_C(3506176000),	// V_CMPX_GT_U64_e64_vi
    UINT64_C(2113405177),	// V_CMPX_GT_U64_sdwa_gfx9
    UINT64_C(2113405177),	// V_CMPX_GT_U64_sdwa_vi
    UINT64_C(2087059456),	// V_CMPX_LE_F16_e32_vi
    UINT64_C(3493003264),	// V_CMPX_LE_F16_e64_vi
    UINT64_C(2087059705),	// V_CMPX_LE_F16_sdwa_gfx9
    UINT64_C(2087059705),	// V_CMPX_LE_F16_sdwa_vi
    UINT64_C(2082865152),	// V_CMPX_LE_F32_e32_si
    UINT64_C(2091253760),	// V_CMPX_LE_F32_e32_vi
    UINT64_C(3492151296),	// V_CMPX_LE_F32_e64_si
    UINT64_C(3495100416),	// V_CMPX_LE_F32_e64_vi
    UINT64_C(2091254009),	// V_CMPX_LE_F32_sdwa_gfx9
    UINT64_C(2091254009),	// V_CMPX_LE_F32_sdwa_vi
    UINT64_C(2087059456),	// V_CMPX_LE_F64_e32_si
    UINT64_C(2095448064),	// V_CMPX_LE_F64_e32_vi
    UINT64_C(3496345600),	// V_CMPX_LE_F64_e64_si
    UINT64_C(3497197568),	// V_CMPX_LE_F64_e64_vi
    UINT64_C(2095448313),	// V_CMPX_LE_F64_sdwa_gfx9
    UINT64_C(2095448313),	// V_CMPX_LE_F64_sdwa_vi
    UINT64_C(2103836672),	// V_CMPX_LE_I16_e32_vi
    UINT64_C(3501391872),	// V_CMPX_LE_I16_e64_vi
    UINT64_C(2103836921),	// V_CMPX_LE_I16_sdwa_gfx9
    UINT64_C(2103836921),	// V_CMPX_LE_I16_sdwa_vi
    UINT64_C(2099642368),	// V_CMPX_LE_I32_e32_si
    UINT64_C(2108030976),	// V_CMPX_LE_I32_e32_vi
    UINT64_C(3508928512),	// V_CMPX_LE_I32_e64_si
    UINT64_C(3503489024),	// V_CMPX_LE_I32_e64_vi
    UINT64_C(2108031225),	// V_CMPX_LE_I32_sdwa_gfx9
    UINT64_C(2108031225),	// V_CMPX_LE_I32_sdwa_vi
    UINT64_C(2103836672),	// V_CMPX_LE_I64_e32_si
    UINT64_C(2112225280),	// V_CMPX_LE_I64_e32_vi
    UINT64_C(3513122816),	// V_CMPX_LE_I64_e64_si
    UINT64_C(3505586176),	// V_CMPX_LE_I64_e64_vi
    UINT64_C(2112225529),	// V_CMPX_LE_I64_sdwa_gfx9
    UINT64_C(2112225529),	// V_CMPX_LE_I64_sdwa_vi
    UINT64_C(2104885248),	// V_CMPX_LE_U16_e32_vi
    UINT64_C(3501916160),	// V_CMPX_LE_U16_e64_vi
    UINT64_C(2104885497),	// V_CMPX_LE_U16_sdwa_gfx9
    UINT64_C(2104885497),	// V_CMPX_LE_U16_sdwa_vi
    UINT64_C(2108030976),	// V_CMPX_LE_U32_e32_si
    UINT64_C(2109079552),	// V_CMPX_LE_U32_e32_vi
    UINT64_C(3517317120),	// V_CMPX_LE_U32_e64_si
    UINT64_C(3504013312),	// V_CMPX_LE_U32_e64_vi
    UINT64_C(2109079801),	// V_CMPX_LE_U32_sdwa_gfx9
    UINT64_C(2109079801),	// V_CMPX_LE_U32_sdwa_vi
    UINT64_C(2112225280),	// V_CMPX_LE_U64_e32_si
    UINT64_C(2113273856),	// V_CMPX_LE_U64_e32_vi
    UINT64_C(3521511424),	// V_CMPX_LE_U64_e64_si
    UINT64_C(3506110464),	// V_CMPX_LE_U64_e64_vi
    UINT64_C(2113274105),	// V_CMPX_LE_U64_sdwa_gfx9
    UINT64_C(2113274105),	// V_CMPX_LE_U64_sdwa_vi
    UINT64_C(2087321600),	// V_CMPX_LG_F16_e32_vi
    UINT64_C(3493134336),	// V_CMPX_LG_F16_e64_vi
    UINT64_C(2087321849),	// V_CMPX_LG_F16_sdwa_gfx9
    UINT64_C(2087321849),	// V_CMPX_LG_F16_sdwa_vi
    UINT64_C(2083127296),	// V_CMPX_LG_F32_e32_si
    UINT64_C(2091515904),	// V_CMPX_LG_F32_e32_vi
    UINT64_C(3492413440),	// V_CMPX_LG_F32_e64_si
    UINT64_C(3495231488),	// V_CMPX_LG_F32_e64_vi
    UINT64_C(2091516153),	// V_CMPX_LG_F32_sdwa_gfx9
    UINT64_C(2091516153),	// V_CMPX_LG_F32_sdwa_vi
    UINT64_C(2087321600),	// V_CMPX_LG_F64_e32_si
    UINT64_C(2095710208),	// V_CMPX_LG_F64_e32_vi
    UINT64_C(3496607744),	// V_CMPX_LG_F64_e64_si
    UINT64_C(3497328640),	// V_CMPX_LG_F64_e64_vi
    UINT64_C(2095710457),	// V_CMPX_LG_F64_sdwa_gfx9
    UINT64_C(2095710457),	// V_CMPX_LG_F64_sdwa_vi
    UINT64_C(2086797312),	// V_CMPX_LT_F16_e32_vi
    UINT64_C(3492872192),	// V_CMPX_LT_F16_e64_vi
    UINT64_C(2086797561),	// V_CMPX_LT_F16_sdwa_gfx9
    UINT64_C(2086797561),	// V_CMPX_LT_F16_sdwa_vi
    UINT64_C(2082603008),	// V_CMPX_LT_F32_e32_si
    UINT64_C(2090991616),	// V_CMPX_LT_F32_e32_vi
    UINT64_C(3491889152),	// V_CMPX_LT_F32_e64_si
    UINT64_C(3494969344),	// V_CMPX_LT_F32_e64_vi
    UINT64_C(2090991865),	// V_CMPX_LT_F32_sdwa_gfx9
    UINT64_C(2090991865),	// V_CMPX_LT_F32_sdwa_vi
    UINT64_C(2086797312),	// V_CMPX_LT_F64_e32_si
    UINT64_C(2095185920),	// V_CMPX_LT_F64_e32_vi
    UINT64_C(3496083456),	// V_CMPX_LT_F64_e64_si
    UINT64_C(3497066496),	// V_CMPX_LT_F64_e64_vi
    UINT64_C(2095186169),	// V_CMPX_LT_F64_sdwa_gfx9
    UINT64_C(2095186169),	// V_CMPX_LT_F64_sdwa_vi
    UINT64_C(2103574528),	// V_CMPX_LT_I16_e32_vi
    UINT64_C(3501260800),	// V_CMPX_LT_I16_e64_vi
    UINT64_C(2103574777),	// V_CMPX_LT_I16_sdwa_gfx9
    UINT64_C(2103574777),	// V_CMPX_LT_I16_sdwa_vi
    UINT64_C(2099380224),	// V_CMPX_LT_I32_e32_si
    UINT64_C(2107768832),	// V_CMPX_LT_I32_e32_vi
    UINT64_C(3508666368),	// V_CMPX_LT_I32_e64_si
    UINT64_C(3503357952),	// V_CMPX_LT_I32_e64_vi
    UINT64_C(2107769081),	// V_CMPX_LT_I32_sdwa_gfx9
    UINT64_C(2107769081),	// V_CMPX_LT_I32_sdwa_vi
    UINT64_C(2103574528),	// V_CMPX_LT_I64_e32_si
    UINT64_C(2111963136),	// V_CMPX_LT_I64_e32_vi
    UINT64_C(3512860672),	// V_CMPX_LT_I64_e64_si
    UINT64_C(3505455104),	// V_CMPX_LT_I64_e64_vi
    UINT64_C(2111963385),	// V_CMPX_LT_I64_sdwa_gfx9
    UINT64_C(2111963385),	// V_CMPX_LT_I64_sdwa_vi
    UINT64_C(2104623104),	// V_CMPX_LT_U16_e32_vi
    UINT64_C(3501785088),	// V_CMPX_LT_U16_e64_vi
    UINT64_C(2104623353),	// V_CMPX_LT_U16_sdwa_gfx9
    UINT64_C(2104623353),	// V_CMPX_LT_U16_sdwa_vi
    UINT64_C(2107768832),	// V_CMPX_LT_U32_e32_si
    UINT64_C(2108817408),	// V_CMPX_LT_U32_e32_vi
    UINT64_C(3517054976),	// V_CMPX_LT_U32_e64_si
    UINT64_C(3503882240),	// V_CMPX_LT_U32_e64_vi
    UINT64_C(2108817657),	// V_CMPX_LT_U32_sdwa_gfx9
    UINT64_C(2108817657),	// V_CMPX_LT_U32_sdwa_vi
    UINT64_C(2111963136),	// V_CMPX_LT_U64_e32_si
    UINT64_C(2113011712),	// V_CMPX_LT_U64_e32_vi
    UINT64_C(3521249280),	// V_CMPX_LT_U64_e64_si
    UINT64_C(3505979392),	// V_CMPX_LT_U64_e64_vi
    UINT64_C(2113011961),	// V_CMPX_LT_U64_sdwa_gfx9
    UINT64_C(2113011961),	// V_CMPX_LT_U64_sdwa_vi
    UINT64_C(2088370176),	// V_CMPX_NEQ_F16_e32_vi
    UINT64_C(3493658624),	// V_CMPX_NEQ_F16_e64_vi
    UINT64_C(2088370425),	// V_CMPX_NEQ_F16_sdwa_gfx9
    UINT64_C(2088370425),	// V_CMPX_NEQ_F16_sdwa_vi
    UINT64_C(2084175872),	// V_CMPX_NEQ_F32_e32_si
    UINT64_C(2092564480),	// V_CMPX_NEQ_F32_e32_vi
    UINT64_C(3493462016),	// V_CMPX_NEQ_F32_e64_si
    UINT64_C(3495755776),	// V_CMPX_NEQ_F32_e64_vi
    UINT64_C(2092564729),	// V_CMPX_NEQ_F32_sdwa_gfx9
    UINT64_C(2092564729),	// V_CMPX_NEQ_F32_sdwa_vi
    UINT64_C(2088370176),	// V_CMPX_NEQ_F64_e32_si
    UINT64_C(2096758784),	// V_CMPX_NEQ_F64_e32_vi
    UINT64_C(3497656320),	// V_CMPX_NEQ_F64_e64_si
    UINT64_C(3497852928),	// V_CMPX_NEQ_F64_e64_vi
    UINT64_C(2096759033),	// V_CMPX_NEQ_F64_sdwa_gfx9
    UINT64_C(2096759033),	// V_CMPX_NEQ_F64_sdwa_vi
    UINT64_C(2104098816),	// V_CMPX_NE_I16_e32_vi
    UINT64_C(3501522944),	// V_CMPX_NE_I16_e64_vi
    UINT64_C(2104099065),	// V_CMPX_NE_I16_sdwa_gfx9
    UINT64_C(2104099065),	// V_CMPX_NE_I16_sdwa_vi
    UINT64_C(2099904512),	// V_CMPX_NE_I32_e32_si
    UINT64_C(2108293120),	// V_CMPX_NE_I32_e32_vi
    UINT64_C(3509190656),	// V_CMPX_NE_I32_e64_si
    UINT64_C(3503620096),	// V_CMPX_NE_I32_e64_vi
    UINT64_C(2108293369),	// V_CMPX_NE_I32_sdwa_gfx9
    UINT64_C(2108293369),	// V_CMPX_NE_I32_sdwa_vi
    UINT64_C(2104098816),	// V_CMPX_NE_I64_e32_si
    UINT64_C(2112487424),	// V_CMPX_NE_I64_e32_vi
    UINT64_C(3513384960),	// V_CMPX_NE_I64_e64_si
    UINT64_C(3505717248),	// V_CMPX_NE_I64_e64_vi
    UINT64_C(2112487673),	// V_CMPX_NE_I64_sdwa_gfx9
    UINT64_C(2112487673),	// V_CMPX_NE_I64_sdwa_vi
    UINT64_C(2105147392),	// V_CMPX_NE_U16_e32_vi
    UINT64_C(3502047232),	// V_CMPX_NE_U16_e64_vi
    UINT64_C(2105147641),	// V_CMPX_NE_U16_sdwa_gfx9
    UINT64_C(2105147641),	// V_CMPX_NE_U16_sdwa_vi
    UINT64_C(2108293120),	// V_CMPX_NE_U32_e32_si
    UINT64_C(2109341696),	// V_CMPX_NE_U32_e32_vi
    UINT64_C(3517579264),	// V_CMPX_NE_U32_e64_si
    UINT64_C(3504144384),	// V_CMPX_NE_U32_e64_vi
    UINT64_C(2109341945),	// V_CMPX_NE_U32_sdwa_gfx9
    UINT64_C(2109341945),	// V_CMPX_NE_U32_sdwa_vi
    UINT64_C(2112487424),	// V_CMPX_NE_U64_e32_si
    UINT64_C(2113536000),	// V_CMPX_NE_U64_e32_vi
    UINT64_C(3521773568),	// V_CMPX_NE_U64_e64_si
    UINT64_C(3506241536),	// V_CMPX_NE_U64_e64_vi
    UINT64_C(2113536249),	// V_CMPX_NE_U64_sdwa_gfx9
    UINT64_C(2113536249),	// V_CMPX_NE_U64_sdwa_vi
    UINT64_C(2087845888),	// V_CMPX_NGE_F16_e32_vi
    UINT64_C(3493396480),	// V_CMPX_NGE_F16_e64_vi
    UINT64_C(2087846137),	// V_CMPX_NGE_F16_sdwa_gfx9
    UINT64_C(2087846137),	// V_CMPX_NGE_F16_sdwa_vi
    UINT64_C(2083651584),	// V_CMPX_NGE_F32_e32_si
    UINT64_C(2092040192),	// V_CMPX_NGE_F32_e32_vi
    UINT64_C(3492937728),	// V_CMPX_NGE_F32_e64_si
    UINT64_C(3495493632),	// V_CMPX_NGE_F32_e64_vi
    UINT64_C(2092040441),	// V_CMPX_NGE_F32_sdwa_gfx9
    UINT64_C(2092040441),	// V_CMPX_NGE_F32_sdwa_vi
    UINT64_C(2087845888),	// V_CMPX_NGE_F64_e32_si
    UINT64_C(2096234496),	// V_CMPX_NGE_F64_e32_vi
    UINT64_C(3497132032),	// V_CMPX_NGE_F64_e64_si
    UINT64_C(3497590784),	// V_CMPX_NGE_F64_e64_vi
    UINT64_C(2096234745),	// V_CMPX_NGE_F64_sdwa_gfx9
    UINT64_C(2096234745),	// V_CMPX_NGE_F64_sdwa_vi
    UINT64_C(2088108032),	// V_CMPX_NGT_F16_e32_vi
    UINT64_C(3493527552),	// V_CMPX_NGT_F16_e64_vi
    UINT64_C(2088108281),	// V_CMPX_NGT_F16_sdwa_gfx9
    UINT64_C(2088108281),	// V_CMPX_NGT_F16_sdwa_vi
    UINT64_C(2083913728),	// V_CMPX_NGT_F32_e32_si
    UINT64_C(2092302336),	// V_CMPX_NGT_F32_e32_vi
    UINT64_C(3493199872),	// V_CMPX_NGT_F32_e64_si
    UINT64_C(3495624704),	// V_CMPX_NGT_F32_e64_vi
    UINT64_C(2092302585),	// V_CMPX_NGT_F32_sdwa_gfx9
    UINT64_C(2092302585),	// V_CMPX_NGT_F32_sdwa_vi
    UINT64_C(2088108032),	// V_CMPX_NGT_F64_e32_si
    UINT64_C(2096496640),	// V_CMPX_NGT_F64_e32_vi
    UINT64_C(3497394176),	// V_CMPX_NGT_F64_e64_si
    UINT64_C(3497721856),	// V_CMPX_NGT_F64_e64_vi
    UINT64_C(2096496889),	// V_CMPX_NGT_F64_sdwa_gfx9
    UINT64_C(2096496889),	// V_CMPX_NGT_F64_sdwa_vi
    UINT64_C(2088239104),	// V_CMPX_NLE_F16_e32_vi
    UINT64_C(3493593088),	// V_CMPX_NLE_F16_e64_vi
    UINT64_C(2088239353),	// V_CMPX_NLE_F16_sdwa_gfx9
    UINT64_C(2088239353),	// V_CMPX_NLE_F16_sdwa_vi
    UINT64_C(2084044800),	// V_CMPX_NLE_F32_e32_si
    UINT64_C(2092433408),	// V_CMPX_NLE_F32_e32_vi
    UINT64_C(3493330944),	// V_CMPX_NLE_F32_e64_si
    UINT64_C(3495690240),	// V_CMPX_NLE_F32_e64_vi
    UINT64_C(2092433657),	// V_CMPX_NLE_F32_sdwa_gfx9
    UINT64_C(2092433657),	// V_CMPX_NLE_F32_sdwa_vi
    UINT64_C(2088239104),	// V_CMPX_NLE_F64_e32_si
    UINT64_C(2096627712),	// V_CMPX_NLE_F64_e32_vi
    UINT64_C(3497525248),	// V_CMPX_NLE_F64_e64_si
    UINT64_C(3497787392),	// V_CMPX_NLE_F64_e64_vi
    UINT64_C(2096627961),	// V_CMPX_NLE_F64_sdwa_gfx9
    UINT64_C(2096627961),	// V_CMPX_NLE_F64_sdwa_vi
    UINT64_C(2087976960),	// V_CMPX_NLG_F16_e32_vi
    UINT64_C(3493462016),	// V_CMPX_NLG_F16_e64_vi
    UINT64_C(2087977209),	// V_CMPX_NLG_F16_sdwa_gfx9
    UINT64_C(2087977209),	// V_CMPX_NLG_F16_sdwa_vi
    UINT64_C(2083782656),	// V_CMPX_NLG_F32_e32_si
    UINT64_C(2092171264),	// V_CMPX_NLG_F32_e32_vi
    UINT64_C(3493068800),	// V_CMPX_NLG_F32_e64_si
    UINT64_C(3495559168),	// V_CMPX_NLG_F32_e64_vi
    UINT64_C(2092171513),	// V_CMPX_NLG_F32_sdwa_gfx9
    UINT64_C(2092171513),	// V_CMPX_NLG_F32_sdwa_vi
    UINT64_C(2087976960),	// V_CMPX_NLG_F64_e32_si
    UINT64_C(2096365568),	// V_CMPX_NLG_F64_e32_vi
    UINT64_C(3497263104),	// V_CMPX_NLG_F64_e64_si
    UINT64_C(3497656320),	// V_CMPX_NLG_F64_e64_vi
    UINT64_C(2096365817),	// V_CMPX_NLG_F64_sdwa_gfx9
    UINT64_C(2096365817),	// V_CMPX_NLG_F64_sdwa_vi
    UINT64_C(2088501248),	// V_CMPX_NLT_F16_e32_vi
    UINT64_C(3493724160),	// V_CMPX_NLT_F16_e64_vi
    UINT64_C(2088501497),	// V_CMPX_NLT_F16_sdwa_gfx9
    UINT64_C(2088501497),	// V_CMPX_NLT_F16_sdwa_vi
    UINT64_C(2084306944),	// V_CMPX_NLT_F32_e32_si
    UINT64_C(2092695552),	// V_CMPX_NLT_F32_e32_vi
    UINT64_C(3493593088),	// V_CMPX_NLT_F32_e64_si
    UINT64_C(3495821312),	// V_CMPX_NLT_F32_e64_vi
    UINT64_C(2092695801),	// V_CMPX_NLT_F32_sdwa_gfx9
    UINT64_C(2092695801),	// V_CMPX_NLT_F32_sdwa_vi
    UINT64_C(2088501248),	// V_CMPX_NLT_F64_e32_si
    UINT64_C(2096889856),	// V_CMPX_NLT_F64_e32_vi
    UINT64_C(3497787392),	// V_CMPX_NLT_F64_e64_si
    UINT64_C(3497918464),	// V_CMPX_NLT_F64_e64_vi
    UINT64_C(2096890105),	// V_CMPX_NLT_F64_sdwa_gfx9
    UINT64_C(2096890105),	// V_CMPX_NLT_F64_sdwa_vi
    UINT64_C(2087583744),	// V_CMPX_O_F16_e32_vi
    UINT64_C(3493265408),	// V_CMPX_O_F16_e64_vi
    UINT64_C(2087583993),	// V_CMPX_O_F16_sdwa_gfx9
    UINT64_C(2087583993),	// V_CMPX_O_F16_sdwa_vi
    UINT64_C(2083389440),	// V_CMPX_O_F32_e32_si
    UINT64_C(2091778048),	// V_CMPX_O_F32_e32_vi
    UINT64_C(3492675584),	// V_CMPX_O_F32_e64_si
    UINT64_C(3495362560),	// V_CMPX_O_F32_e64_vi
    UINT64_C(2091778297),	// V_CMPX_O_F32_sdwa_gfx9
    UINT64_C(2091778297),	// V_CMPX_O_F32_sdwa_vi
    UINT64_C(2087583744),	// V_CMPX_O_F64_e32_si
    UINT64_C(2095972352),	// V_CMPX_O_F64_e32_vi
    UINT64_C(3496869888),	// V_CMPX_O_F64_e64_si
    UINT64_C(3497459712),	// V_CMPX_O_F64_e64_vi
    UINT64_C(2095972601),	// V_CMPX_O_F64_sdwa_gfx9
    UINT64_C(2095972601),	// V_CMPX_O_F64_sdwa_vi
    UINT64_C(2088632320),	// V_CMPX_TRU_F16_e32_vi
    UINT64_C(3493789696),	// V_CMPX_TRU_F16_e64_vi
    UINT64_C(2088632569),	// V_CMPX_TRU_F16_sdwa_gfx9
    UINT64_C(2088632569),	// V_CMPX_TRU_F16_sdwa_vi
    UINT64_C(2084438016),	// V_CMPX_TRU_F32_e32_si
    UINT64_C(2092826624),	// V_CMPX_TRU_F32_e32_vi
    UINT64_C(3493724160),	// V_CMPX_TRU_F32_e64_si
    UINT64_C(3495886848),	// V_CMPX_TRU_F32_e64_vi
    UINT64_C(2092826873),	// V_CMPX_TRU_F32_sdwa_gfx9
    UINT64_C(2092826873),	// V_CMPX_TRU_F32_sdwa_vi
    UINT64_C(2088632320),	// V_CMPX_TRU_F64_e32_si
    UINT64_C(2097020928),	// V_CMPX_TRU_F64_e32_vi
    UINT64_C(3497918464),	// V_CMPX_TRU_F64_e64_si
    UINT64_C(3497984000),	// V_CMPX_TRU_F64_e64_vi
    UINT64_C(2097021177),	// V_CMPX_TRU_F64_sdwa_gfx9
    UINT64_C(2097021177),	// V_CMPX_TRU_F64_sdwa_vi
    UINT64_C(2104360960),	// V_CMPX_T_I16_e32_vi
    UINT64_C(3501654016),	// V_CMPX_T_I16_e64_vi
    UINT64_C(2104361209),	// V_CMPX_T_I16_sdwa_gfx9
    UINT64_C(2104361209),	// V_CMPX_T_I16_sdwa_vi
    UINT64_C(2100166656),	// V_CMPX_T_I32_e32_si
    UINT64_C(2108555264),	// V_CMPX_T_I32_e32_vi
    UINT64_C(3509452800),	// V_CMPX_T_I32_e64_si
    UINT64_C(3503751168),	// V_CMPX_T_I32_e64_vi
    UINT64_C(2108555513),	// V_CMPX_T_I32_sdwa_gfx9
    UINT64_C(2108555513),	// V_CMPX_T_I32_sdwa_vi
    UINT64_C(2104360960),	// V_CMPX_T_I64_e32_si
    UINT64_C(2112749568),	// V_CMPX_T_I64_e32_vi
    UINT64_C(3513647104),	// V_CMPX_T_I64_e64_si
    UINT64_C(3505848320),	// V_CMPX_T_I64_e64_vi
    UINT64_C(2112749817),	// V_CMPX_T_I64_sdwa_gfx9
    UINT64_C(2112749817),	// V_CMPX_T_I64_sdwa_vi
    UINT64_C(2105409536),	// V_CMPX_T_U16_e32_vi
    UINT64_C(3502178304),	// V_CMPX_T_U16_e64_vi
    UINT64_C(2105409785),	// V_CMPX_T_U16_sdwa_gfx9
    UINT64_C(2105409785),	// V_CMPX_T_U16_sdwa_vi
    UINT64_C(2108555264),	// V_CMPX_T_U32_e32_si
    UINT64_C(2109603840),	// V_CMPX_T_U32_e32_vi
    UINT64_C(3517841408),	// V_CMPX_T_U32_e64_si
    UINT64_C(3504275456),	// V_CMPX_T_U32_e64_vi
    UINT64_C(2109604089),	// V_CMPX_T_U32_sdwa_gfx9
    UINT64_C(2109604089),	// V_CMPX_T_U32_sdwa_vi
    UINT64_C(2112749568),	// V_CMPX_T_U64_e32_si
    UINT64_C(2113798144),	// V_CMPX_T_U64_e32_vi
    UINT64_C(3522035712),	// V_CMPX_T_U64_e64_si
    UINT64_C(3506372608),	// V_CMPX_T_U64_e64_vi
    UINT64_C(2113798393),	// V_CMPX_T_U64_sdwa_gfx9
    UINT64_C(2113798393),	// V_CMPX_T_U64_sdwa_vi
    UINT64_C(2087714816),	// V_CMPX_U_F16_e32_vi
    UINT64_C(3493330944),	// V_CMPX_U_F16_e64_vi
    UINT64_C(2087715065),	// V_CMPX_U_F16_sdwa_gfx9
    UINT64_C(2087715065),	// V_CMPX_U_F16_sdwa_vi
    UINT64_C(2083520512),	// V_CMPX_U_F32_e32_si
    UINT64_C(2091909120),	// V_CMPX_U_F32_e32_vi
    UINT64_C(3492806656),	// V_CMPX_U_F32_e64_si
    UINT64_C(3495428096),	// V_CMPX_U_F32_e64_vi
    UINT64_C(2091909369),	// V_CMPX_U_F32_sdwa_gfx9
    UINT64_C(2091909369),	// V_CMPX_U_F32_sdwa_vi
    UINT64_C(2087714816),	// V_CMPX_U_F64_e32_si
    UINT64_C(2096103424),	// V_CMPX_U_F64_e32_vi
    UINT64_C(3497000960),	// V_CMPX_U_F64_e64_si
    UINT64_C(3497525248),	// V_CMPX_U_F64_e64_vi
    UINT64_C(2096103673),	// V_CMPX_U_F64_sdwa_gfx9
    UINT64_C(2096103673),	// V_CMPX_U_F64_sdwa_vi
    UINT64_C(2082996224),	// V_CMP_CLASS_F16_e32_vi
    UINT64_C(3490971648),	// V_CMP_CLASS_F16_e64_vi
    UINT64_C(2082996473),	// V_CMP_CLASS_F16_sdwa_gfx9
    UINT64_C(2082996473),	// V_CMP_CLASS_F16_sdwa_vi
    UINT64_C(2098200576),	// V_CMP_CLASS_F32_e32_si
    UINT64_C(2082471936),	// V_CMP_CLASS_F32_e32_vi
    UINT64_C(3507486720),	// V_CMP_CLASS_F32_e64_si
    UINT64_C(3490709504),	// V_CMP_CLASS_F32_e64_vi
    UINT64_C(2082472185),	// V_CMP_CLASS_F32_sdwa_gfx9
    UINT64_C(2082472185),	// V_CMP_CLASS_F32_sdwa_vi
    UINT64_C(2102394880),	// V_CMP_CLASS_F64_e32_si
    UINT64_C(2082734080),	// V_CMP_CLASS_F64_e32_vi
    UINT64_C(3511681024),	// V_CMP_CLASS_F64_e64_si
    UINT64_C(3490840576),	// V_CMP_CLASS_F64_e64_vi
    UINT64_C(2082734329),	// V_CMP_CLASS_F64_sdwa_gfx9
    UINT64_C(2082734329),	// V_CMP_CLASS_F64_sdwa_vi
    UINT64_C(2084831232),	// V_CMP_EQ_F16_e32_vi
    UINT64_C(3491889152),	// V_CMP_EQ_F16_e64_vi
    UINT64_C(2084831481),	// V_CMP_EQ_F16_sdwa_gfx9
    UINT64_C(2084831481),	// V_CMP_EQ_F16_sdwa_vi
    UINT64_C(2080636928),	// V_CMP_EQ_F32_e32_si
    UINT64_C(2089025536),	// V_CMP_EQ_F32_e32_vi
    UINT64_C(3489923072),	// V_CMP_EQ_F32_e64_si
    UINT64_C(3493986304),	// V_CMP_EQ_F32_e64_vi
    UINT64_C(2089025785),	// V_CMP_EQ_F32_sdwa_gfx9
    UINT64_C(2089025785),	// V_CMP_EQ_F32_sdwa_vi
    UINT64_C(2084831232),	// V_CMP_EQ_F64_e32_si
    UINT64_C(2093219840),	// V_CMP_EQ_F64_e32_vi
    UINT64_C(3494117376),	// V_CMP_EQ_F64_e64_si
    UINT64_C(3496083456),	// V_CMP_EQ_F64_e64_vi
    UINT64_C(2093220089),	// V_CMP_EQ_F64_sdwa_gfx9
    UINT64_C(2093220089),	// V_CMP_EQ_F64_sdwa_vi
    UINT64_C(2101608448),	// V_CMP_EQ_I16_e32_vi
    UINT64_C(3500277760),	// V_CMP_EQ_I16_e64_vi
    UINT64_C(2101608697),	// V_CMP_EQ_I16_sdwa_gfx9
    UINT64_C(2101608697),	// V_CMP_EQ_I16_sdwa_vi
    UINT64_C(2097414144),	// V_CMP_EQ_I32_e32_si
    UINT64_C(2105802752),	// V_CMP_EQ_I32_e32_vi
    UINT64_C(3506700288),	// V_CMP_EQ_I32_e64_si
    UINT64_C(3502374912),	// V_CMP_EQ_I32_e64_vi
    UINT64_C(2105803001),	// V_CMP_EQ_I32_sdwa_gfx9
    UINT64_C(2105803001),	// V_CMP_EQ_I32_sdwa_vi
    UINT64_C(2101608448),	// V_CMP_EQ_I64_e32_si
    UINT64_C(2109997056),	// V_CMP_EQ_I64_e32_vi
    UINT64_C(3510894592),	// V_CMP_EQ_I64_e64_si
    UINT64_C(3504472064),	// V_CMP_EQ_I64_e64_vi
    UINT64_C(2109997305),	// V_CMP_EQ_I64_sdwa_gfx9
    UINT64_C(2109997305),	// V_CMP_EQ_I64_sdwa_vi
    UINT64_C(2102657024),	// V_CMP_EQ_U16_e32_vi
    UINT64_C(3500802048),	// V_CMP_EQ_U16_e64_vi
    UINT64_C(2102657273),	// V_CMP_EQ_U16_sdwa_gfx9
    UINT64_C(2102657273),	// V_CMP_EQ_U16_sdwa_vi
    UINT64_C(2105802752),	// V_CMP_EQ_U32_e32_si
    UINT64_C(2106851328),	// V_CMP_EQ_U32_e32_vi
    UINT64_C(3515088896),	// V_CMP_EQ_U32_e64_si
    UINT64_C(3502899200),	// V_CMP_EQ_U32_e64_vi
    UINT64_C(2106851577),	// V_CMP_EQ_U32_sdwa_gfx9
    UINT64_C(2106851577),	// V_CMP_EQ_U32_sdwa_vi
    UINT64_C(2109997056),	// V_CMP_EQ_U64_e32_si
    UINT64_C(2111045632),	// V_CMP_EQ_U64_e32_vi
    UINT64_C(3519283200),	// V_CMP_EQ_U64_e64_si
    UINT64_C(3504996352),	// V_CMP_EQ_U64_e64_vi
    UINT64_C(2111045881),	// V_CMP_EQ_U64_sdwa_gfx9
    UINT64_C(2111045881),	// V_CMP_EQ_U64_sdwa_vi
    UINT64_C(2084569088),	// V_CMP_F_F16_e32_vi
    UINT64_C(3491758080),	// V_CMP_F_F16_e64_vi
    UINT64_C(2084569337),	// V_CMP_F_F16_sdwa_gfx9
    UINT64_C(2084569337),	// V_CMP_F_F16_sdwa_vi
    UINT64_C(2080374784),	// V_CMP_F_F32_e32_si
    UINT64_C(2088763392),	// V_CMP_F_F32_e32_vi
    UINT64_C(3489660928),	// V_CMP_F_F32_e64_si
    UINT64_C(3493855232),	// V_CMP_F_F32_e64_vi
    UINT64_C(2088763641),	// V_CMP_F_F32_sdwa_gfx9
    UINT64_C(2088763641),	// V_CMP_F_F32_sdwa_vi
    UINT64_C(2084569088),	// V_CMP_F_F64_e32_si
    UINT64_C(2092957696),	// V_CMP_F_F64_e32_vi
    UINT64_C(3493855232),	// V_CMP_F_F64_e64_si
    UINT64_C(3495952384),	// V_CMP_F_F64_e64_vi
    UINT64_C(2092957945),	// V_CMP_F_F64_sdwa_gfx9
    UINT64_C(2092957945),	// V_CMP_F_F64_sdwa_vi
    UINT64_C(2101346304),	// V_CMP_F_I16_e32_vi
    UINT64_C(3500146688),	// V_CMP_F_I16_e64_vi
    UINT64_C(2101346553),	// V_CMP_F_I16_sdwa_gfx9
    UINT64_C(2101346553),	// V_CMP_F_I16_sdwa_vi
    UINT64_C(2097152000),	// V_CMP_F_I32_e32_si
    UINT64_C(2105540608),	// V_CMP_F_I32_e32_vi
    UINT64_C(3506438144),	// V_CMP_F_I32_e64_si
    UINT64_C(3502243840),	// V_CMP_F_I32_e64_vi
    UINT64_C(2105540857),	// V_CMP_F_I32_sdwa_gfx9
    UINT64_C(2105540857),	// V_CMP_F_I32_sdwa_vi
    UINT64_C(2101346304),	// V_CMP_F_I64_e32_si
    UINT64_C(2109734912),	// V_CMP_F_I64_e32_vi
    UINT64_C(3510632448),	// V_CMP_F_I64_e64_si
    UINT64_C(3504340992),	// V_CMP_F_I64_e64_vi
    UINT64_C(2109735161),	// V_CMP_F_I64_sdwa_gfx9
    UINT64_C(2109735161),	// V_CMP_F_I64_sdwa_vi
    UINT64_C(2102394880),	// V_CMP_F_U16_e32_vi
    UINT64_C(3500670976),	// V_CMP_F_U16_e64_vi
    UINT64_C(2102395129),	// V_CMP_F_U16_sdwa_gfx9
    UINT64_C(2102395129),	// V_CMP_F_U16_sdwa_vi
    UINT64_C(2105540608),	// V_CMP_F_U32_e32_si
    UINT64_C(2106589184),	// V_CMP_F_U32_e32_vi
    UINT64_C(3514826752),	// V_CMP_F_U32_e64_si
    UINT64_C(3502768128),	// V_CMP_F_U32_e64_vi
    UINT64_C(2106589433),	// V_CMP_F_U32_sdwa_gfx9
    UINT64_C(2106589433),	// V_CMP_F_U32_sdwa_vi
    UINT64_C(2109734912),	// V_CMP_F_U64_e32_si
    UINT64_C(2110783488),	// V_CMP_F_U64_e32_vi
    UINT64_C(3519021056),	// V_CMP_F_U64_e64_si
    UINT64_C(3504865280),	// V_CMP_F_U64_e64_vi
    UINT64_C(2110783737),	// V_CMP_F_U64_sdwa_gfx9
    UINT64_C(2110783737),	// V_CMP_F_U64_sdwa_vi
    UINT64_C(2085355520),	// V_CMP_GE_F16_e32_vi
    UINT64_C(3492151296),	// V_CMP_GE_F16_e64_vi
    UINT64_C(2085355769),	// V_CMP_GE_F16_sdwa_gfx9
    UINT64_C(2085355769),	// V_CMP_GE_F16_sdwa_vi
    UINT64_C(2081161216),	// V_CMP_GE_F32_e32_si
    UINT64_C(2089549824),	// V_CMP_GE_F32_e32_vi
    UINT64_C(3490447360),	// V_CMP_GE_F32_e64_si
    UINT64_C(3494248448),	// V_CMP_GE_F32_e64_vi
    UINT64_C(2089550073),	// V_CMP_GE_F32_sdwa_gfx9
    UINT64_C(2089550073),	// V_CMP_GE_F32_sdwa_vi
    UINT64_C(2085355520),	// V_CMP_GE_F64_e32_si
    UINT64_C(2093744128),	// V_CMP_GE_F64_e32_vi
    UINT64_C(3494641664),	// V_CMP_GE_F64_e64_si
    UINT64_C(3496345600),	// V_CMP_GE_F64_e64_vi
    UINT64_C(2093744377),	// V_CMP_GE_F64_sdwa_gfx9
    UINT64_C(2093744377),	// V_CMP_GE_F64_sdwa_vi
    UINT64_C(2102132736),	// V_CMP_GE_I16_e32_vi
    UINT64_C(3500539904),	// V_CMP_GE_I16_e64_vi
    UINT64_C(2102132985),	// V_CMP_GE_I16_sdwa_gfx9
    UINT64_C(2102132985),	// V_CMP_GE_I16_sdwa_vi
    UINT64_C(2097938432),	// V_CMP_GE_I32_e32_si
    UINT64_C(2106327040),	// V_CMP_GE_I32_e32_vi
    UINT64_C(3507224576),	// V_CMP_GE_I32_e64_si
    UINT64_C(3502637056),	// V_CMP_GE_I32_e64_vi
    UINT64_C(2106327289),	// V_CMP_GE_I32_sdwa_gfx9
    UINT64_C(2106327289),	// V_CMP_GE_I32_sdwa_vi
    UINT64_C(2102132736),	// V_CMP_GE_I64_e32_si
    UINT64_C(2110521344),	// V_CMP_GE_I64_e32_vi
    UINT64_C(3511418880),	// V_CMP_GE_I64_e64_si
    UINT64_C(3504734208),	// V_CMP_GE_I64_e64_vi
    UINT64_C(2110521593),	// V_CMP_GE_I64_sdwa_gfx9
    UINT64_C(2110521593),	// V_CMP_GE_I64_sdwa_vi
    UINT64_C(2103181312),	// V_CMP_GE_U16_e32_vi
    UINT64_C(3501064192),	// V_CMP_GE_U16_e64_vi
    UINT64_C(2103181561),	// V_CMP_GE_U16_sdwa_gfx9
    UINT64_C(2103181561),	// V_CMP_GE_U16_sdwa_vi
    UINT64_C(2106327040),	// V_CMP_GE_U32_e32_si
    UINT64_C(2107375616),	// V_CMP_GE_U32_e32_vi
    UINT64_C(3515613184),	// V_CMP_GE_U32_e64_si
    UINT64_C(3503161344),	// V_CMP_GE_U32_e64_vi
    UINT64_C(2107375865),	// V_CMP_GE_U32_sdwa_gfx9
    UINT64_C(2107375865),	// V_CMP_GE_U32_sdwa_vi
    UINT64_C(2110521344),	// V_CMP_GE_U64_e32_si
    UINT64_C(2111569920),	// V_CMP_GE_U64_e32_vi
    UINT64_C(3519807488),	// V_CMP_GE_U64_e64_si
    UINT64_C(3505258496),	// V_CMP_GE_U64_e64_vi
    UINT64_C(2111570169),	// V_CMP_GE_U64_sdwa_gfx9
    UINT64_C(2111570169),	// V_CMP_GE_U64_sdwa_vi
    UINT64_C(2085093376),	// V_CMP_GT_F16_e32_vi
    UINT64_C(3492020224),	// V_CMP_GT_F16_e64_vi
    UINT64_C(2085093625),	// V_CMP_GT_F16_sdwa_gfx9
    UINT64_C(2085093625),	// V_CMP_GT_F16_sdwa_vi
    UINT64_C(2080899072),	// V_CMP_GT_F32_e32_si
    UINT64_C(2089287680),	// V_CMP_GT_F32_e32_vi
    UINT64_C(3490185216),	// V_CMP_GT_F32_e64_si
    UINT64_C(3494117376),	// V_CMP_GT_F32_e64_vi
    UINT64_C(2089287929),	// V_CMP_GT_F32_sdwa_gfx9
    UINT64_C(2089287929),	// V_CMP_GT_F32_sdwa_vi
    UINT64_C(2085093376),	// V_CMP_GT_F64_e32_si
    UINT64_C(2093481984),	// V_CMP_GT_F64_e32_vi
    UINT64_C(3494379520),	// V_CMP_GT_F64_e64_si
    UINT64_C(3496214528),	// V_CMP_GT_F64_e64_vi
    UINT64_C(2093482233),	// V_CMP_GT_F64_sdwa_gfx9
    UINT64_C(2093482233),	// V_CMP_GT_F64_sdwa_vi
    UINT64_C(2101870592),	// V_CMP_GT_I16_e32_vi
    UINT64_C(3500408832),	// V_CMP_GT_I16_e64_vi
    UINT64_C(2101870841),	// V_CMP_GT_I16_sdwa_gfx9
    UINT64_C(2101870841),	// V_CMP_GT_I16_sdwa_vi
    UINT64_C(2097676288),	// V_CMP_GT_I32_e32_si
    UINT64_C(2106064896),	// V_CMP_GT_I32_e32_vi
    UINT64_C(3506962432),	// V_CMP_GT_I32_e64_si
    UINT64_C(3502505984),	// V_CMP_GT_I32_e64_vi
    UINT64_C(2106065145),	// V_CMP_GT_I32_sdwa_gfx9
    UINT64_C(2106065145),	// V_CMP_GT_I32_sdwa_vi
    UINT64_C(2101870592),	// V_CMP_GT_I64_e32_si
    UINT64_C(2110259200),	// V_CMP_GT_I64_e32_vi
    UINT64_C(3511156736),	// V_CMP_GT_I64_e64_si
    UINT64_C(3504603136),	// V_CMP_GT_I64_e64_vi
    UINT64_C(2110259449),	// V_CMP_GT_I64_sdwa_gfx9
    UINT64_C(2110259449),	// V_CMP_GT_I64_sdwa_vi
    UINT64_C(2102919168),	// V_CMP_GT_U16_e32_vi
    UINT64_C(3500933120),	// V_CMP_GT_U16_e64_vi
    UINT64_C(2102919417),	// V_CMP_GT_U16_sdwa_gfx9
    UINT64_C(2102919417),	// V_CMP_GT_U16_sdwa_vi
    UINT64_C(2106064896),	// V_CMP_GT_U32_e32_si
    UINT64_C(2107113472),	// V_CMP_GT_U32_e32_vi
    UINT64_C(3515351040),	// V_CMP_GT_U32_e64_si
    UINT64_C(3503030272),	// V_CMP_GT_U32_e64_vi
    UINT64_C(2107113721),	// V_CMP_GT_U32_sdwa_gfx9
    UINT64_C(2107113721),	// V_CMP_GT_U32_sdwa_vi
    UINT64_C(2110259200),	// V_CMP_GT_U64_e32_si
    UINT64_C(2111307776),	// V_CMP_GT_U64_e32_vi
    UINT64_C(3519545344),	// V_CMP_GT_U64_e64_si
    UINT64_C(3505127424),	// V_CMP_GT_U64_e64_vi
    UINT64_C(2111308025),	// V_CMP_GT_U64_sdwa_gfx9
    UINT64_C(2111308025),	// V_CMP_GT_U64_sdwa_vi
    UINT64_C(2084962304),	// V_CMP_LE_F16_e32_vi
    UINT64_C(3491954688),	// V_CMP_LE_F16_e64_vi
    UINT64_C(2084962553),	// V_CMP_LE_F16_sdwa_gfx9
    UINT64_C(2084962553),	// V_CMP_LE_F16_sdwa_vi
    UINT64_C(2080768000),	// V_CMP_LE_F32_e32_si
    UINT64_C(2089156608),	// V_CMP_LE_F32_e32_vi
    UINT64_C(3490054144),	// V_CMP_LE_F32_e64_si
    UINT64_C(3494051840),	// V_CMP_LE_F32_e64_vi
    UINT64_C(2089156857),	// V_CMP_LE_F32_sdwa_gfx9
    UINT64_C(2089156857),	// V_CMP_LE_F32_sdwa_vi
    UINT64_C(2084962304),	// V_CMP_LE_F64_e32_si
    UINT64_C(2093350912),	// V_CMP_LE_F64_e32_vi
    UINT64_C(3494248448),	// V_CMP_LE_F64_e64_si
    UINT64_C(3496148992),	// V_CMP_LE_F64_e64_vi
    UINT64_C(2093351161),	// V_CMP_LE_F64_sdwa_gfx9
    UINT64_C(2093351161),	// V_CMP_LE_F64_sdwa_vi
    UINT64_C(2101739520),	// V_CMP_LE_I16_e32_vi
    UINT64_C(3500343296),	// V_CMP_LE_I16_e64_vi
    UINT64_C(2101739769),	// V_CMP_LE_I16_sdwa_gfx9
    UINT64_C(2101739769),	// V_CMP_LE_I16_sdwa_vi
    UINT64_C(2097545216),	// V_CMP_LE_I32_e32_si
    UINT64_C(2105933824),	// V_CMP_LE_I32_e32_vi
    UINT64_C(3506831360),	// V_CMP_LE_I32_e64_si
    UINT64_C(3502440448),	// V_CMP_LE_I32_e64_vi
    UINT64_C(2105934073),	// V_CMP_LE_I32_sdwa_gfx9
    UINT64_C(2105934073),	// V_CMP_LE_I32_sdwa_vi
    UINT64_C(2101739520),	// V_CMP_LE_I64_e32_si
    UINT64_C(2110128128),	// V_CMP_LE_I64_e32_vi
    UINT64_C(3511025664),	// V_CMP_LE_I64_e64_si
    UINT64_C(3504537600),	// V_CMP_LE_I64_e64_vi
    UINT64_C(2110128377),	// V_CMP_LE_I64_sdwa_gfx9
    UINT64_C(2110128377),	// V_CMP_LE_I64_sdwa_vi
    UINT64_C(2102788096),	// V_CMP_LE_U16_e32_vi
    UINT64_C(3500867584),	// V_CMP_LE_U16_e64_vi
    UINT64_C(2102788345),	// V_CMP_LE_U16_sdwa_gfx9
    UINT64_C(2102788345),	// V_CMP_LE_U16_sdwa_vi
    UINT64_C(2105933824),	// V_CMP_LE_U32_e32_si
    UINT64_C(2106982400),	// V_CMP_LE_U32_e32_vi
    UINT64_C(3515219968),	// V_CMP_LE_U32_e64_si
    UINT64_C(3502964736),	// V_CMP_LE_U32_e64_vi
    UINT64_C(2106982649),	// V_CMP_LE_U32_sdwa_gfx9
    UINT64_C(2106982649),	// V_CMP_LE_U32_sdwa_vi
    UINT64_C(2110128128),	// V_CMP_LE_U64_e32_si
    UINT64_C(2111176704),	// V_CMP_LE_U64_e32_vi
    UINT64_C(3519414272),	// V_CMP_LE_U64_e64_si
    UINT64_C(3505061888),	// V_CMP_LE_U64_e64_vi
    UINT64_C(2111176953),	// V_CMP_LE_U64_sdwa_gfx9
    UINT64_C(2111176953),	// V_CMP_LE_U64_sdwa_vi
    UINT64_C(2085224448),	// V_CMP_LG_F16_e32_vi
    UINT64_C(3492085760),	// V_CMP_LG_F16_e64_vi
    UINT64_C(2085224697),	// V_CMP_LG_F16_sdwa_gfx9
    UINT64_C(2085224697),	// V_CMP_LG_F16_sdwa_vi
    UINT64_C(2081030144),	// V_CMP_LG_F32_e32_si
    UINT64_C(2089418752),	// V_CMP_LG_F32_e32_vi
    UINT64_C(3490316288),	// V_CMP_LG_F32_e64_si
    UINT64_C(3494182912),	// V_CMP_LG_F32_e64_vi
    UINT64_C(2089419001),	// V_CMP_LG_F32_sdwa_gfx9
    UINT64_C(2089419001),	// V_CMP_LG_F32_sdwa_vi
    UINT64_C(2085224448),	// V_CMP_LG_F64_e32_si
    UINT64_C(2093613056),	// V_CMP_LG_F64_e32_vi
    UINT64_C(3494510592),	// V_CMP_LG_F64_e64_si
    UINT64_C(3496280064),	// V_CMP_LG_F64_e64_vi
    UINT64_C(2093613305),	// V_CMP_LG_F64_sdwa_gfx9
    UINT64_C(2093613305),	// V_CMP_LG_F64_sdwa_vi
    UINT64_C(2084700160),	// V_CMP_LT_F16_e32_vi
    UINT64_C(3491823616),	// V_CMP_LT_F16_e64_vi
    UINT64_C(2084700409),	// V_CMP_LT_F16_sdwa_gfx9
    UINT64_C(2084700409),	// V_CMP_LT_F16_sdwa_vi
    UINT64_C(2080505856),	// V_CMP_LT_F32_e32_si
    UINT64_C(2088894464),	// V_CMP_LT_F32_e32_vi
    UINT64_C(3489792000),	// V_CMP_LT_F32_e64_si
    UINT64_C(3493920768),	// V_CMP_LT_F32_e64_vi
    UINT64_C(2088894713),	// V_CMP_LT_F32_sdwa_gfx9
    UINT64_C(2088894713),	// V_CMP_LT_F32_sdwa_vi
    UINT64_C(2084700160),	// V_CMP_LT_F64_e32_si
    UINT64_C(2093088768),	// V_CMP_LT_F64_e32_vi
    UINT64_C(3493986304),	// V_CMP_LT_F64_e64_si
    UINT64_C(3496017920),	// V_CMP_LT_F64_e64_vi
    UINT64_C(2093089017),	// V_CMP_LT_F64_sdwa_gfx9
    UINT64_C(2093089017),	// V_CMP_LT_F64_sdwa_vi
    UINT64_C(2101477376),	// V_CMP_LT_I16_e32_vi
    UINT64_C(3500212224),	// V_CMP_LT_I16_e64_vi
    UINT64_C(2101477625),	// V_CMP_LT_I16_sdwa_gfx9
    UINT64_C(2101477625),	// V_CMP_LT_I16_sdwa_vi
    UINT64_C(2097283072),	// V_CMP_LT_I32_e32_si
    UINT64_C(2105671680),	// V_CMP_LT_I32_e32_vi
    UINT64_C(3506569216),	// V_CMP_LT_I32_e64_si
    UINT64_C(3502309376),	// V_CMP_LT_I32_e64_vi
    UINT64_C(2105671929),	// V_CMP_LT_I32_sdwa_gfx9
    UINT64_C(2105671929),	// V_CMP_LT_I32_sdwa_vi
    UINT64_C(2101477376),	// V_CMP_LT_I64_e32_si
    UINT64_C(2109865984),	// V_CMP_LT_I64_e32_vi
    UINT64_C(3510763520),	// V_CMP_LT_I64_e64_si
    UINT64_C(3504406528),	// V_CMP_LT_I64_e64_vi
    UINT64_C(2109866233),	// V_CMP_LT_I64_sdwa_gfx9
    UINT64_C(2109866233),	// V_CMP_LT_I64_sdwa_vi
    UINT64_C(2102525952),	// V_CMP_LT_U16_e32_vi
    UINT64_C(3500736512),	// V_CMP_LT_U16_e64_vi
    UINT64_C(2102526201),	// V_CMP_LT_U16_sdwa_gfx9
    UINT64_C(2102526201),	// V_CMP_LT_U16_sdwa_vi
    UINT64_C(2105671680),	// V_CMP_LT_U32_e32_si
    UINT64_C(2106720256),	// V_CMP_LT_U32_e32_vi
    UINT64_C(3514957824),	// V_CMP_LT_U32_e64_si
    UINT64_C(3502833664),	// V_CMP_LT_U32_e64_vi
    UINT64_C(2106720505),	// V_CMP_LT_U32_sdwa_gfx9
    UINT64_C(2106720505),	// V_CMP_LT_U32_sdwa_vi
    UINT64_C(2109865984),	// V_CMP_LT_U64_e32_si
    UINT64_C(2110914560),	// V_CMP_LT_U64_e32_vi
    UINT64_C(3519152128),	// V_CMP_LT_U64_e64_si
    UINT64_C(3504930816),	// V_CMP_LT_U64_e64_vi
    UINT64_C(2110914809),	// V_CMP_LT_U64_sdwa_gfx9
    UINT64_C(2110914809),	// V_CMP_LT_U64_sdwa_vi
    UINT64_C(2086273024),	// V_CMP_NEQ_F16_e32_vi
    UINT64_C(3492610048),	// V_CMP_NEQ_F16_e64_vi
    UINT64_C(2086273273),	// V_CMP_NEQ_F16_sdwa_gfx9
    UINT64_C(2086273273),	// V_CMP_NEQ_F16_sdwa_vi
    UINT64_C(2082078720),	// V_CMP_NEQ_F32_e32_si
    UINT64_C(2090467328),	// V_CMP_NEQ_F32_e32_vi
    UINT64_C(3491364864),	// V_CMP_NEQ_F32_e64_si
    UINT64_C(3494707200),	// V_CMP_NEQ_F32_e64_vi
    UINT64_C(2090467577),	// V_CMP_NEQ_F32_sdwa_gfx9
    UINT64_C(2090467577),	// V_CMP_NEQ_F32_sdwa_vi
    UINT64_C(2086273024),	// V_CMP_NEQ_F64_e32_si
    UINT64_C(2094661632),	// V_CMP_NEQ_F64_e32_vi
    UINT64_C(3495559168),	// V_CMP_NEQ_F64_e64_si
    UINT64_C(3496804352),	// V_CMP_NEQ_F64_e64_vi
    UINT64_C(2094661881),	// V_CMP_NEQ_F64_sdwa_gfx9
    UINT64_C(2094661881),	// V_CMP_NEQ_F64_sdwa_vi
    UINT64_C(2102001664),	// V_CMP_NE_I16_e32_vi
    UINT64_C(3500474368),	// V_CMP_NE_I16_e64_vi
    UINT64_C(2102001913),	// V_CMP_NE_I16_sdwa_gfx9
    UINT64_C(2102001913),	// V_CMP_NE_I16_sdwa_vi
    UINT64_C(2097807360),	// V_CMP_NE_I32_e32_si
    UINT64_C(2106195968),	// V_CMP_NE_I32_e32_vi
    UINT64_C(3507093504),	// V_CMP_NE_I32_e64_si
    UINT64_C(3502571520),	// V_CMP_NE_I32_e64_vi
    UINT64_C(2106196217),	// V_CMP_NE_I32_sdwa_gfx9
    UINT64_C(2106196217),	// V_CMP_NE_I32_sdwa_vi
    UINT64_C(2102001664),	// V_CMP_NE_I64_e32_si
    UINT64_C(2110390272),	// V_CMP_NE_I64_e32_vi
    UINT64_C(3511287808),	// V_CMP_NE_I64_e64_si
    UINT64_C(3504668672),	// V_CMP_NE_I64_e64_vi
    UINT64_C(2110390521),	// V_CMP_NE_I64_sdwa_gfx9
    UINT64_C(2110390521),	// V_CMP_NE_I64_sdwa_vi
    UINT64_C(2103050240),	// V_CMP_NE_U16_e32_vi
    UINT64_C(3500998656),	// V_CMP_NE_U16_e64_vi
    UINT64_C(2103050489),	// V_CMP_NE_U16_sdwa_gfx9
    UINT64_C(2103050489),	// V_CMP_NE_U16_sdwa_vi
    UINT64_C(2106195968),	// V_CMP_NE_U32_e32_si
    UINT64_C(2107244544),	// V_CMP_NE_U32_e32_vi
    UINT64_C(3515482112),	// V_CMP_NE_U32_e64_si
    UINT64_C(3503095808),	// V_CMP_NE_U32_e64_vi
    UINT64_C(2107244793),	// V_CMP_NE_U32_sdwa_gfx9
    UINT64_C(2107244793),	// V_CMP_NE_U32_sdwa_vi
    UINT64_C(2110390272),	// V_CMP_NE_U64_e32_si
    UINT64_C(2111438848),	// V_CMP_NE_U64_e32_vi
    UINT64_C(3519676416),	// V_CMP_NE_U64_e64_si
    UINT64_C(3505192960),	// V_CMP_NE_U64_e64_vi
    UINT64_C(2111439097),	// V_CMP_NE_U64_sdwa_gfx9
    UINT64_C(2111439097),	// V_CMP_NE_U64_sdwa_vi
    UINT64_C(2085748736),	// V_CMP_NGE_F16_e32_vi
    UINT64_C(3492347904),	// V_CMP_NGE_F16_e64_vi
    UINT64_C(2085748985),	// V_CMP_NGE_F16_sdwa_gfx9
    UINT64_C(2085748985),	// V_CMP_NGE_F16_sdwa_vi
    UINT64_C(2081554432),	// V_CMP_NGE_F32_e32_si
    UINT64_C(2089943040),	// V_CMP_NGE_F32_e32_vi
    UINT64_C(3490840576),	// V_CMP_NGE_F32_e64_si
    UINT64_C(3494445056),	// V_CMP_NGE_F32_e64_vi
    UINT64_C(2089943289),	// V_CMP_NGE_F32_sdwa_gfx9
    UINT64_C(2089943289),	// V_CMP_NGE_F32_sdwa_vi
    UINT64_C(2085748736),	// V_CMP_NGE_F64_e32_si
    UINT64_C(2094137344),	// V_CMP_NGE_F64_e32_vi
    UINT64_C(3495034880),	// V_CMP_NGE_F64_e64_si
    UINT64_C(3496542208),	// V_CMP_NGE_F64_e64_vi
    UINT64_C(2094137593),	// V_CMP_NGE_F64_sdwa_gfx9
    UINT64_C(2094137593),	// V_CMP_NGE_F64_sdwa_vi
    UINT64_C(2086010880),	// V_CMP_NGT_F16_e32_vi
    UINT64_C(3492478976),	// V_CMP_NGT_F16_e64_vi
    UINT64_C(2086011129),	// V_CMP_NGT_F16_sdwa_gfx9
    UINT64_C(2086011129),	// V_CMP_NGT_F16_sdwa_vi
    UINT64_C(2081816576),	// V_CMP_NGT_F32_e32_si
    UINT64_C(2090205184),	// V_CMP_NGT_F32_e32_vi
    UINT64_C(3491102720),	// V_CMP_NGT_F32_e64_si
    UINT64_C(3494576128),	// V_CMP_NGT_F32_e64_vi
    UINT64_C(2090205433),	// V_CMP_NGT_F32_sdwa_gfx9
    UINT64_C(2090205433),	// V_CMP_NGT_F32_sdwa_vi
    UINT64_C(2086010880),	// V_CMP_NGT_F64_e32_si
    UINT64_C(2094399488),	// V_CMP_NGT_F64_e32_vi
    UINT64_C(3495297024),	// V_CMP_NGT_F64_e64_si
    UINT64_C(3496673280),	// V_CMP_NGT_F64_e64_vi
    UINT64_C(2094399737),	// V_CMP_NGT_F64_sdwa_gfx9
    UINT64_C(2094399737),	// V_CMP_NGT_F64_sdwa_vi
    UINT64_C(2086141952),	// V_CMP_NLE_F16_e32_vi
    UINT64_C(3492544512),	// V_CMP_NLE_F16_e64_vi
    UINT64_C(2086142201),	// V_CMP_NLE_F16_sdwa_gfx9
    UINT64_C(2086142201),	// V_CMP_NLE_F16_sdwa_vi
    UINT64_C(2081947648),	// V_CMP_NLE_F32_e32_si
    UINT64_C(2090336256),	// V_CMP_NLE_F32_e32_vi
    UINT64_C(3491233792),	// V_CMP_NLE_F32_e64_si
    UINT64_C(3494641664),	// V_CMP_NLE_F32_e64_vi
    UINT64_C(2090336505),	// V_CMP_NLE_F32_sdwa_gfx9
    UINT64_C(2090336505),	// V_CMP_NLE_F32_sdwa_vi
    UINT64_C(2086141952),	// V_CMP_NLE_F64_e32_si
    UINT64_C(2094530560),	// V_CMP_NLE_F64_e32_vi
    UINT64_C(3495428096),	// V_CMP_NLE_F64_e64_si
    UINT64_C(3496738816),	// V_CMP_NLE_F64_e64_vi
    UINT64_C(2094530809),	// V_CMP_NLE_F64_sdwa_gfx9
    UINT64_C(2094530809),	// V_CMP_NLE_F64_sdwa_vi
    UINT64_C(2085879808),	// V_CMP_NLG_F16_e32_vi
    UINT64_C(3492413440),	// V_CMP_NLG_F16_e64_vi
    UINT64_C(2085880057),	// V_CMP_NLG_F16_sdwa_gfx9
    UINT64_C(2085880057),	// V_CMP_NLG_F16_sdwa_vi
    UINT64_C(2081685504),	// V_CMP_NLG_F32_e32_si
    UINT64_C(2090074112),	// V_CMP_NLG_F32_e32_vi
    UINT64_C(3490971648),	// V_CMP_NLG_F32_e64_si
    UINT64_C(3494510592),	// V_CMP_NLG_F32_e64_vi
    UINT64_C(2090074361),	// V_CMP_NLG_F32_sdwa_gfx9
    UINT64_C(2090074361),	// V_CMP_NLG_F32_sdwa_vi
    UINT64_C(2085879808),	// V_CMP_NLG_F64_e32_si
    UINT64_C(2094268416),	// V_CMP_NLG_F64_e32_vi
    UINT64_C(3495165952),	// V_CMP_NLG_F64_e64_si
    UINT64_C(3496607744),	// V_CMP_NLG_F64_e64_vi
    UINT64_C(2094268665),	// V_CMP_NLG_F64_sdwa_gfx9
    UINT64_C(2094268665),	// V_CMP_NLG_F64_sdwa_vi
    UINT64_C(2086404096),	// V_CMP_NLT_F16_e32_vi
    UINT64_C(3492675584),	// V_CMP_NLT_F16_e64_vi
    UINT64_C(2086404345),	// V_CMP_NLT_F16_sdwa_gfx9
    UINT64_C(2086404345),	// V_CMP_NLT_F16_sdwa_vi
    UINT64_C(2082209792),	// V_CMP_NLT_F32_e32_si
    UINT64_C(2090598400),	// V_CMP_NLT_F32_e32_vi
    UINT64_C(3491495936),	// V_CMP_NLT_F32_e64_si
    UINT64_C(3494772736),	// V_CMP_NLT_F32_e64_vi
    UINT64_C(2090598649),	// V_CMP_NLT_F32_sdwa_gfx9
    UINT64_C(2090598649),	// V_CMP_NLT_F32_sdwa_vi
    UINT64_C(2086404096),	// V_CMP_NLT_F64_e32_si
    UINT64_C(2094792704),	// V_CMP_NLT_F64_e32_vi
    UINT64_C(3495690240),	// V_CMP_NLT_F64_e64_si
    UINT64_C(3496869888),	// V_CMP_NLT_F64_e64_vi
    UINT64_C(2094792953),	// V_CMP_NLT_F64_sdwa_gfx9
    UINT64_C(2094792953),	// V_CMP_NLT_F64_sdwa_vi
    UINT64_C(2085486592),	// V_CMP_O_F16_e32_vi
    UINT64_C(3492216832),	// V_CMP_O_F16_e64_vi
    UINT64_C(2085486841),	// V_CMP_O_F16_sdwa_gfx9
    UINT64_C(2085486841),	// V_CMP_O_F16_sdwa_vi
    UINT64_C(2081292288),	// V_CMP_O_F32_e32_si
    UINT64_C(2089680896),	// V_CMP_O_F32_e32_vi
    UINT64_C(3490578432),	// V_CMP_O_F32_e64_si
    UINT64_C(3494313984),	// V_CMP_O_F32_e64_vi
    UINT64_C(2089681145),	// V_CMP_O_F32_sdwa_gfx9
    UINT64_C(2089681145),	// V_CMP_O_F32_sdwa_vi
    UINT64_C(2085486592),	// V_CMP_O_F64_e32_si
    UINT64_C(2093875200),	// V_CMP_O_F64_e32_vi
    UINT64_C(3494772736),	// V_CMP_O_F64_e64_si
    UINT64_C(3496411136),	// V_CMP_O_F64_e64_vi
    UINT64_C(2093875449),	// V_CMP_O_F64_sdwa_gfx9
    UINT64_C(2093875449),	// V_CMP_O_F64_sdwa_vi
    UINT64_C(2086535168),	// V_CMP_TRU_F16_e32_vi
    UINT64_C(3492741120),	// V_CMP_TRU_F16_e64_vi
    UINT64_C(2086535417),	// V_CMP_TRU_F16_sdwa_gfx9
    UINT64_C(2086535417),	// V_CMP_TRU_F16_sdwa_vi
    UINT64_C(2082340864),	// V_CMP_TRU_F32_e32_si
    UINT64_C(2090729472),	// V_CMP_TRU_F32_e32_vi
    UINT64_C(3491627008),	// V_CMP_TRU_F32_e64_si
    UINT64_C(3494838272),	// V_CMP_TRU_F32_e64_vi
    UINT64_C(2090729721),	// V_CMP_TRU_F32_sdwa_gfx9
    UINT64_C(2090729721),	// V_CMP_TRU_F32_sdwa_vi
    UINT64_C(2086535168),	// V_CMP_TRU_F64_e32_si
    UINT64_C(2094923776),	// V_CMP_TRU_F64_e32_vi
    UINT64_C(3495821312),	// V_CMP_TRU_F64_e64_si
    UINT64_C(3496935424),	// V_CMP_TRU_F64_e64_vi
    UINT64_C(2094924025),	// V_CMP_TRU_F64_sdwa_gfx9
    UINT64_C(2094924025),	// V_CMP_TRU_F64_sdwa_vi
    UINT64_C(2102263808),	// V_CMP_T_I16_e32_vi
    UINT64_C(3500605440),	// V_CMP_T_I16_e64_vi
    UINT64_C(2102264057),	// V_CMP_T_I16_sdwa_gfx9
    UINT64_C(2102264057),	// V_CMP_T_I16_sdwa_vi
    UINT64_C(2098069504),	// V_CMP_T_I32_e32_si
    UINT64_C(2106458112),	// V_CMP_T_I32_e32_vi
    UINT64_C(3507355648),	// V_CMP_T_I32_e64_si
    UINT64_C(3502702592),	// V_CMP_T_I32_e64_vi
    UINT64_C(2106458361),	// V_CMP_T_I32_sdwa_gfx9
    UINT64_C(2106458361),	// V_CMP_T_I32_sdwa_vi
    UINT64_C(2102263808),	// V_CMP_T_I64_e32_si
    UINT64_C(2110652416),	// V_CMP_T_I64_e32_vi
    UINT64_C(3511549952),	// V_CMP_T_I64_e64_si
    UINT64_C(3504799744),	// V_CMP_T_I64_e64_vi
    UINT64_C(2110652665),	// V_CMP_T_I64_sdwa_gfx9
    UINT64_C(2110652665),	// V_CMP_T_I64_sdwa_vi
    UINT64_C(2103312384),	// V_CMP_T_U16_e32_vi
    UINT64_C(3501129728),	// V_CMP_T_U16_e64_vi
    UINT64_C(2103312633),	// V_CMP_T_U16_sdwa_gfx9
    UINT64_C(2103312633),	// V_CMP_T_U16_sdwa_vi
    UINT64_C(2106458112),	// V_CMP_T_U32_e32_si
    UINT64_C(2107506688),	// V_CMP_T_U32_e32_vi
    UINT64_C(3515744256),	// V_CMP_T_U32_e64_si
    UINT64_C(3503226880),	// V_CMP_T_U32_e64_vi
    UINT64_C(2107506937),	// V_CMP_T_U32_sdwa_gfx9
    UINT64_C(2107506937),	// V_CMP_T_U32_sdwa_vi
    UINT64_C(2110652416),	// V_CMP_T_U64_e32_si
    UINT64_C(2111700992),	// V_CMP_T_U64_e32_vi
    UINT64_C(3519938560),	// V_CMP_T_U64_e64_si
    UINT64_C(3505324032),	// V_CMP_T_U64_e64_vi
    UINT64_C(2111701241),	// V_CMP_T_U64_sdwa_gfx9
    UINT64_C(2111701241),	// V_CMP_T_U64_sdwa_vi
    UINT64_C(2085617664),	// V_CMP_U_F16_e32_vi
    UINT64_C(3492282368),	// V_CMP_U_F16_e64_vi
    UINT64_C(2085617913),	// V_CMP_U_F16_sdwa_gfx9
    UINT64_C(2085617913),	// V_CMP_U_F16_sdwa_vi
    UINT64_C(2081423360),	// V_CMP_U_F32_e32_si
    UINT64_C(2089811968),	// V_CMP_U_F32_e32_vi
    UINT64_C(3490709504),	// V_CMP_U_F32_e64_si
    UINT64_C(3494379520),	// V_CMP_U_F32_e64_vi
    UINT64_C(2089812217),	// V_CMP_U_F32_sdwa_gfx9
    UINT64_C(2089812217),	// V_CMP_U_F32_sdwa_vi
    UINT64_C(2085617664),	// V_CMP_U_F64_e32_si
    UINT64_C(2094006272),	// V_CMP_U_F64_e32_vi
    UINT64_C(3494903808),	// V_CMP_U_F64_e64_si
    UINT64_C(3496476672),	// V_CMP_U_F64_e64_vi
    UINT64_C(2094006521),	// V_CMP_U_F64_sdwa_gfx9
    UINT64_C(2094006521),	// V_CMP_U_F64_sdwa_vi
    UINT64_C(250),	// V_CNDMASK_B32_dpp_vi
    UINT64_C(0),	// V_CNDMASK_B32_e32_si
    UINT64_C(0),	// V_CNDMASK_B32_e32_vi
    UINT64_C(3523215360),	// V_CNDMASK_B32_e64_si
    UINT64_C(3506438144),	// V_CNDMASK_B32_e64_vi
    UINT64_C(249),	// V_CNDMASK_B32_sdwa_gfx9
    UINT64_C(249),	// V_CNDMASK_B32_sdwa_vi
    UINT64_C(2113967354),	// V_COS_F16_dpp_vi
    UINT64_C(2113967104),	// V_COS_F16_e32_vi
    UINT64_C(3515482112),	// V_COS_F16_e64_vi
    UINT64_C(2113967353),	// V_COS_F16_sdwa_gfx9
    UINT64_C(2113967353),	// V_COS_F16_sdwa_vi
    UINT64_C(2113950970),	// V_COS_F32_dpp_vi
    UINT64_C(2113956864),	// V_COS_F32_e32_si
    UINT64_C(2113950720),	// V_COS_F32_e32_vi
    UINT64_C(3547070464),	// V_COS_F32_e64_si
    UINT64_C(3513384960),	// V_COS_F32_e64_vi
    UINT64_C(2113950969),	// V_COS_F32_sdwa_gfx9
    UINT64_C(2113950969),	// V_COS_F32_sdwa_vi
    UINT64_C(3532128256),	// V_CUBEID_F32_si
    UINT64_C(3519283200),	// V_CUBEID_F32_vi
    UINT64_C(3532521472),	// V_CUBEMA_F32_si
    UINT64_C(3519479808),	// V_CUBEMA_F32_vi
    UINT64_C(3532259328),	// V_CUBESC_F32_si
    UINT64_C(3519348736),	// V_CUBESC_F32_vi
    UINT64_C(3532390400),	// V_CUBETC_F32_si
    UINT64_C(3519414272),	// V_CUBETC_F32_vi
    UINT64_C(2113934586),	// V_CVT_F16_F32_dpp_vi
    UINT64_C(2113934336),	// V_CVT_F16_F32_e32_si
    UINT64_C(2113934336),	// V_CVT_F16_F32_e32_vi
    UINT64_C(3541303296),	// V_CVT_F16_F32_e64_si
    UINT64_C(3511287808),	// V_CVT_F16_F32_e64_vi
    UINT64_C(2113934585),	// V_CVT_F16_F32_sdwa_gfx9
    UINT64_C(2113934585),	// V_CVT_F16_F32_sdwa_vi
    UINT64_C(2113959162),	// V_CVT_F16_I16_dpp_vi
    UINT64_C(2113958912),	// V_CVT_F16_I16_e32_vi
    UINT64_C(3514433536),	// V_CVT_F16_I16_e64_vi
    UINT64_C(2113959161),	// V_CVT_F16_I16_sdwa_gfx9
    UINT64_C(2113959161),	// V_CVT_F16_I16_sdwa_vi
    UINT64_C(2113958650),	// V_CVT_F16_U16_dpp_vi
    UINT64_C(2113958400),	// V_CVT_F16_U16_e32_vi
    UINT64_C(3514368000),	// V_CVT_F16_U16_e64_vi
    UINT64_C(2113958649),	// V_CVT_F16_U16_sdwa_gfx9
    UINT64_C(2113958649),	// V_CVT_F16_U16_sdwa_vi
    UINT64_C(2113935098),	// V_CVT_F32_F16_dpp_vi
    UINT64_C(2113934848),	// V_CVT_F32_F16_e32_si
    UINT64_C(2113934848),	// V_CVT_F32_F16_e32_vi
    UINT64_C(3541434368),	// V_CVT_F32_F16_e64_si
    UINT64_C(3511353344),	// V_CVT_F32_F16_e64_vi
    UINT64_C(2113935097),	// V_CVT_F32_F16_sdwa_gfx9
    UINT64_C(2113935097),	// V_CVT_F32_F16_sdwa_vi
    UINT64_C(2113936896),	// V_CVT_F32_F64_e32_si
    UINT64_C(2113936896),	// V_CVT_F32_F64_e32_vi
    UINT64_C(3541958656),	// V_CVT_F32_F64_e64_si
    UINT64_C(3511615488),	// V_CVT_F32_F64_e64_vi
    UINT64_C(2113937145),	// V_CVT_F32_F64_sdwa_gfx9
    UINT64_C(2113937145),	// V_CVT_F32_F64_sdwa_vi
    UINT64_C(2113932026),	// V_CVT_F32_I32_dpp_vi
    UINT64_C(2113931776),	// V_CVT_F32_I32_e32_si
    UINT64_C(2113931776),	// V_CVT_F32_I32_e32_vi
    UINT64_C(3540647936),	// V_CVT_F32_I32_e64_si
    UINT64_C(3510960128),	// V_CVT_F32_I32_e64_vi
    UINT64_C(2113932025),	// V_CVT_F32_I32_sdwa_gfx9
    UINT64_C(2113932025),	// V_CVT_F32_I32_sdwa_vi
    UINT64_C(2113932538),	// V_CVT_F32_U32_dpp_vi
    UINT64_C(2113932288),	// V_CVT_F32_U32_e32_si
    UINT64_C(2113932288),	// V_CVT_F32_U32_e32_vi
    UINT64_C(3540779008),	// V_CVT_F32_U32_e64_si
    UINT64_C(3511025664),	// V_CVT_F32_U32_e64_vi
    UINT64_C(2113932537),	// V_CVT_F32_U32_sdwa_gfx9
    UINT64_C(2113932537),	// V_CVT_F32_U32_sdwa_vi
    UINT64_C(2113938170),	// V_CVT_F32_UBYTE0_dpp_vi
    UINT64_C(2113937920),	// V_CVT_F32_UBYTE0_e32_si
    UINT64_C(2113937920),	// V_CVT_F32_UBYTE0_e32_vi
    UINT64_C(3542220800),	// V_CVT_F32_UBYTE0_e64_si
    UINT64_C(3511746560),	// V_CVT_F32_UBYTE0_e64_vi
    UINT64_C(2113938169),	// V_CVT_F32_UBYTE0_sdwa_gfx9
    UINT64_C(2113938169),	// V_CVT_F32_UBYTE0_sdwa_vi
    UINT64_C(2113938682),	// V_CVT_F32_UBYTE1_dpp_vi
    UINT64_C(2113938432),	// V_CVT_F32_UBYTE1_e32_si
    UINT64_C(2113938432),	// V_CVT_F32_UBYTE1_e32_vi
    UINT64_C(3542351872),	// V_CVT_F32_UBYTE1_e64_si
    UINT64_C(3511812096),	// V_CVT_F32_UBYTE1_e64_vi
    UINT64_C(2113938681),	// V_CVT_F32_UBYTE1_sdwa_gfx9
    UINT64_C(2113938681),	// V_CVT_F32_UBYTE1_sdwa_vi
    UINT64_C(2113939194),	// V_CVT_F32_UBYTE2_dpp_vi
    UINT64_C(2113938944),	// V_CVT_F32_UBYTE2_e32_si
    UINT64_C(2113938944),	// V_CVT_F32_UBYTE2_e32_vi
    UINT64_C(3542482944),	// V_CVT_F32_UBYTE2_e64_si
    UINT64_C(3511877632),	// V_CVT_F32_UBYTE2_e64_vi
    UINT64_C(2113939193),	// V_CVT_F32_UBYTE2_sdwa_gfx9
    UINT64_C(2113939193),	// V_CVT_F32_UBYTE2_sdwa_vi
    UINT64_C(2113939706),	// V_CVT_F32_UBYTE3_dpp_vi
    UINT64_C(2113939456),	// V_CVT_F32_UBYTE3_e32_si
    UINT64_C(2113939456),	// V_CVT_F32_UBYTE3_e32_vi
    UINT64_C(3542614016),	// V_CVT_F32_UBYTE3_e64_si
    UINT64_C(3511943168),	// V_CVT_F32_UBYTE3_e64_vi
    UINT64_C(2113939705),	// V_CVT_F32_UBYTE3_sdwa_gfx9
    UINT64_C(2113939705),	// V_CVT_F32_UBYTE3_sdwa_vi
    UINT64_C(2113937408),	// V_CVT_F64_F32_e32_si
    UINT64_C(2113937408),	// V_CVT_F64_F32_e32_vi
    UINT64_C(3542089728),	// V_CVT_F64_F32_e64_si
    UINT64_C(3511681024),	// V_CVT_F64_F32_e64_vi
    UINT64_C(2113937657),	// V_CVT_F64_F32_sdwa_gfx9
    UINT64_C(2113937657),	// V_CVT_F64_F32_sdwa_vi
    UINT64_C(2113931264),	// V_CVT_F64_I32_e32_si
    UINT64_C(2113931264),	// V_CVT_F64_I32_e32_vi
    UINT64_C(3540516864),	// V_CVT_F64_I32_e64_si
    UINT64_C(3510894592),	// V_CVT_F64_I32_e64_vi
    UINT64_C(2113931513),	// V_CVT_F64_I32_sdwa_gfx9
    UINT64_C(2113931513),	// V_CVT_F64_I32_sdwa_vi
    UINT64_C(2113940480),	// V_CVT_F64_U32_e32_si
    UINT64_C(2113940480),	// V_CVT_F64_U32_e32_vi
    UINT64_C(3542876160),	// V_CVT_F64_U32_e64_si
    UINT64_C(3512074240),	// V_CVT_F64_U32_e64_vi
    UINT64_C(2113940729),	// V_CVT_F64_U32_sdwa_gfx9
    UINT64_C(2113940729),	// V_CVT_F64_U32_sdwa_vi
    UINT64_C(2113936122),	// V_CVT_FLR_I32_F32_dpp_vi
    UINT64_C(2113935872),	// V_CVT_FLR_I32_F32_e32_si
    UINT64_C(2113935872),	// V_CVT_FLR_I32_F32_e32_vi
    UINT64_C(3541696512),	// V_CVT_FLR_I32_F32_e64_si
    UINT64_C(3511484416),	// V_CVT_FLR_I32_F32_e64_vi
    UINT64_C(2113936121),	// V_CVT_FLR_I32_F32_sdwa_gfx9
    UINT64_C(2113936121),	// V_CVT_FLR_I32_F32_sdwa_vi
    UINT64_C(2113960186),	// V_CVT_I16_F16_dpp_vi
    UINT64_C(2113959936),	// V_CVT_I16_F16_e32_vi
    UINT64_C(3514564608),	// V_CVT_I16_F16_e64_vi
    UINT64_C(2113960185),	// V_CVT_I16_F16_sdwa_gfx9
    UINT64_C(2113960185),	// V_CVT_I16_F16_sdwa_vi
    UINT64_C(2113933562),	// V_CVT_I32_F32_dpp_vi
    UINT64_C(2113933312),	// V_CVT_I32_F32_e32_si
    UINT64_C(2113933312),	// V_CVT_I32_F32_e32_vi
    UINT64_C(3541041152),	// V_CVT_I32_F32_e64_si
    UINT64_C(3511156736),	// V_CVT_I32_F32_e64_vi
    UINT64_C(2113933561),	// V_CVT_I32_F32_sdwa_gfx9
    UINT64_C(2113933561),	// V_CVT_I32_F32_sdwa_vi
    UINT64_C(2113930752),	// V_CVT_I32_F64_e32_si
    UINT64_C(2113930752),	// V_CVT_I32_F64_e32_vi
    UINT64_C(3540385792),	// V_CVT_I32_F64_e64_si
    UINT64_C(3510829056),	// V_CVT_I32_F64_e64_vi
    UINT64_C(2113931001),	// V_CVT_I32_F64_sdwa_gfx9
    UINT64_C(2113931001),	// V_CVT_I32_F64_sdwa_vi
    UINT64_C(2113968890),	// V_CVT_NORM_I16_F16_dpp_vi
    UINT64_C(2113968640),	// V_CVT_NORM_I16_F16_e32_vi
    UINT64_C(3515678720),	// V_CVT_NORM_I16_F16_e64_vi
    UINT64_C(2113968889),	// V_CVT_NORM_I16_F16_sdwa_gfx9
    UINT64_C(2113968889),	// V_CVT_NORM_I16_F16_sdwa_vi
    UINT64_C(2113969402),	// V_CVT_NORM_U16_F16_dpp_vi
    UINT64_C(2113969152),	// V_CVT_NORM_U16_F16_e32_vi
    UINT64_C(3515744256),	// V_CVT_NORM_U16_F16_e64_vi
    UINT64_C(2113969401),	// V_CVT_NORM_U16_F16_sdwa_gfx9
    UINT64_C(2113969401),	// V_CVT_NORM_U16_F16_sdwa_vi
    UINT64_C(2113936634),	// V_CVT_OFF_F32_I4_dpp_vi
    UINT64_C(2113936384),	// V_CVT_OFF_F32_I4_e32_si
    UINT64_C(2113936384),	// V_CVT_OFF_F32_I4_e32_vi
    UINT64_C(3541827584),	// V_CVT_OFF_F32_I4_e64_si
    UINT64_C(3511549952),	// V_CVT_OFF_F32_I4_e64_vi
    UINT64_C(2113936633),	// V_CVT_OFF_F32_I4_sdwa_gfx9
    UINT64_C(2113936633),	// V_CVT_OFF_F32_I4_sdwa_vi
    UINT64_C(1476395008),	// V_CVT_PKACCUM_U8_F32_e32_si
    UINT64_C(3528982528),	// V_CVT_PKACCUM_U8_F32_e64_si
    UINT64_C(3522166784),	// V_CVT_PKACCUM_U8_F32_e64_vi
    UINT64_C(3533242368),	// V_CVT_PKNORM_I16_F16_vi
    UINT64_C(1509949440),	// V_CVT_PKNORM_I16_F32_e32_si
    UINT64_C(3529113600),	// V_CVT_PKNORM_I16_F32_e64_si
    UINT64_C(3532914688),	// V_CVT_PKNORM_I16_F32_e64_vi
    UINT64_C(3533307904),	// V_CVT_PKNORM_U16_F16_vi
    UINT64_C(1543503872),	// V_CVT_PKNORM_U16_F32_e32_si
    UINT64_C(3529244672),	// V_CVT_PKNORM_U16_F32_e64_si
    UINT64_C(3532980224),	// V_CVT_PKNORM_U16_F32_e64_vi
    UINT64_C(1577058304),	// V_CVT_PKRTZ_F16_F32_e32_si
    UINT64_C(3529375744),	// V_CVT_PKRTZ_F16_F32_e64_si
    UINT64_C(3533045760),	// V_CVT_PKRTZ_F16_F32_e64_vi
    UINT64_C(1644167168),	// V_CVT_PK_I16_I32_e32_si
    UINT64_C(3529637888),	// V_CVT_PK_I16_I32_e64_si
    UINT64_C(3533176832),	// V_CVT_PK_I16_I32_e64_vi
    UINT64_C(1610612736),	// V_CVT_PK_U16_U32_e32_si
    UINT64_C(3529506816),	// V_CVT_PK_U16_U32_e64_si
    UINT64_C(3533111296),	// V_CVT_PK_U16_U32_e64_vi
    UINT64_C(3535536128),	// V_CVT_PK_U8_F32_si
    UINT64_C(3520921600),	// V_CVT_PK_U8_F32_vi
    UINT64_C(2113935610),	// V_CVT_RPI_I32_F32_dpp_vi
    UINT64_C(2113935360),	// V_CVT_RPI_I32_F32_e32_si
    UINT64_C(2113935360),	// V_CVT_RPI_I32_F32_e32_vi
    UINT64_C(3541565440),	// V_CVT_RPI_I32_F32_e64_si
    UINT64_C(3511418880),	// V_CVT_RPI_I32_F32_e64_vi
    UINT64_C(2113935609),	// V_CVT_RPI_I32_F32_sdwa_gfx9
    UINT64_C(2113935609),	// V_CVT_RPI_I32_F32_sdwa_vi
    UINT64_C(2113959674),	// V_CVT_U16_F16_dpp_vi
    UINT64_C(2113959424),	// V_CVT_U16_F16_e32_vi
    UINT64_C(3514499072),	// V_CVT_U16_F16_e64_vi
    UINT64_C(2113959673),	// V_CVT_U16_F16_sdwa_gfx9
    UINT64_C(2113959673),	// V_CVT_U16_F16_sdwa_vi
    UINT64_C(2113933050),	// V_CVT_U32_F32_dpp_vi
    UINT64_C(2113932800),	// V_CVT_U32_F32_e32_si
    UINT64_C(2113932800),	// V_CVT_U32_F32_e32_vi
    UINT64_C(3540910080),	// V_CVT_U32_F32_e64_si
    UINT64_C(3511091200),	// V_CVT_U32_F32_e64_vi
    UINT64_C(2113933049),	// V_CVT_U32_F32_sdwa_gfx9
    UINT64_C(2113933049),	// V_CVT_U32_F32_sdwa_vi
    UINT64_C(2113939968),	// V_CVT_U32_F64_e32_si
    UINT64_C(2113939968),	// V_CVT_U32_F64_e32_vi
    UINT64_C(3542745088),	// V_CVT_U32_F64_e64_si
    UINT64_C(3512008704),	// V_CVT_U32_F64_e64_vi
    UINT64_C(2113940217),	// V_CVT_U32_F64_sdwa_gfx9
    UINT64_C(2113940217),	// V_CVT_U32_F64_sdwa_vi
    UINT64_C(3523674112),	// V_DIV_FIXUP_F16_gfx9_gfx9
    UINT64_C(3522101248),	// V_DIV_FIXUP_F16_vi
    UINT64_C(3535667200),	// V_DIV_FIXUP_F32_si
    UINT64_C(3520987136),	// V_DIV_FIXUP_F32_vi
    UINT64_C(3535798272),	// V_DIV_FIXUP_F64_si
    UINT64_C(3521052672),	// V_DIV_FIXUP_F64_vi
    UINT64_C(3522101248),	// V_DIV_FIXUP_LEGACY_F16_gfx9
    UINT64_C(3537764352),	// V_DIV_FMAS_F32_si
    UINT64_C(3521249280),	// V_DIV_FMAS_F32_vi
    UINT64_C(3537895424),	// V_DIV_FMAS_F64_si
    UINT64_C(3521314816),	// V_DIV_FMAS_F64_vi
    UINT64_C(3537502208),	// V_DIV_SCALE_F32_si
    UINT64_C(3521118208),	// V_DIV_SCALE_F32_vi
    UINT64_C(3537633280),	// V_DIV_SCALE_F64_si
    UINT64_C(3521183744),	// V_DIV_SCALE_F64_vi
    UINT64_C(3550674944),	// V_DOT2_F32_F16_vi
    UINT64_C(3550871552),	// V_DOT2_I32_I16_vi
    UINT64_C(3550937088),	// V_DOT2_U32_U16_vi
    UINT64_C(3551002624),	// V_DOT4_I32_I8_vi
    UINT64_C(3551068160),	// V_DOT4_U32_U8_vi
    UINT64_C(3551133696),	// V_DOT8_I32_I4_vi
    UINT64_C(3551199232),	// V_DOT8_U32_U4_vi
    UINT64_C(2113962746),	// V_EXP_F16_dpp_vi
    UINT64_C(2113962496),	// V_EXP_F16_e32_vi
    UINT64_C(3514892288),	// V_EXP_F16_e64_vi
    UINT64_C(2113962745),	// V_EXP_F16_sdwa_gfx9
    UINT64_C(2113962745),	// V_EXP_F16_sdwa_vi
    UINT64_C(2113945850),	// V_EXP_F32_dpp_vi
    UINT64_C(2113948160),	// V_EXP_F32_e32_si
    UINT64_C(2113945600),	// V_EXP_F32_e32_vi
    UINT64_C(3544842240),	// V_EXP_F32_e64_si
    UINT64_C(3512729600),	// V_EXP_F32_e64_vi
    UINT64_C(2113945849),	// V_EXP_F32_sdwa_gfx9
    UINT64_C(2113945849),	// V_EXP_F32_sdwa_vi
    UINT64_C(2113967866),	// V_EXP_LEGACY_F32_dpp_vi
    UINT64_C(2113965056),	// V_EXP_LEGACY_F32_e32_ci
    UINT64_C(2113967616),	// V_EXP_LEGACY_F32_e32_vi
    UINT64_C(3549167616),	// V_EXP_LEGACY_F32_e64_ci
    UINT64_C(3515547648),	// V_EXP_LEGACY_F32_e64_vi
    UINT64_C(2113967865),	// V_EXP_LEGACY_F32_sdwa_gfx9
    UINT64_C(2113967865),	// V_EXP_LEGACY_F32_sdwa_vi
    UINT64_C(2113953530),	// V_FFBH_I32_dpp_vi
    UINT64_C(2113959424),	// V_FFBH_I32_e32_si
    UINT64_C(2113953280),	// V_FFBH_I32_e32_vi
    UINT64_C(3547725824),	// V_FFBH_I32_e64_si
    UINT64_C(3513712640),	// V_FFBH_I32_e64_vi
    UINT64_C(2113953529),	// V_FFBH_I32_sdwa_gfx9
    UINT64_C(2113953529),	// V_FFBH_I32_sdwa_vi
    UINT64_C(2113952506),	// V_FFBH_U32_dpp_vi
    UINT64_C(2113958400),	// V_FFBH_U32_e32_si
    UINT64_C(2113952256),	// V_FFBH_U32_e32_vi
    UINT64_C(3547463680),	// V_FFBH_U32_e64_si
    UINT64_C(3513581568),	// V_FFBH_U32_e64_vi
    UINT64_C(2113952505),	// V_FFBH_U32_sdwa_gfx9
    UINT64_C(2113952505),	// V_FFBH_U32_sdwa_vi
    UINT64_C(2113953018),	// V_FFBL_B32_dpp_vi
    UINT64_C(2113958912),	// V_FFBL_B32_e32_si
    UINT64_C(2113952768),	// V_FFBL_B32_e32_vi
    UINT64_C(3547594752),	// V_FFBL_B32_e64_si
    UINT64_C(3513647104),	// V_FFBL_B32_e64_vi
    UINT64_C(2113953017),	// V_FFBL_B32_sdwa_gfx9
    UINT64_C(2113953017),	// V_FFBL_B32_sdwa_vi
    UINT64_C(2113964282),	// V_FLOOR_F16_dpp_vi
    UINT64_C(2113964032),	// V_FLOOR_F16_e32_vi
    UINT64_C(3515088896),	// V_FLOOR_F16_e64_vi
    UINT64_C(2113964281),	// V_FLOOR_F16_sdwa_gfx9
    UINT64_C(2113964281),	// V_FLOOR_F16_sdwa_vi
    UINT64_C(2113945338),	// V_FLOOR_F32_dpp_vi
    UINT64_C(2113947648),	// V_FLOOR_F32_e32_si
    UINT64_C(2113945088),	// V_FLOOR_F32_e32_vi
    UINT64_C(3544711168),	// V_FLOOR_F32_e64_si
    UINT64_C(3512664064),	// V_FLOOR_F32_e64_vi
    UINT64_C(2113945337),	// V_FLOOR_F32_sdwa_gfx9
    UINT64_C(2113945337),	// V_FLOOR_F32_sdwa_vi
    UINT64_C(2113942528),	// V_FLOOR_F64_e32_ci
    UINT64_C(2113942528),	// V_FLOOR_F64_e32_vi
    UINT64_C(3543400448),	// V_FLOOR_F64_e64_ci
    UINT64_C(3512336384),	// V_FLOOR_F64_e64_vi
    UINT64_C(2113942777),	// V_FLOOR_F64_sdwa_gfx9
    UINT64_C(2113942777),	// V_FLOOR_F64_sdwa_vi
    UINT64_C(1979711738),	// V_FMAC_F32_dpp_vi
    UINT64_C(1979711488),	// V_FMAC_F32_e32_vi
    UINT64_C(3510304768),	// V_FMAC_F32_e64_vi
    UINT64_C(1979711737),	// V_FMAC_F32_sdwa_gfx9
    UINT64_C(1979711737),	// V_FMAC_F32_sdwa_vi
    UINT64_C(3523608576),	// V_FMA_F16_gfx9_gfx9
    UINT64_C(3522035712),	// V_FMA_F16_vi
    UINT64_C(3533045760),	// V_FMA_F32_si
    UINT64_C(3519741952),	// V_FMA_F32_vi
    UINT64_C(3533176832),	// V_FMA_F64_si
    UINT64_C(3519807488),	// V_FMA_F64_vi
    UINT64_C(3522035712),	// V_FMA_LEGACY_F16_gfx9
    UINT64_C(3550609408),	// V_FMA_MIXHI_F16_vi
    UINT64_C(3550543872),	// V_FMA_MIXLO_F16_vi
    UINT64_C(3550478336),	// V_FMA_MIX_F32_vi
    UINT64_C(2113966330),	// V_FRACT_F16_dpp_vi
    UINT64_C(2113966080),	// V_FRACT_F16_e32_vi
    UINT64_C(3515351040),	// V_FRACT_F16_e64_vi
    UINT64_C(2113966329),	// V_FRACT_F16_sdwa_gfx9
    UINT64_C(2113966329),	// V_FRACT_F16_sdwa_vi
    UINT64_C(2113943290),	// V_FRACT_F32_dpp_vi
    UINT64_C(2113945600),	// V_FRACT_F32_e32_si
    UINT64_C(2113943040),	// V_FRACT_F32_e32_vi
    UINT64_C(3544186880),	// V_FRACT_F32_e64_si
    UINT64_C(3512401920),	// V_FRACT_F32_e64_vi
    UINT64_C(2113943289),	// V_FRACT_F32_sdwa_gfx9
    UINT64_C(2113943289),	// V_FRACT_F32_sdwa_vi
    UINT64_C(2113960960),	// V_FRACT_F64_e32_si
    UINT64_C(2113954816),	// V_FRACT_F64_e32_vi
    UINT64_C(3548119040),	// V_FRACT_F64_e64_si
    UINT64_C(3513909248),	// V_FRACT_F64_e64_vi
    UINT64_C(2113955065),	// V_FRACT_F64_sdwa_gfx9
    UINT64_C(2113955065),	// V_FRACT_F64_sdwa_vi
    UINT64_C(2113963770),	// V_FREXP_EXP_I16_F16_dpp_vi
    UINT64_C(2113963520),	// V_FREXP_EXP_I16_F16_e32_vi
    UINT64_C(3515023360),	// V_FREXP_EXP_I16_F16_e64_vi
    UINT64_C(2113963769),	// V_FREXP_EXP_I16_F16_sdwa_gfx9
    UINT64_C(2113963769),	// V_FREXP_EXP_I16_F16_sdwa_vi
    UINT64_C(2113955578),	// V_FREXP_EXP_I32_F32_dpp_vi
    UINT64_C(2113961472),	// V_FREXP_EXP_I32_F32_e32_si
    UINT64_C(2113955328),	// V_FREXP_EXP_I32_F32_e32_vi
    UINT64_C(3548250112),	// V_FREXP_EXP_I32_F32_e64_si
    UINT64_C(3513974784),	// V_FREXP_EXP_I32_F32_e64_vi
    UINT64_C(2113955577),	// V_FREXP_EXP_I32_F32_sdwa_gfx9
    UINT64_C(2113955577),	// V_FREXP_EXP_I32_F32_sdwa_vi
    UINT64_C(2113959936),	// V_FREXP_EXP_I32_F64_e32_si
    UINT64_C(2113953792),	// V_FREXP_EXP_I32_F64_e32_vi
    UINT64_C(3547856896),	// V_FREXP_EXP_I32_F64_e64_si
    UINT64_C(3513778176),	// V_FREXP_EXP_I32_F64_e64_vi
    UINT64_C(2113954041),	// V_FREXP_EXP_I32_F64_sdwa_gfx9
    UINT64_C(2113954041),	// V_FREXP_EXP_I32_F64_sdwa_vi
    UINT64_C(2113963258),	// V_FREXP_MANT_F16_dpp_vi
    UINT64_C(2113963008),	// V_FREXP_MANT_F16_e32_vi
    UINT64_C(3514957824),	// V_FREXP_MANT_F16_e64_vi
    UINT64_C(2113963257),	// V_FREXP_MANT_F16_sdwa_gfx9
    UINT64_C(2113963257),	// V_FREXP_MANT_F16_sdwa_vi
    UINT64_C(2113956090),	// V_FREXP_MANT_F32_dpp_vi
    UINT64_C(2113961984),	// V_FREXP_MANT_F32_e32_si
    UINT64_C(2113955840),	// V_FREXP_MANT_F32_e32_vi
    UINT64_C(3548381184),	// V_FREXP_MANT_F32_e64_si
    UINT64_C(3514040320),	// V_FREXP_MANT_F32_e64_vi
    UINT64_C(2113956089),	// V_FREXP_MANT_F32_sdwa_gfx9
    UINT64_C(2113956089),	// V_FREXP_MANT_F32_sdwa_vi
    UINT64_C(2113960448),	// V_FREXP_MANT_F64_e32_si
    UINT64_C(2113954304),	// V_FREXP_MANT_F64_e32_vi
    UINT64_C(3547987968),	// V_FREXP_MANT_F64_e64_si
    UINT64_C(3513843712),	// V_FREXP_MANT_F64_e64_vi
    UINT64_C(2113954553),	// V_FREXP_MANT_F64_sdwa_gfx9
    UINT64_C(2113954553),	// V_FREXP_MANT_F64_sdwa_vi
    UINT64_C(3530686464),	// V_INTERP_MOV_F32_e64_vi
    UINT64_C(3355574272),	// V_INTERP_MOV_F32_si
    UINT64_C(3556900864),	// V_INTERP_MOV_F32_vi
    UINT64_C(3530817536),	// V_INTERP_P1LL_F16_vi
    UINT64_C(3530883072),	// V_INTERP_P1LV_F16_vi
    UINT64_C(3355443200),	// V_INTERP_P1_F32_16bank_si
    UINT64_C(3556769792),	// V_INTERP_P1_F32_16bank_vi
    UINT64_C(3530555392),	// V_INTERP_P1_F32_e64_vi
    UINT64_C(3355443200),	// V_INTERP_P1_F32_si
    UINT64_C(3556769792),	// V_INTERP_P1_F32_vi
    UINT64_C(3531014144),	// V_INTERP_P2_F16_gfx9_gfx9
    UINT64_C(3530948608),	// V_INTERP_P2_F16_vi
    UINT64_C(3530620928),	// V_INTERP_P2_F32_e64_vi
    UINT64_C(3355508736),	// V_INTERP_P2_F32_si
    UINT64_C(3556835328),	// V_INTERP_P2_F32_vi
    UINT64_C(3530948608),	// V_INTERP_P2_LEGACY_F16_gfx9
    UINT64_C(1711276282),	// V_LDEXP_F16_dpp_vi
    UINT64_C(1711276032),	// V_LDEXP_F16_e32_vi
    UINT64_C(3509780480),	// V_LDEXP_F16_e64_vi
    UINT64_C(1711276281),	// V_LDEXP_F16_sdwa_gfx9
    UINT64_C(1711276281),	// V_LDEXP_F16_sdwa_vi
    UINT64_C(1442840576),	// V_LDEXP_F32_e32_si
    UINT64_C(3528851456),	// V_LDEXP_F32_e64_si
    UINT64_C(3532128256),	// V_LDEXP_F32_e64_vi
    UINT64_C(3536846848),	// V_LDEXP_F64_si
    UINT64_C(3531866112),	// V_LDEXP_F64_vi
    UINT64_C(3533307904),	// V_LERP_U8_si
    UINT64_C(3519873024),	// V_LERP_U8_vi
    UINT64_C(2113948672),	// V_LOG_CLAMP_F32_e32_si
    UINT64_C(3544973312),	// V_LOG_CLAMP_F32_e64_si
    UINT64_C(2113962234),	// V_LOG_F16_dpp_vi
    UINT64_C(2113961984),	// V_LOG_F16_e32_vi
    UINT64_C(3514826752),	// V_LOG_F16_e64_vi
    UINT64_C(2113962233),	// V_LOG_F16_sdwa_gfx9
    UINT64_C(2113962233),	// V_LOG_F16_sdwa_vi
    UINT64_C(2113946362),	// V_LOG_F32_dpp_vi
    UINT64_C(2113949184),	// V_LOG_F32_e32_si
    UINT64_C(2113946112),	// V_LOG_F32_e32_vi
    UINT64_C(3545104384),	// V_LOG_F32_e64_si
    UINT64_C(3512795136),	// V_LOG_F32_e64_vi
    UINT64_C(2113946361),	// V_LOG_F32_sdwa_gfx9
    UINT64_C(2113946361),	// V_LOG_F32_sdwa_vi
    UINT64_C(2113968378),	// V_LOG_LEGACY_F32_dpp_vi
    UINT64_C(2113964544),	// V_LOG_LEGACY_F32_e32_ci
    UINT64_C(2113968128),	// V_LOG_LEGACY_F32_e32_vi
    UINT64_C(3549036544),	// V_LOG_LEGACY_F32_e64_ci
    UINT64_C(3515613184),	// V_LOG_LEGACY_F32_e64_vi
    UINT64_C(2113968377),	// V_LOG_LEGACY_F32_sdwa_gfx9
    UINT64_C(2113968377),	// V_LOG_LEGACY_F32_sdwa_vi
    UINT64_C(1409286394),	// V_LSHLREV_B16_dpp_vi
    UINT64_C(1409286144),	// V_LSHLREV_B16_e32_vi
    UINT64_C(3509190656),	// V_LSHLREV_B16_e64_vi
    UINT64_C(1409286393),	// V_LSHLREV_B16_sdwa_gfx9
    UINT64_C(1409286393),	// V_LSHLREV_B16_sdwa_vi
    UINT64_C(603980026),	// V_LSHLREV_B32_dpp_vi
    UINT64_C(872415232),	// V_LSHLREV_B32_e32_si
    UINT64_C(603979776),	// V_LSHLREV_B32_e32_vi
    UINT64_C(3526623232),	// V_LSHLREV_B32_e64_si
    UINT64_C(3507617792),	// V_LSHLREV_B32_e64_vi
    UINT64_C(603980025),	// V_LSHLREV_B32_sdwa_gfx9
    UINT64_C(603980025),	// V_LSHLREV_B32_sdwa_vi
    UINT64_C(3532587008),	// V_LSHLREV_B64_vi
    UINT64_C(3523018752),	// V_LSHL_ADD_U32_vi
    UINT64_C(838860800),	// V_LSHL_B32_e32_si
    UINT64_C(3526492160),	// V_LSHL_B32_e64_si
    UINT64_C(3535929344),	// V_LSHL_B64_si
    UINT64_C(3523215360),	// V_LSHL_OR_B32_vi
    UINT64_C(1442840826),	// V_LSHRREV_B16_dpp_vi
    UINT64_C(1442840576),	// V_LSHRREV_B16_e32_vi
    UINT64_C(3509256192),	// V_LSHRREV_B16_e64_vi
    UINT64_C(1442840825),	// V_LSHRREV_B16_sdwa_gfx9
    UINT64_C(1442840825),	// V_LSHRREV_B16_sdwa_vi
    UINT64_C(536871162),	// V_LSHRREV_B32_dpp_vi
    UINT64_C(738197504),	// V_LSHRREV_B32_e32_si
    UINT64_C(536870912),	// V_LSHRREV_B32_e32_vi
    UINT64_C(3526098944),	// V_LSHRREV_B32_e64_si
    UINT64_C(3507486720),	// V_LSHRREV_B32_e64_vi
    UINT64_C(536871161),	// V_LSHRREV_B32_sdwa_gfx9
    UINT64_C(536871161),	// V_LSHRREV_B32_sdwa_vi
    UINT64_C(3532652544),	// V_LSHRREV_B64_vi
    UINT64_C(704643072),	// V_LSHR_B32_e32_si
    UINT64_C(3525967872),	// V_LSHR_B32_e64_si
    UINT64_C(3536060416),	// V_LSHR_B64_si
    UINT64_C(1174405370),	// V_MAC_F16_dpp_vi
    UINT64_C(1174405120),	// V_MAC_F16_e32_vi
    UINT64_C(3508731904),	// V_MAC_F16_e64_vi
    UINT64_C(1174405369),	// V_MAC_F16_sdwa_gfx9
    UINT64_C(1174405369),	// V_MAC_F16_sdwa_vi
    UINT64_C(738197754),	// V_MAC_F32_dpp_vi
    UINT64_C(1040187392),	// V_MAC_F32_e32_si
    UINT64_C(738197504),	// V_MAC_F32_e32_vi
    UINT64_C(3527278592),	// V_MAC_F32_e64_si
    UINT64_C(3507879936),	// V_MAC_F32_e64_vi
    UINT64_C(738197753),	// V_MAC_F32_sdwa_gfx9
    UINT64_C(738197753),	// V_MAC_F32_sdwa_vi
    UINT64_C(201326592),	// V_MAC_LEGACY_F32_e32_si
    UINT64_C(3524001792),	// V_MAC_LEGACY_F32_e64_si
    UINT64_C(1241513984),	// V_MADAK_F16_vi
    UINT64_C(1107296256),	// V_MADAK_F32_si
    UINT64_C(805306368),	// V_MADAK_F32_vi
    UINT64_C(1207959552),	// V_MADMK_F16_vi
    UINT64_C(1073741824),	// V_MADMK_F32_si
    UINT64_C(771751936),	// V_MADMK_F32_vi
    UINT64_C(3523411968),	// V_MAD_F16_gfx9_gfx9
    UINT64_C(3521773568),	// V_MAD_F16_vi
    UINT64_C(3531735040),	// V_MAD_F32_si
    UINT64_C(3519086592),	// V_MAD_F32_vi
    UINT64_C(3523543040),	// V_MAD_I16_gfx9_gfx9
    UINT64_C(3521904640),	// V_MAD_I16_vi
    UINT64_C(3522297856),	// V_MAD_I32_I16_vi
    UINT64_C(3531866112),	// V_MAD_I32_I24_si
    UINT64_C(3519152128),	// V_MAD_I32_I24_vi
    UINT64_C(3538812928),	// V_MAD_I64_I32_ci
    UINT64_C(3521708032),	// V_MAD_I64_I32_vi
    UINT64_C(3521773568),	// V_MAD_LEGACY_F16_gfx9
    UINT64_C(3531603968),	// V_MAD_LEGACY_F32_si
    UINT64_C(3519021056),	// V_MAD_LEGACY_F32_vi
    UINT64_C(3521904640),	// V_MAD_LEGACY_I16_gfx9
    UINT64_C(3521839104),	// V_MAD_LEGACY_U16_gfx9
    UINT64_C(3550609408),	// V_MAD_MIXHI_F16_vi
    UINT64_C(3550543872),	// V_MAD_MIXLO_F16_vi
    UINT64_C(3550478336),	// V_MAD_MIX_F32_vi
    UINT64_C(3523477504),	// V_MAD_U16_gfx9_gfx9
    UINT64_C(3521839104),	// V_MAD_U16_vi
    UINT64_C(3522232320),	// V_MAD_U32_U16_vi
    UINT64_C(3531997184),	// V_MAD_U32_U24_si
    UINT64_C(3519217664),	// V_MAD_U32_U24_vi
    UINT64_C(3538681856),	// V_MAD_U64_U32_ci
    UINT64_C(3521642496),	// V_MAD_U64_U32_vi
    UINT64_C(3522625536),	// V_MAX3_F16_vi
    UINT64_C(3534225408),	// V_MAX3_F32_si
    UINT64_C(3520266240),	// V_MAX3_F32_vi
    UINT64_C(3522691072),	// V_MAX3_I16_vi
    UINT64_C(3534356480),	// V_MAX3_I32_si
    UINT64_C(3520331776),	// V_MAX3_I32_vi
    UINT64_C(3522756608),	// V_MAX3_U16_vi
    UINT64_C(3534487552),	// V_MAX3_U32_si
    UINT64_C(3520397312),	// V_MAX3_U32_vi
    UINT64_C(1509949690),	// V_MAX_F16_dpp_vi
    UINT64_C(1509949440),	// V_MAX_F16_e32_vi
    UINT64_C(3509387264),	// V_MAX_F16_e64_vi
    UINT64_C(1509949689),	// V_MAX_F16_sdwa_gfx9
    UINT64_C(1509949689),	// V_MAX_F16_sdwa_vi
    UINT64_C(369099002),	// V_MAX_F32_dpp_vi
    UINT64_C(536870912),	// V_MAX_F32_e32_si
    UINT64_C(369098752),	// V_MAX_F32_e32_vi
    UINT64_C(3525312512),	// V_MAX_F32_e64_si
    UINT64_C(3507159040),	// V_MAX_F32_e64_vi
    UINT64_C(369099001),	// V_MAX_F32_sdwa_gfx9
    UINT64_C(369099001),	// V_MAX_F32_sdwa_vi
    UINT64_C(3536715776),	// V_MAX_F64_si
    UINT64_C(3531800576),	// V_MAX_F64_vi
    UINT64_C(1610612986),	// V_MAX_I16_dpp_vi
    UINT64_C(1610612736),	// V_MAX_I16_e32_vi
    UINT64_C(3509583872),	// V_MAX_I16_e64_vi
    UINT64_C(1610612985),	// V_MAX_I16_sdwa_gfx9
    UINT64_C(1610612985),	// V_MAX_I16_sdwa_vi
    UINT64_C(436207866),	// V_MAX_I32_dpp_vi
    UINT64_C(603979776),	// V_MAX_I32_e32_si
    UINT64_C(436207616),	// V_MAX_I32_e32_vi
    UINT64_C(3525574656),	// V_MAX_I32_e64_si
    UINT64_C(3507290112),	// V_MAX_I32_e64_vi
    UINT64_C(436207865),	// V_MAX_I32_sdwa_gfx9
    UINT64_C(436207865),	// V_MAX_I32_sdwa_vi
    UINT64_C(469762048),	// V_MAX_LEGACY_F32_e32_si
    UINT64_C(3525050368),	// V_MAX_LEGACY_F32_e64_si
    UINT64_C(1577058554),	// V_MAX_U16_dpp_vi
    UINT64_C(1577058304),	// V_MAX_U16_e32_vi
    UINT64_C(3509518336),	// V_MAX_U16_e64_vi
    UINT64_C(1577058553),	// V_MAX_U16_sdwa_gfx9
    UINT64_C(1577058553),	// V_MAX_U16_sdwa_vi
    UINT64_C(503316730),	// V_MAX_U32_dpp_vi
    UINT64_C(671088640),	// V_MAX_U32_e32_si
    UINT64_C(503316480),	// V_MAX_U32_e32_vi
    UINT64_C(3525836800),	// V_MAX_U32_e64_si
    UINT64_C(3507421184),	// V_MAX_U32_e64_vi
    UINT64_C(503316729),	// V_MAX_U32_sdwa_gfx9
    UINT64_C(503316729),	// V_MAX_U32_sdwa_vi
    UINT64_C(1207959552),	// V_MBCNT_HI_U32_B32_e32_si
    UINT64_C(3527933952),	// V_MBCNT_HI_U32_B32_e64_si
    UINT64_C(3532455936),	// V_MBCNT_HI_U32_B32_e64_vi
    UINT64_C(1174405120),	// V_MBCNT_LO_U32_B32_e32_si
    UINT64_C(3527802880),	// V_MBCNT_LO_U32_B32_e64_si
    UINT64_C(3532390400),	// V_MBCNT_LO_U32_B32_e64_vi
    UINT64_C(3522822144),	// V_MED3_F16_vi
    UINT64_C(3534618624),	// V_MED3_F32_si
    UINT64_C(3520462848),	// V_MED3_F32_vi
    UINT64_C(3522887680),	// V_MED3_I16_vi
    UINT64_C(3534749696),	// V_MED3_I32_si
    UINT64_C(3520528384),	// V_MED3_I32_vi
    UINT64_C(3522953216),	// V_MED3_U16_vi
    UINT64_C(3534880768),	// V_MED3_U32_si
    UINT64_C(3520593920),	// V_MED3_U32_vi
    UINT64_C(3522428928),	// V_MIN3_F16_vi
    UINT64_C(3533832192),	// V_MIN3_F32_si
    UINT64_C(3520069632),	// V_MIN3_F32_vi
    UINT64_C(3522494464),	// V_MIN3_I16_vi
    UINT64_C(3533963264),	// V_MIN3_I32_si
    UINT64_C(3520135168),	// V_MIN3_I32_vi
    UINT64_C(3522560000),	// V_MIN3_U16_vi
    UINT64_C(3534094336),	// V_MIN3_U32_si
    UINT64_C(3520200704),	// V_MIN3_U32_vi
    UINT64_C(1543504122),	// V_MIN_F16_dpp_vi
    UINT64_C(1543503872),	// V_MIN_F16_e32_vi
    UINT64_C(3509452800),	// V_MIN_F16_e64_vi
    UINT64_C(1543504121),	// V_MIN_F16_sdwa_gfx9
    UINT64_C(1543504121),	// V_MIN_F16_sdwa_vi
    UINT64_C(335544570),	// V_MIN_F32_dpp_vi
    UINT64_C(503316480),	// V_MIN_F32_e32_si
    UINT64_C(335544320),	// V_MIN_F32_e32_vi
    UINT64_C(3525181440),	// V_MIN_F32_e64_si
    UINT64_C(3507093504),	// V_MIN_F32_e64_vi
    UINT64_C(335544569),	// V_MIN_F32_sdwa_gfx9
    UINT64_C(335544569),	// V_MIN_F32_sdwa_vi
    UINT64_C(3536584704),	// V_MIN_F64_si
    UINT64_C(3531735040),	// V_MIN_F64_vi
    UINT64_C(1677721850),	// V_MIN_I16_dpp_vi
    UINT64_C(1677721600),	// V_MIN_I16_e32_vi
    UINT64_C(3509714944),	// V_MIN_I16_e64_vi
    UINT64_C(1677721849),	// V_MIN_I16_sdwa_gfx9
    UINT64_C(1677721849),	// V_MIN_I16_sdwa_vi
    UINT64_C(402653434),	// V_MIN_I32_dpp_vi
    UINT64_C(570425344),	// V_MIN_I32_e32_si
    UINT64_C(402653184),	// V_MIN_I32_e32_vi
    UINT64_C(3525443584),	// V_MIN_I32_e64_si
    UINT64_C(3507224576),	// V_MIN_I32_e64_vi
    UINT64_C(402653433),	// V_MIN_I32_sdwa_gfx9
    UINT64_C(402653433),	// V_MIN_I32_sdwa_vi
    UINT64_C(436207616),	// V_MIN_LEGACY_F32_e32_si
    UINT64_C(3524919296),	// V_MIN_LEGACY_F32_e64_si
    UINT64_C(1644167418),	// V_MIN_U16_dpp_vi
    UINT64_C(1644167168),	// V_MIN_U16_e32_vi
    UINT64_C(3509649408),	// V_MIN_U16_e64_vi
    UINT64_C(1644167417),	// V_MIN_U16_sdwa_gfx9
    UINT64_C(1644167417),	// V_MIN_U16_sdwa_vi
    UINT64_C(469762298),	// V_MIN_U32_dpp_vi
    UINT64_C(637534208),	// V_MIN_U32_e32_si
    UINT64_C(469762048),	// V_MIN_U32_e32_vi
    UINT64_C(3525705728),	// V_MIN_U32_e64_si
    UINT64_C(3507355648),	// V_MIN_U32_e64_vi
    UINT64_C(469762297),	// V_MIN_U32_sdwa_gfx9
    UINT64_C(469762297),	// V_MIN_U32_sdwa_vi
    UINT64_C(2113963008),	// V_MOVRELD_B32_e32_si
    UINT64_C(2113956864),	// V_MOVRELD_B32_e32_vi
    UINT64_C(3548643328),	// V_MOVRELD_B32_e64_si
    UINT64_C(3514171392),	// V_MOVRELD_B32_e64_vi
    UINT64_C(2113964032),	// V_MOVRELSD_B32_e32_si
    UINT64_C(2113957888),	// V_MOVRELSD_B32_e32_vi
    UINT64_C(3548905472),	// V_MOVRELSD_B32_e64_si
    UINT64_C(3514302464),	// V_MOVRELSD_B32_e64_vi
    UINT64_C(2113963520),	// V_MOVRELS_B32_e32_si
    UINT64_C(2113957376),	// V_MOVRELS_B32_e32_vi
    UINT64_C(3548774400),	// V_MOVRELS_B32_e64_si
    UINT64_C(3514236928),	// V_MOVRELS_B32_e64_vi
    UINT64_C(2113929978),	// V_MOV_B32_dpp_vi
    UINT64_C(2113929728),	// V_MOV_B32_e32_si
    UINT64_C(2113929728),	// V_MOV_B32_e32_vi
    UINT64_C(3540123648),	// V_MOV_B32_e64_si
    UINT64_C(3510697984),	// V_MOV_B32_e64_vi
    UINT64_C(2113929977),	// V_MOV_B32_sdwa_gfx9
    UINT64_C(2113929977),	// V_MOV_B32_sdwa_vi
    UINT64_C(2113934074),	// V_MOV_FED_B32_dpp_vi
    UINT64_C(2113933824),	// V_MOV_FED_B32_e32_si
    UINT64_C(2113933824),	// V_MOV_FED_B32_e32_vi
    UINT64_C(3541172224),	// V_MOV_FED_B32_e64_si
    UINT64_C(3511222272),	// V_MOV_FED_B32_e64_vi
    UINT64_C(2113934073),	// V_MOV_FED_B32_sdwa_gfx9
    UINT64_C(2113934073),	// V_MOV_FED_B32_sdwa_vi
    UINT64_C(3538288640),	// V_MQSAD_PK_U16_U8_si
    UINT64_C(3521511424),	// V_MQSAD_PK_U16_U8_vi
    UINT64_C(3538550784),	// V_MQSAD_U32_U8_ci
    UINT64_C(3521576960),	// V_MQSAD_U32_U8_vi
    UINT64_C(3538026496),	// V_MSAD_U8_si
    UINT64_C(3521380352),	// V_MSAD_U8_vi
    UINT64_C(3533701120),	// V_MULLIT_F32_si
    UINT64_C(1140850938),	// V_MUL_F16_dpp_vi
    UINT64_C(1140850688),	// V_MUL_F16_e32_vi
    UINT64_C(3508666368),	// V_MUL_F16_e64_vi
    UINT64_C(1140850937),	// V_MUL_F16_sdwa_gfx9
    UINT64_C(1140850937),	// V_MUL_F16_sdwa_vi
    UINT64_C(167772410),	// V_MUL_F32_dpp_vi
    UINT64_C(268435456),	// V_MUL_F32_e32_si
    UINT64_C(167772160),	// V_MUL_F32_e32_vi
    UINT64_C(3524263936),	// V_MUL_F32_e64_si
    UINT64_C(3506765824),	// V_MUL_F32_e64_vi
    UINT64_C(167772409),	// V_MUL_F32_sdwa_gfx9
    UINT64_C(167772409),	// V_MUL_F32_sdwa_vi
    UINT64_C(3536453632),	// V_MUL_F64_si
    UINT64_C(3531669504),	// V_MUL_F64_vi
    UINT64_C(234881274),	// V_MUL_HI_I32_I24_dpp_vi
    UINT64_C(335544320),	// V_MUL_HI_I32_I24_e32_si
    UINT64_C(234881024),	// V_MUL_HI_I32_I24_e32_vi
    UINT64_C(3524526080),	// V_MUL_HI_I32_I24_e64_si
    UINT64_C(3506896896),	// V_MUL_HI_I32_I24_e64_vi
    UINT64_C(234881273),	// V_MUL_HI_I32_I24_sdwa_gfx9
    UINT64_C(234881273),	// V_MUL_HI_I32_I24_sdwa_vi
    UINT64_C(3537371136),	// V_MUL_HI_I32_si
    UINT64_C(3532062720),	// V_MUL_HI_I32_vi
    UINT64_C(301990138),	// V_MUL_HI_U32_U24_dpp_vi
    UINT64_C(402653184),	// V_MUL_HI_U32_U24_e32_si
    UINT64_C(301989888),	// V_MUL_HI_U32_U24_e32_vi
    UINT64_C(3524788224),	// V_MUL_HI_U32_U24_e64_si
    UINT64_C(3507027968),	// V_MUL_HI_U32_U24_e64_vi
    UINT64_C(301990137),	// V_MUL_HI_U32_U24_sdwa_gfx9
    UINT64_C(301990137),	// V_MUL_HI_U32_U24_sdwa_vi
    UINT64_C(3537108992),	// V_MUL_HI_U32_si
    UINT64_C(3531997184),	// V_MUL_HI_U32_vi
    UINT64_C(201326842),	// V_MUL_I32_I24_dpp_vi
    UINT64_C(301989888),	// V_MUL_I32_I24_e32_si
    UINT64_C(201326592),	// V_MUL_I32_I24_e32_vi
    UINT64_C(3524395008),	// V_MUL_I32_I24_e64_si
    UINT64_C(3506831360),	// V_MUL_I32_I24_e64_vi
    UINT64_C(201326841),	// V_MUL_I32_I24_sdwa_gfx9
    UINT64_C(201326841),	// V_MUL_I32_I24_sdwa_vi
    UINT64_C(134217978),	// V_MUL_LEGACY_F32_dpp_vi
    UINT64_C(234881024),	// V_MUL_LEGACY_F32_e32_si
    UINT64_C(134217728),	// V_MUL_LEGACY_F32_e32_vi
    UINT64_C(3524132864),	// V_MUL_LEGACY_F32_e64_si
    UINT64_C(3506700288),	// V_MUL_LEGACY_F32_e64_vi
    UINT64_C(134217977),	// V_MUL_LEGACY_F32_sdwa_gfx9
    UINT64_C(134217977),	// V_MUL_LEGACY_F32_sdwa_vi
    UINT64_C(3537240064),	// V_MUL_LO_I32_si
    UINT64_C(3531931648),	// V_MUL_LO_I32_vi
    UINT64_C(1375731962),	// V_MUL_LO_U16_dpp_vi
    UINT64_C(1375731712),	// V_MUL_LO_U16_e32_vi
    UINT64_C(3509125120),	// V_MUL_LO_U16_e64_vi
    UINT64_C(1375731961),	// V_MUL_LO_U16_sdwa_gfx9
    UINT64_C(1375731961),	// V_MUL_LO_U16_sdwa_vi
    UINT64_C(3536977920),	// V_MUL_LO_U32_si
    UINT64_C(3531931648),	// V_MUL_LO_U32_vi
    UINT64_C(268435706),	// V_MUL_U32_U24_dpp_vi
    UINT64_C(369098752),	// V_MUL_U32_U24_e32_si
    UINT64_C(268435456),	// V_MUL_U32_U24_e32_vi
    UINT64_C(3524657152),	// V_MUL_U32_U24_e64_si
    UINT64_C(3506962432),	// V_MUL_U32_U24_e64_vi
    UINT64_C(268435705),	// V_MUL_U32_U24_sdwa_gfx9
    UINT64_C(268435705),	// V_MUL_U32_U24_sdwa_vi
    UINT64_C(2113929216),	// V_NOP_e32_si
    UINT64_C(2113929216),	// V_NOP_e32_vi
    UINT64_C(3539992576),	// V_NOP_e64_si
    UINT64_C(3510632448),	// V_NOP_e64_vi
    UINT64_C(2113929465),	// V_NOP_sdwa_gfx9
    UINT64_C(2113929465),	// V_NOP_sdwa_vi
    UINT64_C(2113951482),	// V_NOT_B32_dpp_vi
    UINT64_C(2113957376),	// V_NOT_B32_e32_si
    UINT64_C(2113951232),	// V_NOT_B32_e32_vi
    UINT64_C(3547201536),	// V_NOT_B32_e64_si
    UINT64_C(3513450496),	// V_NOT_B32_e64_vi
    UINT64_C(2113951481),	// V_NOT_B32_sdwa_gfx9
    UINT64_C(2113951481),	// V_NOT_B32_sdwa_vi
    UINT64_C(3523346432),	// V_OR3_B32_vi
    UINT64_C(671088890),	// V_OR_B32_dpp_vi
    UINT64_C(939524096),	// V_OR_B32_e32_si
    UINT64_C(671088640),	// V_OR_B32_e32_vi
    UINT64_C(3526885376),	// V_OR_B32_e64_si
    UINT64_C(3507748864),	// V_OR_B32_e64_vi
    UINT64_C(671088889),	// V_OR_B32_sdwa_gfx9
    UINT64_C(671088889),	// V_OR_B32_sdwa_vi
    UINT64_C(3533701120),	// V_PACK_B32_F16_vi
    UINT64_C(3521970176),	// V_PERM_B32_vi
    UINT64_C(3549364224),	// V_PK_ADD_F16_vi
    UINT64_C(3548512256),	// V_PK_ADD_I16_vi
    UINT64_C(3549036544),	// V_PK_ADD_U16_vi
    UINT64_C(3548774400),	// V_PK_ASHRREV_I16_vi
    UINT64_C(3549298688),	// V_PK_FMA_F16_vi
    UINT64_C(3548643328),	// V_PK_LSHLREV_B16_vi
    UINT64_C(3548708864),	// V_PK_LSHRREV_B16_vi
    UINT64_C(3548381184),	// V_PK_MAD_I16_vi
    UINT64_C(3548971008),	// V_PK_MAD_U16_vi
    UINT64_C(3549560832),	// V_PK_MAX_F16_vi
    UINT64_C(3548839936),	// V_PK_MAX_I16_vi
    UINT64_C(3549167616),	// V_PK_MAX_U16_vi
    UINT64_C(3549495296),	// V_PK_MIN_F16_vi
    UINT64_C(3548905472),	// V_PK_MIN_I16_vi
    UINT64_C(3549233152),	// V_PK_MIN_U16_vi
    UINT64_C(3549429760),	// V_PK_MUL_F16_vi
    UINT64_C(3548446720),	// V_PK_MUL_LO_U16_vi
    UINT64_C(3548577792),	// V_PK_SUB_I16_vi
    UINT64_C(3549102080),	// V_PK_SUB_U16_vi
    UINT64_C(3538157568),	// V_QSAD_PK_U16_U8_ci
    UINT64_C(3521445888),	// V_QSAD_PK_U16_U8_vi
    UINT64_C(2113949696),	// V_RCP_CLAMP_F32_e32_si
    UINT64_C(3545235456),	// V_RCP_CLAMP_F32_e64_si
    UINT64_C(2113953792),	// V_RCP_CLAMP_F64_e32_si
    UINT64_C(3546284032),	// V_RCP_CLAMP_F64_e64_si
    UINT64_C(2113960698),	// V_RCP_F16_dpp_vi
    UINT64_C(2113960448),	// V_RCP_F16_e32_vi
    UINT64_C(3514630144),	// V_RCP_F16_e64_vi
    UINT64_C(2113960697),	// V_RCP_F16_sdwa_gfx9
    UINT64_C(2113960697),	// V_RCP_F16_sdwa_vi
    UINT64_C(2113946874),	// V_RCP_F32_dpp_vi
    UINT64_C(2113950720),	// V_RCP_F32_e32_si
    UINT64_C(2113946624),	// V_RCP_F32_e32_vi
    UINT64_C(3545497600),	// V_RCP_F32_e64_si
    UINT64_C(3512860672),	// V_RCP_F32_e64_vi
    UINT64_C(2113946873),	// V_RCP_F32_sdwa_gfx9
    UINT64_C(2113946873),	// V_RCP_F32_sdwa_vi
    UINT64_C(2113953280),	// V_RCP_F64_e32_si
    UINT64_C(2113948160),	// V_RCP_F64_e32_vi
    UINT64_C(3546152960),	// V_RCP_F64_e64_si
    UINT64_C(3513057280),	// V_RCP_F64_e64_vi
    UINT64_C(2113948409),	// V_RCP_F64_sdwa_gfx9
    UINT64_C(2113948409),	// V_RCP_F64_sdwa_vi
    UINT64_C(2113947386),	// V_RCP_IFLAG_F32_dpp_vi
    UINT64_C(2113951232),	// V_RCP_IFLAG_F32_e32_si
    UINT64_C(2113947136),	// V_RCP_IFLAG_F32_e32_vi
    UINT64_C(3545628672),	// V_RCP_IFLAG_F32_e64_si
    UINT64_C(3512926208),	// V_RCP_IFLAG_F32_e64_vi
    UINT64_C(2113947385),	// V_RCP_IFLAG_F32_sdwa_gfx9
    UINT64_C(2113947385),	// V_RCP_IFLAG_F32_sdwa_vi
    UINT64_C(2113950208),	// V_RCP_LEGACY_F32_e32_si
    UINT64_C(3545366528),	// V_RCP_LEGACY_F32_e64_si
    UINT64_C(2113930240),	// V_READFIRSTLANE_B32
    UINT64_C(33554432),	// V_READLANE_B32_si
    UINT64_C(3532193792),	// V_READLANE_B32_vi
    UINT64_C(2113965818),	// V_RNDNE_F16_dpp_vi
    UINT64_C(2113965568),	// V_RNDNE_F16_e32_vi
    UINT64_C(3515285504),	// V_RNDNE_F16_e64_vi
    UINT64_C(2113965817),	// V_RNDNE_F16_sdwa_gfx9
    UINT64_C(2113965817),	// V_RNDNE_F16_sdwa_vi
    UINT64_C(2113944826),	// V_RNDNE_F32_dpp_vi
    UINT64_C(2113947136),	// V_RNDNE_F32_e32_si
    UINT64_C(2113944576),	// V_RNDNE_F32_e32_vi
    UINT64_C(3544580096),	// V_RNDNE_F32_e64_si
    UINT64_C(3512598528),	// V_RNDNE_F32_e64_vi
    UINT64_C(2113944825),	// V_RNDNE_F32_sdwa_gfx9
    UINT64_C(2113944825),	// V_RNDNE_F32_sdwa_vi
    UINT64_C(2113942016),	// V_RNDNE_F64_e32_ci
    UINT64_C(2113942016),	// V_RNDNE_F64_e32_vi
    UINT64_C(3543269376),	// V_RNDNE_F64_e64_ci
    UINT64_C(3512270848),	// V_RNDNE_F64_e64_vi
    UINT64_C(2113942265),	// V_RNDNE_F64_sdwa_gfx9
    UINT64_C(2113942265),	// V_RNDNE_F64_sdwa_vi
    UINT64_C(2113951744),	// V_RSQ_CLAMP_F32_e32_si
    UINT64_C(3545759744),	// V_RSQ_CLAMP_F32_e64_si
    UINT64_C(2113954816),	// V_RSQ_CLAMP_F64_e32_si
    UINT64_C(3546546176),	// V_RSQ_CLAMP_F64_e64_si
    UINT64_C(2113961722),	// V_RSQ_F16_dpp_vi
    UINT64_C(2113961472),	// V_RSQ_F16_e32_vi
    UINT64_C(3514761216),	// V_RSQ_F16_e64_vi
    UINT64_C(2113961721),	// V_RSQ_F16_sdwa_gfx9
    UINT64_C(2113961721),	// V_RSQ_F16_sdwa_vi
    UINT64_C(2113947898),	// V_RSQ_F32_dpp_vi
    UINT64_C(2113952768),	// V_RSQ_F32_e32_si
    UINT64_C(2113947648),	// V_RSQ_F32_e32_vi
    UINT64_C(3546021888),	// V_RSQ_F32_e64_si
    UINT64_C(3512991744),	// V_RSQ_F32_e64_vi
    UINT64_C(2113947897),	// V_RSQ_F32_sdwa_gfx9
    UINT64_C(2113947897),	// V_RSQ_F32_sdwa_vi
    UINT64_C(2113954304),	// V_RSQ_F64_e32_si
    UINT64_C(2113948672),	// V_RSQ_F64_e32_vi
    UINT64_C(3546415104),	// V_RSQ_F64_e64_si
    UINT64_C(3513122816),	// V_RSQ_F64_e64_vi
    UINT64_C(2113948921),	// V_RSQ_F64_sdwa_gfx9
    UINT64_C(2113948921),	// V_RSQ_F64_sdwa_vi
    UINT64_C(2113952256),	// V_RSQ_LEGACY_F32_e32_si
    UINT64_C(3545890816),	// V_RSQ_LEGACY_F32_e64_si
    UINT64_C(3535142912),	// V_SAD_HI_U8_si
    UINT64_C(3520724992),	// V_SAD_HI_U8_vi
    UINT64_C(3535273984),	// V_SAD_U16_si
    UINT64_C(3520790528),	// V_SAD_U16_vi
    UINT64_C(3535405056),	// V_SAD_U32_si
    UINT64_C(3520856064),	// V_SAD_U32_vi
    UINT64_C(3535011840),	// V_SAD_U8_si
    UINT64_C(3520659456),	// V_SAD_U8_vi
    UINT64_C(2113969914),	// V_SAT_PK_U8_I16_dpp_vi
    UINT64_C(2113969664),	// V_SAT_PK_U8_I16_e32_vi
    UINT64_C(3515809792),	// V_SAT_PK_U8_I16_e64_vi
    UINT64_C(2113969913),	// V_SAT_PK_U8_I16_sdwa_gfx9
    UINT64_C(2113969913),	// V_SAT_PK_U8_I16_sdwa_vi
    UINT64_C(2113957626),	// V_SCREEN_PARTITION_4SE_B32_dpp_gfx9
    UINT64_C(2113957376),	// V_SCREEN_PARTITION_4SE_B32_e32_vi
    UINT64_C(3514236928),	// V_SCREEN_PARTITION_4SE_B32_e64_vi
    UINT64_C(2113957625),	// V_SCREEN_PARTITION_4SE_B32_sdwa_gfx9
    UINT64_C(2113966842),	// V_SIN_F16_dpp_vi
    UINT64_C(2113966592),	// V_SIN_F16_e32_vi
    UINT64_C(3515416576),	// V_SIN_F16_e64_vi
    UINT64_C(2113966841),	// V_SIN_F16_sdwa_gfx9
    UINT64_C(2113966841),	// V_SIN_F16_sdwa_vi
    UINT64_C(2113950458),	// V_SIN_F32_dpp_vi
    UINT64_C(2113956352),	// V_SIN_F32_e32_si
    UINT64_C(2113950208),	// V_SIN_F32_e32_vi
    UINT64_C(3546939392),	// V_SIN_F32_e64_si
    UINT64_C(3513319424),	// V_SIN_F32_e64_vi
    UINT64_C(2113950457),	// V_SIN_F32_sdwa_gfx9
    UINT64_C(2113950457),	// V_SIN_F32_sdwa_vi
    UINT64_C(2113961210),	// V_SQRT_F16_dpp_vi
    UINT64_C(2113960960),	// V_SQRT_F16_e32_vi
    UINT64_C(3514695680),	// V_SQRT_F16_e64_vi
    UINT64_C(2113961209),	// V_SQRT_F16_sdwa_gfx9
    UINT64_C(2113961209),	// V_SQRT_F16_sdwa_vi
    UINT64_C(2113949434),	// V_SQRT_F32_dpp_vi
    UINT64_C(2113955328),	// V_SQRT_F32_e32_si
    UINT64_C(2113949184),	// V_SQRT_F32_e32_vi
    UINT64_C(3546677248),	// V_SQRT_F32_e64_si
    UINT64_C(3513188352),	// V_SQRT_F32_e64_vi
    UINT64_C(2113949433),	// V_SQRT_F32_sdwa_gfx9
    UINT64_C(2113949433),	// V_SQRT_F32_sdwa_vi
    UINT64_C(2113955840),	// V_SQRT_F64_e32_si
    UINT64_C(2113949696),	// V_SQRT_F64_e32_vi
    UINT64_C(3546808320),	// V_SQRT_F64_e64_si
    UINT64_C(3513253888),	// V_SQRT_F64_e64_vi
    UINT64_C(2113949945),	// V_SQRT_F64_sdwa_gfx9
    UINT64_C(2113949945),	// V_SQRT_F64_sdwa_vi
    UINT64_C(1006633210),	// V_SUBBREV_CO_U32_dpp_gfx9
    UINT64_C(1006632960),	// V_SUBBREV_CO_U32_e32_gfx9
    UINT64_C(3508404224),	// V_SUBBREV_CO_U32_e64_gfx9
    UINT64_C(1006633209),	// V_SUBBREV_CO_U32_sdwa_gfx9
    UINT64_C(1006633210),	// V_SUBBREV_U32_dpp_vi
    UINT64_C(1409286144),	// V_SUBBREV_U32_e32_si
    UINT64_C(1006632960),	// V_SUBBREV_U32_e32_vi
    UINT64_C(3528720384),	// V_SUBBREV_U32_e64_si
    UINT64_C(3508404224),	// V_SUBBREV_U32_e64_vi
    UINT64_C(1006633209),	// V_SUBBREV_U32_sdwa_vi
    UINT64_C(973078778),	// V_SUBB_CO_U32_dpp_gfx9
    UINT64_C(973078528),	// V_SUBB_CO_U32_e32_gfx9
    UINT64_C(3508338688),	// V_SUBB_CO_U32_e64_gfx9
    UINT64_C(973078777),	// V_SUBB_CO_U32_sdwa_gfx9
    UINT64_C(973078778),	// V_SUBB_U32_dpp_vi
    UINT64_C(1375731712),	// V_SUBB_U32_e32_si
    UINT64_C(973078528),	// V_SUBB_U32_e32_vi
    UINT64_C(3528589312),	// V_SUBB_U32_e64_si
    UINT64_C(3508338688),	// V_SUBB_U32_e64_vi
    UINT64_C(973078777),	// V_SUBB_U32_sdwa_vi
    UINT64_C(905969914),	// V_SUBREV_CO_U32_dpp_gfx9
    UINT64_C(905969664),	// V_SUBREV_CO_U32_e32_gfx9
    UINT64_C(3508207616),	// V_SUBREV_CO_U32_e64_gfx9
    UINT64_C(905969913),	// V_SUBREV_CO_U32_sdwa_gfx9
    UINT64_C(1107296506),	// V_SUBREV_F16_dpp_vi
    UINT64_C(1107296256),	// V_SUBREV_F16_e32_vi
    UINT64_C(3508600832),	// V_SUBREV_F16_e64_vi
    UINT64_C(1107296505),	// V_SUBREV_F16_sdwa_gfx9
    UINT64_C(1107296505),	// V_SUBREV_F16_sdwa_vi
    UINT64_C(100663546),	// V_SUBREV_F32_dpp_vi
    UINT64_C(167772160),	// V_SUBREV_F32_e32_si
    UINT64_C(100663296),	// V_SUBREV_F32_e32_vi
    UINT64_C(3523870720),	// V_SUBREV_F32_e64_si
    UINT64_C(3506634752),	// V_SUBREV_F32_e64_vi
    UINT64_C(100663545),	// V_SUBREV_F32_sdwa_gfx9
    UINT64_C(100663545),	// V_SUBREV_F32_sdwa_vi
    UINT64_C(1308622848),	// V_SUBREV_I32_e32_si
    UINT64_C(3528327168),	// V_SUBREV_I32_e64_si
    UINT64_C(1342177530),	// V_SUBREV_U16_dpp_vi
    UINT64_C(1342177280),	// V_SUBREV_U16_e32_vi
    UINT64_C(3509059584),	// V_SUBREV_U16_e64_vi
    UINT64_C(1342177529),	// V_SUBREV_U16_sdwa_gfx9
    UINT64_C(1342177529),	// V_SUBREV_U16_sdwa_vi
    UINT64_C(1811939578),	// V_SUBREV_U32_dpp_gfx9
    UINT64_C(905969914),	// V_SUBREV_U32_dpp_vi
    UINT64_C(1811939328),	// V_SUBREV_U32_e32_gfx9
    UINT64_C(905969664),	// V_SUBREV_U32_e32_vi
    UINT64_C(3509977088),	// V_SUBREV_U32_e64_gfx9
    UINT64_C(3508207616),	// V_SUBREV_U32_e64_vi
    UINT64_C(1811939577),	// V_SUBREV_U32_sdwa_gfx9
    UINT64_C(905969913),	// V_SUBREV_U32_sdwa_vi
    UINT64_C(872415482),	// V_SUB_CO_U32_dpp_gfx9
    UINT64_C(872415232),	// V_SUB_CO_U32_e32_gfx9
    UINT64_C(3508142080),	// V_SUB_CO_U32_e64_gfx9
    UINT64_C(872415481),	// V_SUB_CO_U32_sdwa_gfx9
    UINT64_C(1073742074),	// V_SUB_F16_dpp_vi
    UINT64_C(1073741824),	// V_SUB_F16_e32_vi
    UINT64_C(3508535296),	// V_SUB_F16_e64_vi
    UINT64_C(1073742073),	// V_SUB_F16_sdwa_gfx9
    UINT64_C(1073742073),	// V_SUB_F16_sdwa_vi
    UINT64_C(67109114),	// V_SUB_F32_dpp_vi
    UINT64_C(134217728),	// V_SUB_F32_e32_si
    UINT64_C(67108864),	// V_SUB_F32_e32_vi
    UINT64_C(3523739648),	// V_SUB_F32_e64_si
    UINT64_C(3506569216),	// V_SUB_F32_e64_vi
    UINT64_C(67109113),	// V_SUB_F32_sdwa_gfx9
    UINT64_C(67109113),	// V_SUB_F32_sdwa_vi
    UINT64_C(3533635584),	// V_SUB_I16_vi
    UINT64_C(1275068416),	// V_SUB_I32_e32_si
    UINT64_C(3528196096),	// V_SUB_I32_e64_si
    UINT64_C(3533504512),	// V_SUB_I32_gfx9_gfx9
    UINT64_C(1308623098),	// V_SUB_U16_dpp_vi
    UINT64_C(1308622848),	// V_SUB_U16_e32_vi
    UINT64_C(3508994048),	// V_SUB_U16_e64_vi
    UINT64_C(1308623097),	// V_SUB_U16_sdwa_gfx9
    UINT64_C(1308623097),	// V_SUB_U16_sdwa_vi
    UINT64_C(1778385146),	// V_SUB_U32_dpp_gfx9
    UINT64_C(872415482),	// V_SUB_U32_dpp_vi
    UINT64_C(1778384896),	// V_SUB_U32_e32_gfx9
    UINT64_C(872415232),	// V_SUB_U32_e32_vi
    UINT64_C(3509911552),	// V_SUB_U32_e64_gfx9
    UINT64_C(3508142080),	// V_SUB_U32_e64_vi
    UINT64_C(1778385145),	// V_SUB_U32_sdwa_gfx9
    UINT64_C(872415481),	// V_SUB_U32_sdwa_vi
    UINT64_C(2113970688),	// V_SWAP_B32_vi
    UINT64_C(3538419712),	// V_TRIG_PREOP_F64_si
    UINT64_C(3532783616),	// V_TRIG_PREOP_F64_vi
    UINT64_C(2113965306),	// V_TRUNC_F16_dpp_vi
    UINT64_C(2113965056),	// V_TRUNC_F16_e32_vi
    UINT64_C(3515219968),	// V_TRUNC_F16_e64_vi
    UINT64_C(2113965305),	// V_TRUNC_F16_sdwa_gfx9
    UINT64_C(2113965305),	// V_TRUNC_F16_sdwa_vi
    UINT64_C(2113943802),	// V_TRUNC_F32_dpp_vi
    UINT64_C(2113946112),	// V_TRUNC_F32_e32_si
    UINT64_C(2113943552),	// V_TRUNC_F32_e32_vi
    UINT64_C(3544317952),	// V_TRUNC_F32_e64_si
    UINT64_C(3512467456),	// V_TRUNC_F32_e64_vi
    UINT64_C(2113943801),	// V_TRUNC_F32_sdwa_gfx9
    UINT64_C(2113943801),	// V_TRUNC_F32_sdwa_vi
    UINT64_C(2113940992),	// V_TRUNC_F64_e32_ci
    UINT64_C(2113940992),	// V_TRUNC_F64_e32_vi
    UINT64_C(3543007232),	// V_TRUNC_F64_e64_ci
    UINT64_C(3512139776),	// V_TRUNC_F64_e64_vi
    UINT64_C(2113941241),	// V_TRUNC_F64_sdwa_gfx9
    UINT64_C(2113941241),	// V_TRUNC_F64_sdwa_vi
    UINT64_C(67108864),	// V_WRITELANE_B32_si
    UINT64_C(3532259328),	// V_WRITELANE_B32_vi
    UINT64_C(3522363392),	// V_XAD_U32_vi
    UINT64_C(2046820602),	// V_XNOR_B32_dpp_vi
    UINT64_C(2046820352),	// V_XNOR_B32_e32_vi
    UINT64_C(3510435840),	// V_XNOR_B32_e64_vi
    UINT64_C(2046820601),	// V_XNOR_B32_sdwa_gfx9
    UINT64_C(2046820601),	// V_XNOR_B32_sdwa_vi
    UINT64_C(704643322),	// V_XOR_B32_dpp_vi
    UINT64_C(973078528),	// V_XOR_B32_e32_si
    UINT64_C(704643072),	// V_XOR_B32_e32_vi
    UINT64_C(3527016448),	// V_XOR_B32_e64_si
    UINT64_C(3507814400),	// V_XOR_B32_e64_vi
    UINT64_C(704643321),	// V_XOR_B32_sdwa_gfx9
    UINT64_C(704643321),	// V_XOR_B32_sdwa_vi
    UINT64_C(0)
  };
  const unsigned opcode = MI.getOpcode();
  uint64_t Value = InstBits[opcode];
  uint64_t op = 0;
  (void)op;  // suppress warning
  switch (opcode) {
    case AMDGPU::BUFFER_WBINVL1_SC_si:
    case AMDGPU::BUFFER_WBINVL1_VOL_ci:
    case AMDGPU::BUFFER_WBINVL1_VOL_vi:
    case AMDGPU::BUFFER_WBINVL1_si:
    case AMDGPU::BUFFER_WBINVL1_vi:
    case AMDGPU::DS_NOP_si:
    case AMDGPU::DS_NOP_vi:
    case AMDGPU::S_BARRIER:
    case AMDGPU::S_DCACHE_INV_VOL_ci:
    case AMDGPU::S_DCACHE_INV_VOL_vi:
    case AMDGPU::S_DCACHE_INV_si:
    case AMDGPU::S_DCACHE_INV_vi:
    case AMDGPU::S_DCACHE_WB_VOL_vi:
    case AMDGPU::S_DCACHE_WB_vi:
    case AMDGPU::S_ENDPGM:
    case AMDGPU::S_ENDPGM_ORDERED_PS_DONE:
    case AMDGPU::S_ENDPGM_SAVED:
    case AMDGPU::S_ICACHE_INV:
    case AMDGPU::S_SET_GPR_IDX_OFF:
    case AMDGPU::S_TTRACEDATA:
    case AMDGPU::S_WAKEUP:
    case AMDGPU::V_CLREXCP_e32_si:
    case AMDGPU::V_CLREXCP_e32_vi:
    case AMDGPU::V_CLREXCP_e64_si:
    case AMDGPU::V_CLREXCP_e64_vi:
    case AMDGPU::V_CLREXCP_sdwa_gfx9:
    case AMDGPU::V_CLREXCP_sdwa_vi:
    case AMDGPU::V_NOP_e32_si:
    case AMDGPU::V_NOP_e32_vi:
    case AMDGPU::V_NOP_e64_si:
    case AMDGPU::V_NOP_e64_vi:
    case AMDGPU::V_NOP_sdwa_gfx9:
    case AMDGPU::V_NOP_sdwa_vi: {
      break;
    }
    case AMDGPU::DS_GWS_BARRIER_si:
    case AMDGPU::DS_GWS_BARRIER_vi:
    case AMDGPU::DS_GWS_INIT_si:
    case AMDGPU::DS_GWS_INIT_vi:
    case AMDGPU::DS_GWS_SEMA_BR_si:
    case AMDGPU::DS_GWS_SEMA_BR_vi: {
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::EXP_DONE_si:
    case AMDGPU::EXP_DONE_vi:
    case AMDGPU::EXP_si:
    case AMDGPU::EXP_vi: {
      // op: en
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= op & UINT64_C(15);
      // op: tgt
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(63)) << 4;
      // op: compr
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 10;
      // op: vm
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 12;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 48;
      // op: src3
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::DS_ADD_SRC2_F32_vi:
    case AMDGPU::DS_ADD_SRC2_U32_vi:
    case AMDGPU::DS_ADD_SRC2_U64_vi:
    case AMDGPU::DS_AND_SRC2_B32_vi:
    case AMDGPU::DS_AND_SRC2_B64_vi:
    case AMDGPU::DS_DEC_SRC2_U32_vi:
    case AMDGPU::DS_DEC_SRC2_U64_vi:
    case AMDGPU::DS_INC_SRC2_U32_vi:
    case AMDGPU::DS_INC_SRC2_U64_vi:
    case AMDGPU::DS_MAX_SRC2_F32_vi:
    case AMDGPU::DS_MAX_SRC2_F64_vi:
    case AMDGPU::DS_MAX_SRC2_I32_vi:
    case AMDGPU::DS_MAX_SRC2_I64_vi:
    case AMDGPU::DS_MAX_SRC2_U32_vi:
    case AMDGPU::DS_MAX_SRC2_U64_vi:
    case AMDGPU::DS_MIN_SRC2_F32_vi:
    case AMDGPU::DS_MIN_SRC2_F64_vi:
    case AMDGPU::DS_MIN_SRC2_I32_vi:
    case AMDGPU::DS_MIN_SRC2_I64_vi:
    case AMDGPU::DS_MIN_SRC2_U32_vi:
    case AMDGPU::DS_MIN_SRC2_U64_vi:
    case AMDGPU::DS_OR_SRC2_B32_vi:
    case AMDGPU::DS_OR_SRC2_B64_vi:
    case AMDGPU::DS_RSUB_SRC2_U32_vi:
    case AMDGPU::DS_RSUB_SRC2_U64_vi:
    case AMDGPU::DS_SUB_SRC2_U32_vi:
    case AMDGPU::DS_SUB_SRC2_U64_vi:
    case AMDGPU::DS_WRITE_SRC2_B32_vi:
    case AMDGPU::DS_WRITE_SRC2_B64_vi:
    case AMDGPU::DS_XOR_SRC2_B32_vi:
    case AMDGPU::DS_XOR_SRC2_B64_vi: {
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_ADD_SRC2_U32_si:
    case AMDGPU::DS_ADD_SRC2_U64_si:
    case AMDGPU::DS_AND_SRC2_B32_si:
    case AMDGPU::DS_AND_SRC2_B64_si:
    case AMDGPU::DS_DEC_SRC2_U32_si:
    case AMDGPU::DS_DEC_SRC2_U64_si:
    case AMDGPU::DS_INC_SRC2_U32_si:
    case AMDGPU::DS_INC_SRC2_U64_si:
    case AMDGPU::DS_MAX_SRC2_F32_si:
    case AMDGPU::DS_MAX_SRC2_F64_si:
    case AMDGPU::DS_MAX_SRC2_I32_si:
    case AMDGPU::DS_MAX_SRC2_I64_si:
    case AMDGPU::DS_MAX_SRC2_U32_si:
    case AMDGPU::DS_MAX_SRC2_U64_si:
    case AMDGPU::DS_MIN_SRC2_F32_si:
    case AMDGPU::DS_MIN_SRC2_F64_si:
    case AMDGPU::DS_MIN_SRC2_I32_si:
    case AMDGPU::DS_MIN_SRC2_I64_si:
    case AMDGPU::DS_MIN_SRC2_U32_si:
    case AMDGPU::DS_MIN_SRC2_U64_si:
    case AMDGPU::DS_OR_SRC2_B32_si:
    case AMDGPU::DS_OR_SRC2_B64_si:
    case AMDGPU::DS_RSUB_SRC2_U32_si:
    case AMDGPU::DS_RSUB_SRC2_U64_si:
    case AMDGPU::DS_SUB_SRC2_U32_si:
    case AMDGPU::DS_SUB_SRC2_U64_si:
    case AMDGPU::DS_WRITE_SRC2_B32_si:
    case AMDGPU::DS_WRITE_SRC2_B64_si:
    case AMDGPU::DS_XOR_SRC2_B32_si:
    case AMDGPU::DS_XOR_SRC2_B64_si: {
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_ADD_F32_vi:
    case AMDGPU::DS_ADD_U32_vi:
    case AMDGPU::DS_ADD_U64_vi:
    case AMDGPU::DS_AND_B32_vi:
    case AMDGPU::DS_AND_B64_vi:
    case AMDGPU::DS_DEC_U32_vi:
    case AMDGPU::DS_DEC_U64_vi:
    case AMDGPU::DS_INC_U32_vi:
    case AMDGPU::DS_INC_U64_vi:
    case AMDGPU::DS_MAX_F32_vi:
    case AMDGPU::DS_MAX_F64_vi:
    case AMDGPU::DS_MAX_I32_vi:
    case AMDGPU::DS_MAX_I64_vi:
    case AMDGPU::DS_MAX_U32_vi:
    case AMDGPU::DS_MAX_U64_vi:
    case AMDGPU::DS_MIN_F32_vi:
    case AMDGPU::DS_MIN_F64_vi:
    case AMDGPU::DS_MIN_I32_vi:
    case AMDGPU::DS_MIN_I64_vi:
    case AMDGPU::DS_MIN_U32_vi:
    case AMDGPU::DS_MIN_U64_vi:
    case AMDGPU::DS_OR_B32_vi:
    case AMDGPU::DS_OR_B64_vi:
    case AMDGPU::DS_RSUB_U32_vi:
    case AMDGPU::DS_RSUB_U64_vi:
    case AMDGPU::DS_SUB_U32_vi:
    case AMDGPU::DS_SUB_U64_vi:
    case AMDGPU::DS_WRITE_ADDTID_B32_vi:
    case AMDGPU::DS_WRITE_B128_vi:
    case AMDGPU::DS_WRITE_B16_D16_HI_vi:
    case AMDGPU::DS_WRITE_B16_vi:
    case AMDGPU::DS_WRITE_B32_vi:
    case AMDGPU::DS_WRITE_B64_vi:
    case AMDGPU::DS_WRITE_B8_D16_HI_vi:
    case AMDGPU::DS_WRITE_B8_vi:
    case AMDGPU::DS_WRITE_B96_vi:
    case AMDGPU::DS_XOR_B32_vi:
    case AMDGPU::DS_XOR_B64_vi: {
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_ADD_U32_si:
    case AMDGPU::DS_ADD_U64_si:
    case AMDGPU::DS_AND_B32_si:
    case AMDGPU::DS_AND_B64_si:
    case AMDGPU::DS_DEC_U32_si:
    case AMDGPU::DS_DEC_U64_si:
    case AMDGPU::DS_INC_U32_si:
    case AMDGPU::DS_INC_U64_si:
    case AMDGPU::DS_MAX_F32_si:
    case AMDGPU::DS_MAX_F64_si:
    case AMDGPU::DS_MAX_I32_si:
    case AMDGPU::DS_MAX_I64_si:
    case AMDGPU::DS_MAX_U32_si:
    case AMDGPU::DS_MAX_U64_si:
    case AMDGPU::DS_MIN_F32_si:
    case AMDGPU::DS_MIN_F64_si:
    case AMDGPU::DS_MIN_I32_si:
    case AMDGPU::DS_MIN_I64_si:
    case AMDGPU::DS_MIN_U32_si:
    case AMDGPU::DS_MIN_U64_si:
    case AMDGPU::DS_OR_B32_si:
    case AMDGPU::DS_OR_B64_si:
    case AMDGPU::DS_RSUB_U32_si:
    case AMDGPU::DS_RSUB_U64_si:
    case AMDGPU::DS_SUB_U32_si:
    case AMDGPU::DS_SUB_U64_si:
    case AMDGPU::DS_WRITE_B128_si:
    case AMDGPU::DS_WRITE_B16_si:
    case AMDGPU::DS_WRITE_B32_si:
    case AMDGPU::DS_WRITE_B64_si:
    case AMDGPU::DS_WRITE_B8_si:
    case AMDGPU::DS_WRITE_B96_si:
    case AMDGPU::DS_XOR_B32_si:
    case AMDGPU::DS_XOR_B64_si: {
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_CMPST_B32_vi:
    case AMDGPU::DS_CMPST_B64_vi:
    case AMDGPU::DS_CMPST_F32_vi:
    case AMDGPU::DS_CMPST_F64_vi:
    case AMDGPU::DS_MSKOR_B32_vi:
    case AMDGPU::DS_MSKOR_B64_vi: {
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: data1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 48;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_CMPST_B32_si:
    case AMDGPU::DS_CMPST_B64_si:
    case AMDGPU::DS_CMPST_F32_si:
    case AMDGPU::DS_CMPST_F64_si:
    case AMDGPU::DS_MSKOR_B32_si:
    case AMDGPU::DS_MSKOR_B64_si: {
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: data1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 48;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_WRITE2ST64_B32_vi:
    case AMDGPU::DS_WRITE2ST64_B64_vi:
    case AMDGPU::DS_WRITE2_B32_vi:
    case AMDGPU::DS_WRITE2_B64_vi: {
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: data1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 48;
      // op: offset0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: offset1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 8;
      break;
    }
    case AMDGPU::DS_WRITE2ST64_B32_si:
    case AMDGPU::DS_WRITE2ST64_B64_si:
    case AMDGPU::DS_WRITE2_B32_si:
    case AMDGPU::DS_WRITE2_B64_si: {
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: data1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 48;
      // op: offset0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: offset1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 8;
      break;
    }
    case AMDGPU::DS_GWS_SEMA_P_si:
    case AMDGPU::DS_GWS_SEMA_P_vi:
    case AMDGPU::DS_GWS_SEMA_RELEASE_ALL_si:
    case AMDGPU::DS_GWS_SEMA_RELEASE_ALL_vi:
    case AMDGPU::DS_GWS_SEMA_V_si:
    case AMDGPU::DS_GWS_SEMA_V_vi: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::BUFFER_STORE_LDS_DWORD_vi: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_LOAD_DWORDX2_LDS_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX3_LDS_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX4_LDS_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_DWORD_LDS_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_LDS_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_LDS_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_SSHORT_LDS_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_LDS_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_USHORT_LDS_OFFSET_vi: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_LOAD_DWORDX2_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX3_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX4_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_DWORD_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_HI_X_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZW_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZ_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFSET_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XY_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFSET_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_X_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_X_gfx80_OFFSET_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZW_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZ_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_XY_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_D16_HI_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_D16_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_SHORT_D16_HI_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_SHORT_D16_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_SSHORT_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_D16_HI_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_D16_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_OFFSET_vi:
    case AMDGPU::BUFFER_LOAD_USHORT_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_BYTE_D16_HI_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_BYTE_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_DWORDX2_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_DWORDX3_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_DWORDX4_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_DWORD_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_HI_X_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZW_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZ_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFSET_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XY_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XY_gfx80_OFFSET_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_X_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_X_gfx80_OFFSET_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZW_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZ_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_XY_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_X_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_SHORT_D16_HI_OFFSET_vi:
    case AMDGPU::BUFFER_STORE_SHORT_OFFSET_vi: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: tfe
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 55;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_LOAD_DWORD_LDS_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_LDS_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_SBYTE_LDS_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_SSHORT_LDS_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_UBYTE_LDS_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_USHORT_LDS_OFFSET_si: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 54;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_LOAD_DWORDX2_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_DWORDX3_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_DWORDX4_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_DWORD_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZW_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZ_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XY_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_SBYTE_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_SSHORT_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_UBYTE_OFFSET_si:
    case AMDGPU::BUFFER_LOAD_USHORT_OFFSET_si:
    case AMDGPU::BUFFER_STORE_BYTE_OFFSET_si:
    case AMDGPU::BUFFER_STORE_DWORDX2_OFFSET_si:
    case AMDGPU::BUFFER_STORE_DWORDX3_OFFSET_si:
    case AMDGPU::BUFFER_STORE_DWORDX4_OFFSET_si:
    case AMDGPU::BUFFER_STORE_DWORD_OFFSET_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZW_OFFSET_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZ_OFFSET_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XY_OFFSET_si:
    case AMDGPU::BUFFER_STORE_FORMAT_X_OFFSET_si:
    case AMDGPU::BUFFER_STORE_SHORT_OFFSET_si: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 54;
      // op: tfe
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 55;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZW_OFFSET_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZ_OFFSET_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFSET_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XY_OFFSET_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFSET_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_X_OFFSET_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_X_gfx80_OFFSET_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZW_OFFSET_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZW_OFFSET_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZ_OFFSET_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZ_OFFSET_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XY_OFFSET_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XY_OFFSET_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_X_OFFSET_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_X_OFFSET_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZW_OFFSET_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZ_OFFSET_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFSET_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XY_OFFSET_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XY_gfx80_OFFSET_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_X_OFFSET_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_X_gfx80_OFFSET_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZW_OFFSET_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZW_OFFSET_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZ_OFFSET_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZ_OFFSET_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_XY_OFFSET_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XY_OFFSET_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_X_OFFSET_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_X_OFFSET_vi: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: format
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 19;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 54;
      // op: tfe
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 55;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_ATOMIC_ADD_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_OFFSET_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_OFFSET_vi: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_ATOMIC_ADD_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_AND_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_INC_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_OR_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_OFFSET_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_OFFSET_si: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 54;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_LOAD_DWORDX2_LDS_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX2_LDS_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX2_LDS_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX3_LDS_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX3_LDS_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX3_LDS_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX4_LDS_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX4_LDS_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX4_LDS_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORD_LDS_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORD_LDS_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORD_LDS_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_LDS_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_LDS_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_LDS_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_LDS_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_LDS_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_LDS_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_SSHORT_LDS_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_SSHORT_LDS_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_SSHORT_LDS_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_LDS_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_LDS_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_LDS_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_USHORT_LDS_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_USHORT_LDS_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_USHORT_LDS_OFFEN_vi: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_LOAD_DWORDX2_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX2_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX2_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX3_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX3_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX3_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX4_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX4_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORDX4_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORD_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORD_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_DWORD_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_HI_X_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_HI_X_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_HI_X_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZW_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZW_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_IDXEN_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFEN_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZ_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZ_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_BOTHEN_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_IDXEN_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFEN_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XY_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XY_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XY_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XY_gfx80_BOTHEN_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XY_gfx80_IDXEN_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFEN_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_X_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_X_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_X_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_X_gfx80_BOTHEN_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_X_gfx80_IDXEN_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_D16_X_gfx80_OFFEN_gfx80:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZW_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZW_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZW_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZ_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZ_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZ_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_XY_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_XY_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_XY_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_D16_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_D16_HI_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_D16_HI_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_D16_HI_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_D16_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_D16_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_SBYTE_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_SHORT_D16_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_SHORT_D16_HI_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_SHORT_D16_HI_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_SHORT_D16_HI_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_SHORT_D16_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_SHORT_D16_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_SSHORT_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_SSHORT_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_SSHORT_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_D16_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_D16_HI_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_D16_HI_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_D16_HI_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_D16_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_D16_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_UBYTE_OFFEN_vi:
    case AMDGPU::BUFFER_LOAD_USHORT_BOTHEN_vi:
    case AMDGPU::BUFFER_LOAD_USHORT_IDXEN_vi:
    case AMDGPU::BUFFER_LOAD_USHORT_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_BYTE_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_BYTE_D16_HI_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_BYTE_D16_HI_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_BYTE_D16_HI_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_BYTE_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_BYTE_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_DWORDX2_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_DWORDX2_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_DWORDX2_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_DWORDX3_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_DWORDX3_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_DWORDX3_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_DWORDX4_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_DWORDX4_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_DWORDX4_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_DWORD_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_DWORD_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_DWORD_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_HI_X_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_HI_X_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_HI_X_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZW_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZW_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZW_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZW_gfx80_IDXEN_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFEN_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZ_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZ_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZ_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZ_gfx80_BOTHEN_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZ_gfx80_IDXEN_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFEN_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XY_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XY_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XY_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XY_gfx80_BOTHEN_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XY_gfx80_IDXEN_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_XY_gfx80_OFFEN_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_X_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_X_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_X_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_X_gfx80_BOTHEN_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_X_gfx80_IDXEN_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_D16_X_gfx80_OFFEN_gfx80:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZW_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZW_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZW_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZ_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZ_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZ_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_XY_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_XY_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_XY_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_X_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_X_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_FORMAT_X_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_SHORT_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_SHORT_D16_HI_BOTHEN_vi:
    case AMDGPU::BUFFER_STORE_SHORT_D16_HI_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_SHORT_D16_HI_OFFEN_vi:
    case AMDGPU::BUFFER_STORE_SHORT_IDXEN_vi:
    case AMDGPU::BUFFER_STORE_SHORT_OFFEN_vi: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: tfe
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 55;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_LOAD_DWORD_LDS_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_DWORD_LDS_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_DWORD_LDS_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_DWORD_LDS_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_LDS_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_LDS_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_LDS_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_LDS_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_SBYTE_LDS_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_SBYTE_LDS_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_SBYTE_LDS_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_SBYTE_LDS_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_SSHORT_LDS_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_SSHORT_LDS_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_SSHORT_LDS_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_SSHORT_LDS_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_UBYTE_LDS_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_UBYTE_LDS_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_UBYTE_LDS_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_UBYTE_LDS_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_USHORT_LDS_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_USHORT_LDS_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_USHORT_LDS_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_USHORT_LDS_OFFEN_si: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 54;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_LOAD_DWORDX2_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_DWORDX2_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_DWORDX2_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_DWORDX2_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_DWORDX3_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_DWORDX3_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_DWORDX3_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_DWORDX3_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_DWORDX4_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_DWORDX4_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_DWORDX4_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_DWORDX4_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_DWORD_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_DWORD_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_DWORD_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_DWORD_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZW_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZW_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZW_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZW_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZ_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZ_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZ_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XYZ_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XY_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XY_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XY_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_XY_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_FORMAT_X_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_SBYTE_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_SBYTE_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_SBYTE_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_SBYTE_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_SSHORT_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_SSHORT_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_SSHORT_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_SSHORT_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_UBYTE_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_UBYTE_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_UBYTE_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_UBYTE_OFFEN_si:
    case AMDGPU::BUFFER_LOAD_USHORT_ADDR64_si:
    case AMDGPU::BUFFER_LOAD_USHORT_BOTHEN_si:
    case AMDGPU::BUFFER_LOAD_USHORT_IDXEN_si:
    case AMDGPU::BUFFER_LOAD_USHORT_OFFEN_si:
    case AMDGPU::BUFFER_STORE_BYTE_ADDR64_si:
    case AMDGPU::BUFFER_STORE_BYTE_BOTHEN_si:
    case AMDGPU::BUFFER_STORE_BYTE_IDXEN_si:
    case AMDGPU::BUFFER_STORE_BYTE_OFFEN_si:
    case AMDGPU::BUFFER_STORE_DWORDX2_ADDR64_si:
    case AMDGPU::BUFFER_STORE_DWORDX2_BOTHEN_si:
    case AMDGPU::BUFFER_STORE_DWORDX2_IDXEN_si:
    case AMDGPU::BUFFER_STORE_DWORDX2_OFFEN_si:
    case AMDGPU::BUFFER_STORE_DWORDX3_ADDR64_si:
    case AMDGPU::BUFFER_STORE_DWORDX3_BOTHEN_si:
    case AMDGPU::BUFFER_STORE_DWORDX3_IDXEN_si:
    case AMDGPU::BUFFER_STORE_DWORDX3_OFFEN_si:
    case AMDGPU::BUFFER_STORE_DWORDX4_ADDR64_si:
    case AMDGPU::BUFFER_STORE_DWORDX4_BOTHEN_si:
    case AMDGPU::BUFFER_STORE_DWORDX4_IDXEN_si:
    case AMDGPU::BUFFER_STORE_DWORDX4_OFFEN_si:
    case AMDGPU::BUFFER_STORE_DWORD_ADDR64_si:
    case AMDGPU::BUFFER_STORE_DWORD_BOTHEN_si:
    case AMDGPU::BUFFER_STORE_DWORD_IDXEN_si:
    case AMDGPU::BUFFER_STORE_DWORD_OFFEN_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZW_ADDR64_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZW_BOTHEN_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZW_IDXEN_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZW_OFFEN_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZ_ADDR64_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZ_BOTHEN_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZ_IDXEN_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XYZ_OFFEN_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XY_ADDR64_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XY_BOTHEN_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XY_IDXEN_si:
    case AMDGPU::BUFFER_STORE_FORMAT_XY_OFFEN_si:
    case AMDGPU::BUFFER_STORE_FORMAT_X_ADDR64_si:
    case AMDGPU::BUFFER_STORE_FORMAT_X_BOTHEN_si:
    case AMDGPU::BUFFER_STORE_FORMAT_X_IDXEN_si:
    case AMDGPU::BUFFER_STORE_FORMAT_X_OFFEN_si:
    case AMDGPU::BUFFER_STORE_SHORT_ADDR64_si:
    case AMDGPU::BUFFER_STORE_SHORT_BOTHEN_si:
    case AMDGPU::BUFFER_STORE_SHORT_IDXEN_si:
    case AMDGPU::BUFFER_STORE_SHORT_OFFEN_si: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 54;
      // op: tfe
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 55;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZW_IDXEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZW_OFFEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_IDXEN_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFEN_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZ_IDXEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZ_OFFEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_BOTHEN_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_IDXEN_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFEN_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XY_BOTHEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XY_IDXEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XY_OFFEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XY_gfx80_BOTHEN_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XY_gfx80_IDXEN_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFEN_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_X_BOTHEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_X_IDXEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_X_OFFEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_X_gfx80_BOTHEN_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_X_gfx80_IDXEN_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_D16_X_gfx80_OFFEN_gfx80:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZW_ADDR64_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZW_BOTHEN_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZW_BOTHEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZW_IDXEN_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZW_IDXEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZW_OFFEN_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZW_OFFEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZ_ADDR64_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZ_BOTHEN_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZ_BOTHEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZ_IDXEN_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZ_IDXEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZ_OFFEN_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XYZ_OFFEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XY_ADDR64_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XY_BOTHEN_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XY_BOTHEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XY_IDXEN_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XY_IDXEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XY_OFFEN_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_XY_OFFEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_X_ADDR64_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_X_BOTHEN_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_X_BOTHEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_X_IDXEN_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_X_IDXEN_vi:
    case AMDGPU::TBUFFER_LOAD_FORMAT_X_OFFEN_si:
    case AMDGPU::TBUFFER_LOAD_FORMAT_X_OFFEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZW_BOTHEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZW_IDXEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZW_OFFEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_IDXEN_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFEN_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZ_BOTHEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZ_IDXEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZ_OFFEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_BOTHEN_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_IDXEN_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFEN_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XY_BOTHEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XY_IDXEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XY_OFFEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XY_gfx80_BOTHEN_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XY_gfx80_IDXEN_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_XY_gfx80_OFFEN_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_X_BOTHEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_X_IDXEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_X_OFFEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_X_gfx80_BOTHEN_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_X_gfx80_IDXEN_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_D16_X_gfx80_OFFEN_gfx80:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZW_ADDR64_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZW_BOTHEN_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZW_BOTHEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZW_IDXEN_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZW_IDXEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZW_OFFEN_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZW_OFFEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZ_ADDR64_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZ_BOTHEN_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZ_BOTHEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZ_IDXEN_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZ_IDXEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZ_OFFEN_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XYZ_OFFEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_XY_ADDR64_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XY_BOTHEN_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XY_BOTHEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_XY_IDXEN_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XY_IDXEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_XY_OFFEN_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_XY_OFFEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_X_ADDR64_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_X_BOTHEN_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_X_BOTHEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_X_IDXEN_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_X_IDXEN_vi:
    case AMDGPU::TBUFFER_STORE_FORMAT_X_OFFEN_si:
    case AMDGPU::TBUFFER_STORE_FORMAT_X_OFFEN_vi: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: format
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 19;
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 54;
      // op: tfe
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 55;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_ATOMIC_ADD_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_ADD_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_ADD_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_OFFEN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_BOTHEN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_IDXEN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_OFFEN_vi: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_ATOMIC_ADD_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_AND_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_INC_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_OR_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_OFFEN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_ADDR64_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_BOTHEN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_IDXEN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_OFFEN_si: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 54;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_ATOMIC_ADD_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_OFFSET_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_OFFSET_RTN_vi: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_ATOMIC_ADD_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_OFFSET_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_OFFSET_RTN_si: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 54;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_ATOMIC_ADD_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_ADD_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_ADD_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_OFFEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_BOTHEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_IDXEN_RTN_vi:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_OFFEN_RTN_vi: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::BUFFER_ATOMIC_ADD_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_ADD_X2_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_AND_X2_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_DEC_X2_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_INC_X2_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_OR_X2_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMAX_X2_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SMIN_X2_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SUB_X2_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_SWAP_X2_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMAX_X2_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_UMIN_X2_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_OFFEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_ADDR64_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_BOTHEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_IDXEN_RTN_si:
    case AMDGPU::BUFFER_ATOMIC_XOR_X2_OFFEN_RTN_si: {
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= op & UINT64_C(4095);
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 54;
      // op: soffset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      break;
    }
    case AMDGPU::SCRATCH_LOAD_DWORDX2_SADDR_vi:
    case AMDGPU::SCRATCH_LOAD_DWORDX3_SADDR_vi:
    case AMDGPU::SCRATCH_LOAD_DWORDX4_SADDR_vi:
    case AMDGPU::SCRATCH_LOAD_DWORD_SADDR_vi:
    case AMDGPU::SCRATCH_LOAD_SBYTE_D16_HI_SADDR_vi:
    case AMDGPU::SCRATCH_LOAD_SBYTE_D16_SADDR_vi:
    case AMDGPU::SCRATCH_LOAD_SBYTE_SADDR_vi:
    case AMDGPU::SCRATCH_LOAD_SHORT_D16_HI_SADDR_vi:
    case AMDGPU::SCRATCH_LOAD_SHORT_D16_SADDR_vi:
    case AMDGPU::SCRATCH_LOAD_SSHORT_SADDR_vi:
    case AMDGPU::SCRATCH_LOAD_UBYTE_D16_HI_SADDR_vi:
    case AMDGPU::SCRATCH_LOAD_UBYTE_D16_SADDR_vi:
    case AMDGPU::SCRATCH_LOAD_UBYTE_SADDR_vi:
    case AMDGPU::SCRATCH_LOAD_USHORT_SADDR_vi: {
      // op: saddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 48;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(8191);
      break;
    }
    case AMDGPU::S_DCACHE_DISCARD_IMM_vi:
    case AMDGPU::S_DCACHE_DISCARD_SGPR_vi:
    case AMDGPU::S_DCACHE_DISCARD_X2_IMM_vi:
    case AMDGPU::S_DCACHE_DISCARD_X2_SGPR_vi: {
      // op: sbase
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(126)) >> 1;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1048575)) << 32;
      break;
    }
    case AMDGPU::S_BUFFER_LOAD_DWORDX16_IMM_ci:
    case AMDGPU::S_BUFFER_LOAD_DWORDX2_IMM_ci:
    case AMDGPU::S_BUFFER_LOAD_DWORDX4_IMM_ci:
    case AMDGPU::S_BUFFER_LOAD_DWORDX8_IMM_ci:
    case AMDGPU::S_BUFFER_LOAD_DWORD_IMM_ci:
    case AMDGPU::S_LOAD_DWORDX16_IMM_ci:
    case AMDGPU::S_LOAD_DWORDX2_IMM_ci:
    case AMDGPU::S_LOAD_DWORDX4_IMM_ci:
    case AMDGPU::S_LOAD_DWORDX8_IMM_ci:
    case AMDGPU::S_LOAD_DWORD_IMM_ci: {
      // op: sbase
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(126)) << 8;
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 15;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(4294967295)) << 32;
      break;
    }
    case AMDGPU::S_BUFFER_LOAD_DWORDX16_IMM_si:
    case AMDGPU::S_BUFFER_LOAD_DWORDX16_SGPR_si:
    case AMDGPU::S_BUFFER_LOAD_DWORDX2_IMM_si:
    case AMDGPU::S_BUFFER_LOAD_DWORDX2_SGPR_si:
    case AMDGPU::S_BUFFER_LOAD_DWORDX4_IMM_si:
    case AMDGPU::S_BUFFER_LOAD_DWORDX4_SGPR_si:
    case AMDGPU::S_BUFFER_LOAD_DWORDX8_IMM_si:
    case AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_si:
    case AMDGPU::S_BUFFER_LOAD_DWORD_IMM_si:
    case AMDGPU::S_BUFFER_LOAD_DWORD_SGPR_si:
    case AMDGPU::S_LOAD_DWORDX16_IMM_si:
    case AMDGPU::S_LOAD_DWORDX16_SGPR_si:
    case AMDGPU::S_LOAD_DWORDX2_IMM_si:
    case AMDGPU::S_LOAD_DWORDX2_SGPR_si:
    case AMDGPU::S_LOAD_DWORDX4_IMM_si:
    case AMDGPU::S_LOAD_DWORDX4_SGPR_si:
    case AMDGPU::S_LOAD_DWORDX8_IMM_si:
    case AMDGPU::S_LOAD_DWORDX8_SGPR_si:
    case AMDGPU::S_LOAD_DWORD_IMM_si:
    case AMDGPU::S_LOAD_DWORD_SGPR_si: {
      // op: sbase
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(126)) << 8;
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 15;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::S_BUFFER_STORE_DWORDX2_IMM_vi:
    case AMDGPU::S_BUFFER_STORE_DWORDX2_SGPR_vi:
    case AMDGPU::S_BUFFER_STORE_DWORDX4_IMM_vi:
    case AMDGPU::S_BUFFER_STORE_DWORDX4_SGPR_vi:
    case AMDGPU::S_BUFFER_STORE_DWORD_IMM_vi:
    case AMDGPU::S_BUFFER_STORE_DWORD_SGPR_vi:
    case AMDGPU::S_SCRATCH_STORE_DWORDX2_IMM_vi:
    case AMDGPU::S_SCRATCH_STORE_DWORDX2_SGPR_vi:
    case AMDGPU::S_SCRATCH_STORE_DWORDX4_IMM_vi:
    case AMDGPU::S_SCRATCH_STORE_DWORDX4_SGPR_vi:
    case AMDGPU::S_SCRATCH_STORE_DWORD_IMM_vi:
    case AMDGPU::S_SCRATCH_STORE_DWORD_SGPR_vi:
    case AMDGPU::S_STORE_DWORDX2_IMM_vi:
    case AMDGPU::S_STORE_DWORDX2_SGPR_vi:
    case AMDGPU::S_STORE_DWORDX4_IMM_vi:
    case AMDGPU::S_STORE_DWORDX4_SGPR_vi:
    case AMDGPU::S_STORE_DWORD_IMM_vi:
    case AMDGPU::S_STORE_DWORD_SGPR_vi: {
      // op: sbase
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(126)) >> 1;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1048575)) << 32;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: sdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 6;
      break;
    }
    case AMDGPU::S_ATC_PROBE_BUFFER_IMM_vi:
    case AMDGPU::S_ATC_PROBE_BUFFER_SGPR_vi:
    case AMDGPU::S_ATC_PROBE_IMM_vi:
    case AMDGPU::S_ATC_PROBE_SGPR_vi:
    case AMDGPU::S_ATOMIC_ADD_IMM_vi:
    case AMDGPU::S_ATOMIC_ADD_SGPR_vi:
    case AMDGPU::S_ATOMIC_ADD_X2_IMM_vi:
    case AMDGPU::S_ATOMIC_ADD_X2_SGPR_vi:
    case AMDGPU::S_ATOMIC_AND_IMM_vi:
    case AMDGPU::S_ATOMIC_AND_SGPR_vi:
    case AMDGPU::S_ATOMIC_AND_X2_IMM_vi:
    case AMDGPU::S_ATOMIC_AND_X2_SGPR_vi:
    case AMDGPU::S_ATOMIC_CMPSWAP_IMM_vi:
    case AMDGPU::S_ATOMIC_CMPSWAP_SGPR_vi:
    case AMDGPU::S_ATOMIC_CMPSWAP_X2_IMM_vi:
    case AMDGPU::S_ATOMIC_CMPSWAP_X2_SGPR_vi:
    case AMDGPU::S_ATOMIC_DEC_IMM_vi:
    case AMDGPU::S_ATOMIC_DEC_SGPR_vi:
    case AMDGPU::S_ATOMIC_DEC_X2_IMM_vi:
    case AMDGPU::S_ATOMIC_DEC_X2_SGPR_vi:
    case AMDGPU::S_ATOMIC_INC_IMM_vi:
    case AMDGPU::S_ATOMIC_INC_SGPR_vi:
    case AMDGPU::S_ATOMIC_INC_X2_IMM_vi:
    case AMDGPU::S_ATOMIC_INC_X2_SGPR_vi:
    case AMDGPU::S_ATOMIC_OR_IMM_vi:
    case AMDGPU::S_ATOMIC_OR_SGPR_vi:
    case AMDGPU::S_ATOMIC_OR_X2_IMM_vi:
    case AMDGPU::S_ATOMIC_OR_X2_SGPR_vi:
    case AMDGPU::S_ATOMIC_SMAX_IMM_vi:
    case AMDGPU::S_ATOMIC_SMAX_SGPR_vi:
    case AMDGPU::S_ATOMIC_SMAX_X2_IMM_vi:
    case AMDGPU::S_ATOMIC_SMAX_X2_SGPR_vi:
    case AMDGPU::S_ATOMIC_SMIN_IMM_vi:
    case AMDGPU::S_ATOMIC_SMIN_SGPR_vi:
    case AMDGPU::S_ATOMIC_SMIN_X2_IMM_vi:
    case AMDGPU::S_ATOMIC_SMIN_X2_SGPR_vi:
    case AMDGPU::S_ATOMIC_SUB_IMM_vi:
    case AMDGPU::S_ATOMIC_SUB_SGPR_vi:
    case AMDGPU::S_ATOMIC_SUB_X2_IMM_vi:
    case AMDGPU::S_ATOMIC_SUB_X2_SGPR_vi:
    case AMDGPU::S_ATOMIC_SWAP_IMM_vi:
    case AMDGPU::S_ATOMIC_SWAP_SGPR_vi:
    case AMDGPU::S_ATOMIC_SWAP_X2_IMM_vi:
    case AMDGPU::S_ATOMIC_SWAP_X2_SGPR_vi:
    case AMDGPU::S_ATOMIC_UMAX_IMM_vi:
    case AMDGPU::S_ATOMIC_UMAX_SGPR_vi:
    case AMDGPU::S_ATOMIC_UMAX_X2_IMM_vi:
    case AMDGPU::S_ATOMIC_UMAX_X2_SGPR_vi:
    case AMDGPU::S_ATOMIC_UMIN_IMM_vi:
    case AMDGPU::S_ATOMIC_UMIN_SGPR_vi:
    case AMDGPU::S_ATOMIC_UMIN_X2_IMM_vi:
    case AMDGPU::S_ATOMIC_UMIN_X2_SGPR_vi:
    case AMDGPU::S_ATOMIC_XOR_IMM_vi:
    case AMDGPU::S_ATOMIC_XOR_SGPR_vi:
    case AMDGPU::S_ATOMIC_XOR_X2_IMM_vi:
    case AMDGPU::S_ATOMIC_XOR_X2_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_ADD_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_ADD_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_ADD_X2_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_ADD_X2_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_AND_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_AND_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_AND_X2_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_AND_X2_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_X2_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_X2_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_DEC_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_DEC_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_DEC_X2_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_DEC_X2_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_INC_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_INC_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_INC_X2_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_INC_X2_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_OR_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_OR_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_OR_X2_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_OR_X2_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMAX_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMAX_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMAX_X2_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMAX_X2_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMIN_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMIN_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMIN_X2_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMIN_X2_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SUB_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SUB_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SUB_X2_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SUB_X2_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SWAP_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SWAP_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SWAP_X2_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SWAP_X2_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMAX_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMAX_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMAX_X2_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMAX_X2_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMIN_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMIN_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMIN_X2_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMIN_X2_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_XOR_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_XOR_SGPR_vi:
    case AMDGPU::S_BUFFER_ATOMIC_XOR_X2_IMM_vi:
    case AMDGPU::S_BUFFER_ATOMIC_XOR_X2_SGPR_vi: {
      // op: sbase
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(126)) >> 1;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1048575)) << 32;
      // op: sdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 6;
      break;
    }
    case AMDGPU::S_BUFFER_LOAD_DWORDX16_IMM_vi:
    case AMDGPU::S_BUFFER_LOAD_DWORDX16_SGPR_vi:
    case AMDGPU::S_BUFFER_LOAD_DWORDX2_IMM_vi:
    case AMDGPU::S_BUFFER_LOAD_DWORDX2_SGPR_vi:
    case AMDGPU::S_BUFFER_LOAD_DWORDX4_IMM_vi:
    case AMDGPU::S_BUFFER_LOAD_DWORDX4_SGPR_vi:
    case AMDGPU::S_BUFFER_LOAD_DWORDX8_IMM_vi:
    case AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_vi:
    case AMDGPU::S_BUFFER_LOAD_DWORD_IMM_vi:
    case AMDGPU::S_BUFFER_LOAD_DWORD_SGPR_vi:
    case AMDGPU::S_LOAD_DWORDX16_IMM_vi:
    case AMDGPU::S_LOAD_DWORDX16_SGPR_vi:
    case AMDGPU::S_LOAD_DWORDX2_IMM_vi:
    case AMDGPU::S_LOAD_DWORDX2_SGPR_vi:
    case AMDGPU::S_LOAD_DWORDX4_IMM_vi:
    case AMDGPU::S_LOAD_DWORDX4_SGPR_vi:
    case AMDGPU::S_LOAD_DWORDX8_IMM_vi:
    case AMDGPU::S_LOAD_DWORDX8_SGPR_vi:
    case AMDGPU::S_LOAD_DWORD_IMM_vi:
    case AMDGPU::S_LOAD_DWORD_SGPR_vi:
    case AMDGPU::S_SCRATCH_LOAD_DWORDX2_IMM_vi:
    case AMDGPU::S_SCRATCH_LOAD_DWORDX2_SGPR_vi:
    case AMDGPU::S_SCRATCH_LOAD_DWORDX4_IMM_vi:
    case AMDGPU::S_SCRATCH_LOAD_DWORDX4_SGPR_vi:
    case AMDGPU::S_SCRATCH_LOAD_DWORD_IMM_vi:
    case AMDGPU::S_SCRATCH_LOAD_DWORD_SGPR_vi: {
      // op: sbase
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(126)) >> 1;
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 6;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1048575)) << 32;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      break;
    }
    case AMDGPU::S_ATOMIC_ADD_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_ADD_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_ADD_X2_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_ADD_X2_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_AND_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_AND_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_AND_X2_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_AND_X2_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_CMPSWAP_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_CMPSWAP_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_CMPSWAP_X2_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_CMPSWAP_X2_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_DEC_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_DEC_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_DEC_X2_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_DEC_X2_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_INC_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_INC_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_INC_X2_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_INC_X2_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_OR_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_OR_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_OR_X2_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_OR_X2_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_SMAX_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_SMAX_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_SMAX_X2_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_SMAX_X2_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_SMIN_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_SMIN_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_SMIN_X2_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_SMIN_X2_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_SUB_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_SUB_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_SUB_X2_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_SUB_X2_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_SWAP_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_SWAP_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_SWAP_X2_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_SWAP_X2_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_UMAX_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_UMAX_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_UMAX_X2_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_UMAX_X2_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_UMIN_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_UMIN_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_UMIN_X2_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_UMIN_X2_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_XOR_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_XOR_SGPR_RTN_vi:
    case AMDGPU::S_ATOMIC_XOR_X2_IMM_RTN_vi:
    case AMDGPU::S_ATOMIC_XOR_X2_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_ADD_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_ADD_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_ADD_X2_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_ADD_X2_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_AND_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_AND_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_AND_X2_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_AND_X2_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_X2_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_CMPSWAP_X2_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_DEC_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_DEC_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_DEC_X2_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_DEC_X2_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_INC_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_INC_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_INC_X2_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_INC_X2_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_OR_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_OR_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_OR_X2_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_OR_X2_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMAX_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMAX_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMAX_X2_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMAX_X2_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMIN_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMIN_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMIN_X2_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SMIN_X2_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SUB_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SUB_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SUB_X2_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SUB_X2_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SWAP_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SWAP_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SWAP_X2_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_SWAP_X2_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMAX_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMAX_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMAX_X2_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMAX_X2_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMIN_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMIN_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMIN_X2_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_UMIN_X2_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_XOR_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_XOR_SGPR_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_XOR_X2_IMM_RTN_vi:
    case AMDGPU::S_BUFFER_ATOMIC_XOR_X2_SGPR_RTN_vi: {
      // op: sbase
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(126)) >> 1;
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 6;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1048575)) << 32;
      break;
    }
    case AMDGPU::S_MEMTIME_si: {
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 15;
      break;
    }
    case AMDGPU::S_GETPC_B64_si:
    case AMDGPU::S_GETPC_B64_vi: {
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 16;
      break;
    }
    case AMDGPU::S_CALL_B64_vi:
    case AMDGPU::S_CBRANCH_I_FORK_si:
    case AMDGPU::S_CBRANCH_I_FORK_vi:
    case AMDGPU::S_CMOVK_I32_si:
    case AMDGPU::S_CMOVK_I32_vi:
    case AMDGPU::S_CMPK_EQ_I32_si:
    case AMDGPU::S_CMPK_EQ_I32_vi:
    case AMDGPU::S_CMPK_EQ_U32_si:
    case AMDGPU::S_CMPK_EQ_U32_vi:
    case AMDGPU::S_CMPK_GE_I32_si:
    case AMDGPU::S_CMPK_GE_I32_vi:
    case AMDGPU::S_CMPK_GE_U32_si:
    case AMDGPU::S_CMPK_GE_U32_vi:
    case AMDGPU::S_CMPK_GT_I32_si:
    case AMDGPU::S_CMPK_GT_I32_vi:
    case AMDGPU::S_CMPK_GT_U32_si:
    case AMDGPU::S_CMPK_GT_U32_vi:
    case AMDGPU::S_CMPK_LE_I32_si:
    case AMDGPU::S_CMPK_LE_I32_vi:
    case AMDGPU::S_CMPK_LE_U32_si:
    case AMDGPU::S_CMPK_LE_U32_vi:
    case AMDGPU::S_CMPK_LG_I32_si:
    case AMDGPU::S_CMPK_LG_I32_vi:
    case AMDGPU::S_CMPK_LG_U32_si:
    case AMDGPU::S_CMPK_LG_U32_vi:
    case AMDGPU::S_CMPK_LT_I32_si:
    case AMDGPU::S_CMPK_LT_I32_vi:
    case AMDGPU::S_CMPK_LT_U32_si:
    case AMDGPU::S_CMPK_LT_U32_vi:
    case AMDGPU::S_GETREG_B32_si:
    case AMDGPU::S_GETREG_B32_vi:
    case AMDGPU::S_MOVK_I32_si:
    case AMDGPU::S_MOVK_I32_vi:
    case AMDGPU::S_SETREG_B32_si:
    case AMDGPU::S_SETREG_B32_vi: {
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 16;
      // op: simm16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::S_ADDK_I32_si:
    case AMDGPU::S_ADDK_I32_vi:
    case AMDGPU::S_MULK_I32_si:
    case AMDGPU::S_MULK_I32_vi: {
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 16;
      // op: simm16
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::S_ABS_I32_si:
    case AMDGPU::S_ABS_I32_vi:
    case AMDGPU::S_ANDN1_SAVEEXEC_B64_vi:
    case AMDGPU::S_ANDN1_WREXEC_B64_vi:
    case AMDGPU::S_ANDN2_SAVEEXEC_B64_si:
    case AMDGPU::S_ANDN2_SAVEEXEC_B64_vi:
    case AMDGPU::S_ANDN2_WREXEC_B64_vi:
    case AMDGPU::S_AND_SAVEEXEC_B64_si:
    case AMDGPU::S_AND_SAVEEXEC_B64_vi:
    case AMDGPU::S_BCNT0_I32_B32_si:
    case AMDGPU::S_BCNT0_I32_B32_vi:
    case AMDGPU::S_BCNT0_I32_B64_si:
    case AMDGPU::S_BCNT0_I32_B64_vi:
    case AMDGPU::S_BCNT1_I32_B32_si:
    case AMDGPU::S_BCNT1_I32_B32_vi:
    case AMDGPU::S_BCNT1_I32_B64_si:
    case AMDGPU::S_BCNT1_I32_B64_vi:
    case AMDGPU::S_BITREPLICATE_B64_B32_vi:
    case AMDGPU::S_BITSET0_B32_si:
    case AMDGPU::S_BITSET0_B32_vi:
    case AMDGPU::S_BITSET0_B64_si:
    case AMDGPU::S_BITSET0_B64_vi:
    case AMDGPU::S_BITSET1_B32_si:
    case AMDGPU::S_BITSET1_B32_vi:
    case AMDGPU::S_BITSET1_B64_si:
    case AMDGPU::S_BITSET1_B64_vi:
    case AMDGPU::S_BREV_B32_si:
    case AMDGPU::S_BREV_B32_vi:
    case AMDGPU::S_BREV_B64_si:
    case AMDGPU::S_BREV_B64_vi:
    case AMDGPU::S_CMOV_B32_si:
    case AMDGPU::S_CMOV_B32_vi:
    case AMDGPU::S_CMOV_B64_si:
    case AMDGPU::S_CMOV_B64_vi:
    case AMDGPU::S_FF0_I32_B32_si:
    case AMDGPU::S_FF0_I32_B32_vi:
    case AMDGPU::S_FF0_I32_B64_si:
    case AMDGPU::S_FF0_I32_B64_vi:
    case AMDGPU::S_FF1_I32_B32_si:
    case AMDGPU::S_FF1_I32_B32_vi:
    case AMDGPU::S_FF1_I32_B64_si:
    case AMDGPU::S_FF1_I32_B64_vi:
    case AMDGPU::S_FLBIT_I32_B32_si:
    case AMDGPU::S_FLBIT_I32_B32_vi:
    case AMDGPU::S_FLBIT_I32_B64_si:
    case AMDGPU::S_FLBIT_I32_B64_vi:
    case AMDGPU::S_FLBIT_I32_I64_si:
    case AMDGPU::S_FLBIT_I32_I64_vi:
    case AMDGPU::S_FLBIT_I32_si:
    case AMDGPU::S_FLBIT_I32_vi:
    case AMDGPU::S_MOVRELD_B32_si:
    case AMDGPU::S_MOVRELD_B32_vi:
    case AMDGPU::S_MOVRELD_B64_si:
    case AMDGPU::S_MOVRELD_B64_vi:
    case AMDGPU::S_MOVRELS_B32_si:
    case AMDGPU::S_MOVRELS_B32_vi:
    case AMDGPU::S_MOVRELS_B64_si:
    case AMDGPU::S_MOVRELS_B64_vi:
    case AMDGPU::S_MOV_B32_si:
    case AMDGPU::S_MOV_B32_vi:
    case AMDGPU::S_MOV_B64_si:
    case AMDGPU::S_MOV_B64_vi:
    case AMDGPU::S_MOV_FED_B32_si:
    case AMDGPU::S_MOV_FED_B32_vi:
    case AMDGPU::S_MOV_REGRD_B32_si:
    case AMDGPU::S_MOV_REGRD_B32_vi:
    case AMDGPU::S_NAND_SAVEEXEC_B64_si:
    case AMDGPU::S_NAND_SAVEEXEC_B64_vi:
    case AMDGPU::S_NOR_SAVEEXEC_B64_si:
    case AMDGPU::S_NOR_SAVEEXEC_B64_vi:
    case AMDGPU::S_NOT_B32_si:
    case AMDGPU::S_NOT_B32_vi:
    case AMDGPU::S_NOT_B64_si:
    case AMDGPU::S_NOT_B64_vi:
    case AMDGPU::S_ORN1_SAVEEXEC_B64_vi:
    case AMDGPU::S_ORN2_SAVEEXEC_B64_si:
    case AMDGPU::S_ORN2_SAVEEXEC_B64_vi:
    case AMDGPU::S_OR_SAVEEXEC_B64_si:
    case AMDGPU::S_OR_SAVEEXEC_B64_vi:
    case AMDGPU::S_QUADMASK_B32_si:
    case AMDGPU::S_QUADMASK_B32_vi:
    case AMDGPU::S_QUADMASK_B64_si:
    case AMDGPU::S_QUADMASK_B64_vi:
    case AMDGPU::S_SEXT_I32_I16_si:
    case AMDGPU::S_SEXT_I32_I16_vi:
    case AMDGPU::S_SEXT_I32_I8_si:
    case AMDGPU::S_SEXT_I32_I8_vi:
    case AMDGPU::S_SWAPPC_B64_si:
    case AMDGPU::S_SWAPPC_B64_vi:
    case AMDGPU::S_WQM_B32_si:
    case AMDGPU::S_WQM_B32_vi:
    case AMDGPU::S_WQM_B64_si:
    case AMDGPU::S_WQM_B64_vi:
    case AMDGPU::S_XNOR_SAVEEXEC_B64_si:
    case AMDGPU::S_XNOR_SAVEEXEC_B64_vi:
    case AMDGPU::S_XOR_SAVEEXEC_B64_si:
    case AMDGPU::S_XOR_SAVEEXEC_B64_vi: {
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 16;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::S_ABSDIFF_I32_si:
    case AMDGPU::S_ABSDIFF_I32_vi:
    case AMDGPU::S_ADDC_U32_si:
    case AMDGPU::S_ADDC_U32_vi:
    case AMDGPU::S_ADD_I32_si:
    case AMDGPU::S_ADD_I32_vi:
    case AMDGPU::S_ADD_U32_si:
    case AMDGPU::S_ADD_U32_vi:
    case AMDGPU::S_ANDN2_B32_si:
    case AMDGPU::S_ANDN2_B32_vi:
    case AMDGPU::S_ANDN2_B64_si:
    case AMDGPU::S_ANDN2_B64_vi:
    case AMDGPU::S_AND_B32_si:
    case AMDGPU::S_AND_B32_vi:
    case AMDGPU::S_AND_B64_si:
    case AMDGPU::S_AND_B64_vi:
    case AMDGPU::S_ASHR_I32_si:
    case AMDGPU::S_ASHR_I32_vi:
    case AMDGPU::S_ASHR_I64_si:
    case AMDGPU::S_ASHR_I64_vi:
    case AMDGPU::S_BFE_I32_si:
    case AMDGPU::S_BFE_I32_vi:
    case AMDGPU::S_BFE_I64_si:
    case AMDGPU::S_BFE_I64_vi:
    case AMDGPU::S_BFE_U32_si:
    case AMDGPU::S_BFE_U32_vi:
    case AMDGPU::S_BFE_U64_si:
    case AMDGPU::S_BFE_U64_vi:
    case AMDGPU::S_BFM_B32_si:
    case AMDGPU::S_BFM_B32_vi:
    case AMDGPU::S_BFM_B64_si:
    case AMDGPU::S_BFM_B64_vi:
    case AMDGPU::S_CSELECT_B32_si:
    case AMDGPU::S_CSELECT_B32_vi:
    case AMDGPU::S_CSELECT_B64_si:
    case AMDGPU::S_CSELECT_B64_vi:
    case AMDGPU::S_LSHL1_ADD_U32_vi:
    case AMDGPU::S_LSHL2_ADD_U32_vi:
    case AMDGPU::S_LSHL3_ADD_U32_vi:
    case AMDGPU::S_LSHL4_ADD_U32_vi:
    case AMDGPU::S_LSHL_B32_si:
    case AMDGPU::S_LSHL_B32_vi:
    case AMDGPU::S_LSHL_B64_si:
    case AMDGPU::S_LSHL_B64_vi:
    case AMDGPU::S_LSHR_B32_si:
    case AMDGPU::S_LSHR_B32_vi:
    case AMDGPU::S_LSHR_B64_si:
    case AMDGPU::S_LSHR_B64_vi:
    case AMDGPU::S_MAX_I32_si:
    case AMDGPU::S_MAX_I32_vi:
    case AMDGPU::S_MAX_U32_si:
    case AMDGPU::S_MAX_U32_vi:
    case AMDGPU::S_MIN_I32_si:
    case AMDGPU::S_MIN_I32_vi:
    case AMDGPU::S_MIN_U32_si:
    case AMDGPU::S_MIN_U32_vi:
    case AMDGPU::S_MUL_HI_I32_vi:
    case AMDGPU::S_MUL_HI_U32_vi:
    case AMDGPU::S_MUL_I32_si:
    case AMDGPU::S_MUL_I32_vi:
    case AMDGPU::S_NAND_B32_si:
    case AMDGPU::S_NAND_B32_vi:
    case AMDGPU::S_NAND_B64_si:
    case AMDGPU::S_NAND_B64_vi:
    case AMDGPU::S_NOR_B32_si:
    case AMDGPU::S_NOR_B32_vi:
    case AMDGPU::S_NOR_B64_si:
    case AMDGPU::S_NOR_B64_vi:
    case AMDGPU::S_ORN2_B32_si:
    case AMDGPU::S_ORN2_B32_vi:
    case AMDGPU::S_ORN2_B64_si:
    case AMDGPU::S_ORN2_B64_vi:
    case AMDGPU::S_OR_B32_si:
    case AMDGPU::S_OR_B32_vi:
    case AMDGPU::S_OR_B64_si:
    case AMDGPU::S_OR_B64_vi:
    case AMDGPU::S_PACK_HH_B32_B16_vi:
    case AMDGPU::S_PACK_LH_B32_B16_vi:
    case AMDGPU::S_PACK_LL_B32_B16_vi:
    case AMDGPU::S_SUBB_U32_si:
    case AMDGPU::S_SUBB_U32_vi:
    case AMDGPU::S_SUB_I32_si:
    case AMDGPU::S_SUB_I32_vi:
    case AMDGPU::S_SUB_U32_si:
    case AMDGPU::S_SUB_U32_vi:
    case AMDGPU::S_XNOR_B32_si:
    case AMDGPU::S_XNOR_B32_vi:
    case AMDGPU::S_XNOR_B64_si:
    case AMDGPU::S_XNOR_B64_vi:
    case AMDGPU::S_XOR_B32_si:
    case AMDGPU::S_XOR_B32_vi:
    case AMDGPU::S_XOR_B64_si:
    case AMDGPU::S_XOR_B64_vi: {
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 16;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 8;
      break;
    }
    case AMDGPU::S_MEMREALTIME_vi:
    case AMDGPU::S_MEMTIME_vi: {
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 6;
      break;
    }
    case AMDGPU::S_DECPERFLEVEL:
    case AMDGPU::S_INCPERFLEVEL:
    case AMDGPU::S_NOP:
    case AMDGPU::S_SENDMSG:
    case AMDGPU::S_SENDMSGHALT:
    case AMDGPU::S_SETHALT:
    case AMDGPU::S_SETKILL:
    case AMDGPU::S_SETPRIO:
    case AMDGPU::S_SET_GPR_IDX_MODE:
    case AMDGPU::S_SLEEP:
    case AMDGPU::S_TRAP:
    case AMDGPU::S_WAITCNT: {
      // op: simm16
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::S_SETREG_IMM32_B32_si:
    case AMDGPU::S_SETREG_IMM32_B32_vi: {
      // op: simm16
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(65535);
      // op: imm
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(4294967295)) << 32;
      break;
    }
    case AMDGPU::S_BRANCH:
    case AMDGPU::S_CBRANCH_CDBGSYS:
    case AMDGPU::S_CBRANCH_CDBGSYS_AND_USER:
    case AMDGPU::S_CBRANCH_CDBGSYS_OR_USER:
    case AMDGPU::S_CBRANCH_CDBGUSER:
    case AMDGPU::S_CBRANCH_EXECNZ:
    case AMDGPU::S_CBRANCH_EXECZ:
    case AMDGPU::S_CBRANCH_SCC0:
    case AMDGPU::S_CBRANCH_SCC1:
    case AMDGPU::S_CBRANCH_VCCNZ:
    case AMDGPU::S_CBRANCH_VCCZ: {
      // op: simm16
      op = getSOPPBrEncoding(MI, 0, Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::S_CBRANCH_JOIN_si:
    case AMDGPU::S_CBRANCH_JOIN_vi:
    case AMDGPU::S_RFE_B64_si:
    case AMDGPU::S_RFE_B64_vi:
    case AMDGPU::S_SETPC_B64_si:
    case AMDGPU::S_SETPC_B64_vi:
    case AMDGPU::S_SET_GPR_IDX_IDX_vi: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::S_BITCMP0_B32:
    case AMDGPU::S_BITCMP0_B64:
    case AMDGPU::S_BITCMP1_B32:
    case AMDGPU::S_BITCMP1_B64:
    case AMDGPU::S_CBRANCH_G_FORK_si:
    case AMDGPU::S_CBRANCH_G_FORK_vi:
    case AMDGPU::S_CMP_EQ_I32:
    case AMDGPU::S_CMP_EQ_U32:
    case AMDGPU::S_CMP_EQ_U64:
    case AMDGPU::S_CMP_GE_I32:
    case AMDGPU::S_CMP_GE_U32:
    case AMDGPU::S_CMP_GT_I32:
    case AMDGPU::S_CMP_GT_U32:
    case AMDGPU::S_CMP_LE_I32:
    case AMDGPU::S_CMP_LE_U32:
    case AMDGPU::S_CMP_LG_I32:
    case AMDGPU::S_CMP_LG_U32:
    case AMDGPU::S_CMP_LG_U64:
    case AMDGPU::S_CMP_LT_I32:
    case AMDGPU::S_CMP_LT_U32:
    case AMDGPU::S_RFE_RESTORE_B64_vi:
    case AMDGPU::S_SETVSKIP:
    case AMDGPU::S_SET_GPR_IDX_ON: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 8;
      break;
    }
    case AMDGPU::V_CMPSX_EQ_F32_e32_si:
    case AMDGPU::V_CMPSX_EQ_F64_e32_si:
    case AMDGPU::V_CMPSX_F_F32_e32_si:
    case AMDGPU::V_CMPSX_F_F64_e32_si:
    case AMDGPU::V_CMPSX_GE_F32_e32_si:
    case AMDGPU::V_CMPSX_GE_F64_e32_si:
    case AMDGPU::V_CMPSX_GT_F32_e32_si:
    case AMDGPU::V_CMPSX_GT_F64_e32_si:
    case AMDGPU::V_CMPSX_LE_F32_e32_si:
    case AMDGPU::V_CMPSX_LE_F64_e32_si:
    case AMDGPU::V_CMPSX_LG_F32_e32_si:
    case AMDGPU::V_CMPSX_LG_F64_e32_si:
    case AMDGPU::V_CMPSX_LT_F32_e32_si:
    case AMDGPU::V_CMPSX_LT_F64_e32_si:
    case AMDGPU::V_CMPSX_NEQ_F32_e32_si:
    case AMDGPU::V_CMPSX_NEQ_F64_e32_si:
    case AMDGPU::V_CMPSX_NGE_F32_e32_si:
    case AMDGPU::V_CMPSX_NGE_F64_e32_si:
    case AMDGPU::V_CMPSX_NGT_F32_e32_si:
    case AMDGPU::V_CMPSX_NGT_F64_e32_si:
    case AMDGPU::V_CMPSX_NLE_F32_e32_si:
    case AMDGPU::V_CMPSX_NLE_F64_e32_si:
    case AMDGPU::V_CMPSX_NLG_F32_e32_si:
    case AMDGPU::V_CMPSX_NLG_F64_e32_si:
    case AMDGPU::V_CMPSX_NLT_F32_e32_si:
    case AMDGPU::V_CMPSX_NLT_F64_e32_si:
    case AMDGPU::V_CMPSX_O_F32_e32_si:
    case AMDGPU::V_CMPSX_O_F64_e32_si:
    case AMDGPU::V_CMPSX_TRU_F32_e32_si:
    case AMDGPU::V_CMPSX_TRU_F64_e32_si:
    case AMDGPU::V_CMPSX_U_F32_e32_si:
    case AMDGPU::V_CMPSX_U_F64_e32_si:
    case AMDGPU::V_CMPS_EQ_F32_e32_si:
    case AMDGPU::V_CMPS_EQ_F64_e32_si:
    case AMDGPU::V_CMPS_F_F32_e32_si:
    case AMDGPU::V_CMPS_F_F64_e32_si:
    case AMDGPU::V_CMPS_GE_F32_e32_si:
    case AMDGPU::V_CMPS_GE_F64_e32_si:
    case AMDGPU::V_CMPS_GT_F32_e32_si:
    case AMDGPU::V_CMPS_GT_F64_e32_si:
    case AMDGPU::V_CMPS_LE_F32_e32_si:
    case AMDGPU::V_CMPS_LE_F64_e32_si:
    case AMDGPU::V_CMPS_LG_F32_e32_si:
    case AMDGPU::V_CMPS_LG_F64_e32_si:
    case AMDGPU::V_CMPS_LT_F32_e32_si:
    case AMDGPU::V_CMPS_LT_F64_e32_si:
    case AMDGPU::V_CMPS_NEQ_F32_e32_si:
    case AMDGPU::V_CMPS_NEQ_F64_e32_si:
    case AMDGPU::V_CMPS_NGE_F32_e32_si:
    case AMDGPU::V_CMPS_NGE_F64_e32_si:
    case AMDGPU::V_CMPS_NGT_F32_e32_si:
    case AMDGPU::V_CMPS_NGT_F64_e32_si:
    case AMDGPU::V_CMPS_NLE_F32_e32_si:
    case AMDGPU::V_CMPS_NLE_F64_e32_si:
    case AMDGPU::V_CMPS_NLG_F32_e32_si:
    case AMDGPU::V_CMPS_NLG_F64_e32_si:
    case AMDGPU::V_CMPS_NLT_F32_e32_si:
    case AMDGPU::V_CMPS_NLT_F64_e32_si:
    case AMDGPU::V_CMPS_O_F32_e32_si:
    case AMDGPU::V_CMPS_O_F64_e32_si:
    case AMDGPU::V_CMPS_TRU_F32_e32_si:
    case AMDGPU::V_CMPS_TRU_F64_e32_si:
    case AMDGPU::V_CMPS_U_F32_e32_si:
    case AMDGPU::V_CMPS_U_F64_e32_si:
    case AMDGPU::V_CMPX_CLASS_F16_e32_vi:
    case AMDGPU::V_CMPX_CLASS_F32_e32_si:
    case AMDGPU::V_CMPX_CLASS_F32_e32_vi:
    case AMDGPU::V_CMPX_CLASS_F64_e32_si:
    case AMDGPU::V_CMPX_CLASS_F64_e32_vi:
    case AMDGPU::V_CMPX_EQ_F16_e32_vi:
    case AMDGPU::V_CMPX_EQ_F32_e32_si:
    case AMDGPU::V_CMPX_EQ_F32_e32_vi:
    case AMDGPU::V_CMPX_EQ_F64_e32_si:
    case AMDGPU::V_CMPX_EQ_F64_e32_vi:
    case AMDGPU::V_CMPX_EQ_I16_e32_vi:
    case AMDGPU::V_CMPX_EQ_I32_e32_si:
    case AMDGPU::V_CMPX_EQ_I32_e32_vi:
    case AMDGPU::V_CMPX_EQ_I64_e32_si:
    case AMDGPU::V_CMPX_EQ_I64_e32_vi:
    case AMDGPU::V_CMPX_EQ_U16_e32_vi:
    case AMDGPU::V_CMPX_EQ_U32_e32_si:
    case AMDGPU::V_CMPX_EQ_U32_e32_vi:
    case AMDGPU::V_CMPX_EQ_U64_e32_si:
    case AMDGPU::V_CMPX_EQ_U64_e32_vi:
    case AMDGPU::V_CMPX_F_F16_e32_vi:
    case AMDGPU::V_CMPX_F_F32_e32_si:
    case AMDGPU::V_CMPX_F_F32_e32_vi:
    case AMDGPU::V_CMPX_F_F64_e32_si:
    case AMDGPU::V_CMPX_F_F64_e32_vi:
    case AMDGPU::V_CMPX_F_I16_e32_vi:
    case AMDGPU::V_CMPX_F_I32_e32_si:
    case AMDGPU::V_CMPX_F_I32_e32_vi:
    case AMDGPU::V_CMPX_F_I64_e32_si:
    case AMDGPU::V_CMPX_F_I64_e32_vi:
    case AMDGPU::V_CMPX_F_U16_e32_vi:
    case AMDGPU::V_CMPX_F_U32_e32_si:
    case AMDGPU::V_CMPX_F_U32_e32_vi:
    case AMDGPU::V_CMPX_F_U64_e32_si:
    case AMDGPU::V_CMPX_F_U64_e32_vi:
    case AMDGPU::V_CMPX_GE_F16_e32_vi:
    case AMDGPU::V_CMPX_GE_F32_e32_si:
    case AMDGPU::V_CMPX_GE_F32_e32_vi:
    case AMDGPU::V_CMPX_GE_F64_e32_si:
    case AMDGPU::V_CMPX_GE_F64_e32_vi:
    case AMDGPU::V_CMPX_GE_I16_e32_vi:
    case AMDGPU::V_CMPX_GE_I32_e32_si:
    case AMDGPU::V_CMPX_GE_I32_e32_vi:
    case AMDGPU::V_CMPX_GE_I64_e32_si:
    case AMDGPU::V_CMPX_GE_I64_e32_vi:
    case AMDGPU::V_CMPX_GE_U16_e32_vi:
    case AMDGPU::V_CMPX_GE_U32_e32_si:
    case AMDGPU::V_CMPX_GE_U32_e32_vi:
    case AMDGPU::V_CMPX_GE_U64_e32_si:
    case AMDGPU::V_CMPX_GE_U64_e32_vi:
    case AMDGPU::V_CMPX_GT_F16_e32_vi:
    case AMDGPU::V_CMPX_GT_F32_e32_si:
    case AMDGPU::V_CMPX_GT_F32_e32_vi:
    case AMDGPU::V_CMPX_GT_F64_e32_si:
    case AMDGPU::V_CMPX_GT_F64_e32_vi:
    case AMDGPU::V_CMPX_GT_I16_e32_vi:
    case AMDGPU::V_CMPX_GT_I32_e32_si:
    case AMDGPU::V_CMPX_GT_I32_e32_vi:
    case AMDGPU::V_CMPX_GT_I64_e32_si:
    case AMDGPU::V_CMPX_GT_I64_e32_vi:
    case AMDGPU::V_CMPX_GT_U16_e32_vi:
    case AMDGPU::V_CMPX_GT_U32_e32_si:
    case AMDGPU::V_CMPX_GT_U32_e32_vi:
    case AMDGPU::V_CMPX_GT_U64_e32_si:
    case AMDGPU::V_CMPX_GT_U64_e32_vi:
    case AMDGPU::V_CMPX_LE_F16_e32_vi:
    case AMDGPU::V_CMPX_LE_F32_e32_si:
    case AMDGPU::V_CMPX_LE_F32_e32_vi:
    case AMDGPU::V_CMPX_LE_F64_e32_si:
    case AMDGPU::V_CMPX_LE_F64_e32_vi:
    case AMDGPU::V_CMPX_LE_I16_e32_vi:
    case AMDGPU::V_CMPX_LE_I32_e32_si:
    case AMDGPU::V_CMPX_LE_I32_e32_vi:
    case AMDGPU::V_CMPX_LE_I64_e32_si:
    case AMDGPU::V_CMPX_LE_I64_e32_vi:
    case AMDGPU::V_CMPX_LE_U16_e32_vi:
    case AMDGPU::V_CMPX_LE_U32_e32_si:
    case AMDGPU::V_CMPX_LE_U32_e32_vi:
    case AMDGPU::V_CMPX_LE_U64_e32_si:
    case AMDGPU::V_CMPX_LE_U64_e32_vi:
    case AMDGPU::V_CMPX_LG_F16_e32_vi:
    case AMDGPU::V_CMPX_LG_F32_e32_si:
    case AMDGPU::V_CMPX_LG_F32_e32_vi:
    case AMDGPU::V_CMPX_LG_F64_e32_si:
    case AMDGPU::V_CMPX_LG_F64_e32_vi:
    case AMDGPU::V_CMPX_LT_F16_e32_vi:
    case AMDGPU::V_CMPX_LT_F32_e32_si:
    case AMDGPU::V_CMPX_LT_F32_e32_vi:
    case AMDGPU::V_CMPX_LT_F64_e32_si:
    case AMDGPU::V_CMPX_LT_F64_e32_vi:
    case AMDGPU::V_CMPX_LT_I16_e32_vi:
    case AMDGPU::V_CMPX_LT_I32_e32_si:
    case AMDGPU::V_CMPX_LT_I32_e32_vi:
    case AMDGPU::V_CMPX_LT_I64_e32_si:
    case AMDGPU::V_CMPX_LT_I64_e32_vi:
    case AMDGPU::V_CMPX_LT_U16_e32_vi:
    case AMDGPU::V_CMPX_LT_U32_e32_si:
    case AMDGPU::V_CMPX_LT_U32_e32_vi:
    case AMDGPU::V_CMPX_LT_U64_e32_si:
    case AMDGPU::V_CMPX_LT_U64_e32_vi:
    case AMDGPU::V_CMPX_NEQ_F16_e32_vi:
    case AMDGPU::V_CMPX_NEQ_F32_e32_si:
    case AMDGPU::V_CMPX_NEQ_F32_e32_vi:
    case AMDGPU::V_CMPX_NEQ_F64_e32_si:
    case AMDGPU::V_CMPX_NEQ_F64_e32_vi:
    case AMDGPU::V_CMPX_NE_I16_e32_vi:
    case AMDGPU::V_CMPX_NE_I32_e32_si:
    case AMDGPU::V_CMPX_NE_I32_e32_vi:
    case AMDGPU::V_CMPX_NE_I64_e32_si:
    case AMDGPU::V_CMPX_NE_I64_e32_vi:
    case AMDGPU::V_CMPX_NE_U16_e32_vi:
    case AMDGPU::V_CMPX_NE_U32_e32_si:
    case AMDGPU::V_CMPX_NE_U32_e32_vi:
    case AMDGPU::V_CMPX_NE_U64_e32_si:
    case AMDGPU::V_CMPX_NE_U64_e32_vi:
    case AMDGPU::V_CMPX_NGE_F16_e32_vi:
    case AMDGPU::V_CMPX_NGE_F32_e32_si:
    case AMDGPU::V_CMPX_NGE_F32_e32_vi:
    case AMDGPU::V_CMPX_NGE_F64_e32_si:
    case AMDGPU::V_CMPX_NGE_F64_e32_vi:
    case AMDGPU::V_CMPX_NGT_F16_e32_vi:
    case AMDGPU::V_CMPX_NGT_F32_e32_si:
    case AMDGPU::V_CMPX_NGT_F32_e32_vi:
    case AMDGPU::V_CMPX_NGT_F64_e32_si:
    case AMDGPU::V_CMPX_NGT_F64_e32_vi:
    case AMDGPU::V_CMPX_NLE_F16_e32_vi:
    case AMDGPU::V_CMPX_NLE_F32_e32_si:
    case AMDGPU::V_CMPX_NLE_F32_e32_vi:
    case AMDGPU::V_CMPX_NLE_F64_e32_si:
    case AMDGPU::V_CMPX_NLE_F64_e32_vi:
    case AMDGPU::V_CMPX_NLG_F16_e32_vi:
    case AMDGPU::V_CMPX_NLG_F32_e32_si:
    case AMDGPU::V_CMPX_NLG_F32_e32_vi:
    case AMDGPU::V_CMPX_NLG_F64_e32_si:
    case AMDGPU::V_CMPX_NLG_F64_e32_vi:
    case AMDGPU::V_CMPX_NLT_F16_e32_vi:
    case AMDGPU::V_CMPX_NLT_F32_e32_si:
    case AMDGPU::V_CMPX_NLT_F32_e32_vi:
    case AMDGPU::V_CMPX_NLT_F64_e32_si:
    case AMDGPU::V_CMPX_NLT_F64_e32_vi:
    case AMDGPU::V_CMPX_O_F16_e32_vi:
    case AMDGPU::V_CMPX_O_F32_e32_si:
    case AMDGPU::V_CMPX_O_F32_e32_vi:
    case AMDGPU::V_CMPX_O_F64_e32_si:
    case AMDGPU::V_CMPX_O_F64_e32_vi:
    case AMDGPU::V_CMPX_TRU_F16_e32_vi:
    case AMDGPU::V_CMPX_TRU_F32_e32_si:
    case AMDGPU::V_CMPX_TRU_F32_e32_vi:
    case AMDGPU::V_CMPX_TRU_F64_e32_si:
    case AMDGPU::V_CMPX_TRU_F64_e32_vi:
    case AMDGPU::V_CMPX_T_I16_e32_vi:
    case AMDGPU::V_CMPX_T_I32_e32_si:
    case AMDGPU::V_CMPX_T_I32_e32_vi:
    case AMDGPU::V_CMPX_T_I64_e32_si:
    case AMDGPU::V_CMPX_T_I64_e32_vi:
    case AMDGPU::V_CMPX_T_U16_e32_vi:
    case AMDGPU::V_CMPX_T_U32_e32_si:
    case AMDGPU::V_CMPX_T_U32_e32_vi:
    case AMDGPU::V_CMPX_T_U64_e32_si:
    case AMDGPU::V_CMPX_T_U64_e32_vi:
    case AMDGPU::V_CMPX_U_F16_e32_vi:
    case AMDGPU::V_CMPX_U_F32_e32_si:
    case AMDGPU::V_CMPX_U_F32_e32_vi:
    case AMDGPU::V_CMPX_U_F64_e32_si:
    case AMDGPU::V_CMPX_U_F64_e32_vi:
    case AMDGPU::V_CMP_CLASS_F16_e32_vi:
    case AMDGPU::V_CMP_CLASS_F32_e32_si:
    case AMDGPU::V_CMP_CLASS_F32_e32_vi:
    case AMDGPU::V_CMP_CLASS_F64_e32_si:
    case AMDGPU::V_CMP_CLASS_F64_e32_vi:
    case AMDGPU::V_CMP_EQ_F16_e32_vi:
    case AMDGPU::V_CMP_EQ_F32_e32_si:
    case AMDGPU::V_CMP_EQ_F32_e32_vi:
    case AMDGPU::V_CMP_EQ_F64_e32_si:
    case AMDGPU::V_CMP_EQ_F64_e32_vi:
    case AMDGPU::V_CMP_EQ_I16_e32_vi:
    case AMDGPU::V_CMP_EQ_I32_e32_si:
    case AMDGPU::V_CMP_EQ_I32_e32_vi:
    case AMDGPU::V_CMP_EQ_I64_e32_si:
    case AMDGPU::V_CMP_EQ_I64_e32_vi:
    case AMDGPU::V_CMP_EQ_U16_e32_vi:
    case AMDGPU::V_CMP_EQ_U32_e32_si:
    case AMDGPU::V_CMP_EQ_U32_e32_vi:
    case AMDGPU::V_CMP_EQ_U64_e32_si:
    case AMDGPU::V_CMP_EQ_U64_e32_vi:
    case AMDGPU::V_CMP_F_F16_e32_vi:
    case AMDGPU::V_CMP_F_F32_e32_si:
    case AMDGPU::V_CMP_F_F32_e32_vi:
    case AMDGPU::V_CMP_F_F64_e32_si:
    case AMDGPU::V_CMP_F_F64_e32_vi:
    case AMDGPU::V_CMP_F_I16_e32_vi:
    case AMDGPU::V_CMP_F_I32_e32_si:
    case AMDGPU::V_CMP_F_I32_e32_vi:
    case AMDGPU::V_CMP_F_I64_e32_si:
    case AMDGPU::V_CMP_F_I64_e32_vi:
    case AMDGPU::V_CMP_F_U16_e32_vi:
    case AMDGPU::V_CMP_F_U32_e32_si:
    case AMDGPU::V_CMP_F_U32_e32_vi:
    case AMDGPU::V_CMP_F_U64_e32_si:
    case AMDGPU::V_CMP_F_U64_e32_vi:
    case AMDGPU::V_CMP_GE_F16_e32_vi:
    case AMDGPU::V_CMP_GE_F32_e32_si:
    case AMDGPU::V_CMP_GE_F32_e32_vi:
    case AMDGPU::V_CMP_GE_F64_e32_si:
    case AMDGPU::V_CMP_GE_F64_e32_vi:
    case AMDGPU::V_CMP_GE_I16_e32_vi:
    case AMDGPU::V_CMP_GE_I32_e32_si:
    case AMDGPU::V_CMP_GE_I32_e32_vi:
    case AMDGPU::V_CMP_GE_I64_e32_si:
    case AMDGPU::V_CMP_GE_I64_e32_vi:
    case AMDGPU::V_CMP_GE_U16_e32_vi:
    case AMDGPU::V_CMP_GE_U32_e32_si:
    case AMDGPU::V_CMP_GE_U32_e32_vi:
    case AMDGPU::V_CMP_GE_U64_e32_si:
    case AMDGPU::V_CMP_GE_U64_e32_vi:
    case AMDGPU::V_CMP_GT_F16_e32_vi:
    case AMDGPU::V_CMP_GT_F32_e32_si:
    case AMDGPU::V_CMP_GT_F32_e32_vi:
    case AMDGPU::V_CMP_GT_F64_e32_si:
    case AMDGPU::V_CMP_GT_F64_e32_vi:
    case AMDGPU::V_CMP_GT_I16_e32_vi:
    case AMDGPU::V_CMP_GT_I32_e32_si:
    case AMDGPU::V_CMP_GT_I32_e32_vi:
    case AMDGPU::V_CMP_GT_I64_e32_si:
    case AMDGPU::V_CMP_GT_I64_e32_vi:
    case AMDGPU::V_CMP_GT_U16_e32_vi:
    case AMDGPU::V_CMP_GT_U32_e32_si:
    case AMDGPU::V_CMP_GT_U32_e32_vi:
    case AMDGPU::V_CMP_GT_U64_e32_si:
    case AMDGPU::V_CMP_GT_U64_e32_vi:
    case AMDGPU::V_CMP_LE_F16_e32_vi:
    case AMDGPU::V_CMP_LE_F32_e32_si:
    case AMDGPU::V_CMP_LE_F32_e32_vi:
    case AMDGPU::V_CMP_LE_F64_e32_si:
    case AMDGPU::V_CMP_LE_F64_e32_vi:
    case AMDGPU::V_CMP_LE_I16_e32_vi:
    case AMDGPU::V_CMP_LE_I32_e32_si:
    case AMDGPU::V_CMP_LE_I32_e32_vi:
    case AMDGPU::V_CMP_LE_I64_e32_si:
    case AMDGPU::V_CMP_LE_I64_e32_vi:
    case AMDGPU::V_CMP_LE_U16_e32_vi:
    case AMDGPU::V_CMP_LE_U32_e32_si:
    case AMDGPU::V_CMP_LE_U32_e32_vi:
    case AMDGPU::V_CMP_LE_U64_e32_si:
    case AMDGPU::V_CMP_LE_U64_e32_vi:
    case AMDGPU::V_CMP_LG_F16_e32_vi:
    case AMDGPU::V_CMP_LG_F32_e32_si:
    case AMDGPU::V_CMP_LG_F32_e32_vi:
    case AMDGPU::V_CMP_LG_F64_e32_si:
    case AMDGPU::V_CMP_LG_F64_e32_vi:
    case AMDGPU::V_CMP_LT_F16_e32_vi:
    case AMDGPU::V_CMP_LT_F32_e32_si:
    case AMDGPU::V_CMP_LT_F32_e32_vi:
    case AMDGPU::V_CMP_LT_F64_e32_si:
    case AMDGPU::V_CMP_LT_F64_e32_vi:
    case AMDGPU::V_CMP_LT_I16_e32_vi:
    case AMDGPU::V_CMP_LT_I32_e32_si:
    case AMDGPU::V_CMP_LT_I32_e32_vi:
    case AMDGPU::V_CMP_LT_I64_e32_si:
    case AMDGPU::V_CMP_LT_I64_e32_vi:
    case AMDGPU::V_CMP_LT_U16_e32_vi:
    case AMDGPU::V_CMP_LT_U32_e32_si:
    case AMDGPU::V_CMP_LT_U32_e32_vi:
    case AMDGPU::V_CMP_LT_U64_e32_si:
    case AMDGPU::V_CMP_LT_U64_e32_vi:
    case AMDGPU::V_CMP_NEQ_F16_e32_vi:
    case AMDGPU::V_CMP_NEQ_F32_e32_si:
    case AMDGPU::V_CMP_NEQ_F32_e32_vi:
    case AMDGPU::V_CMP_NEQ_F64_e32_si:
    case AMDGPU::V_CMP_NEQ_F64_e32_vi:
    case AMDGPU::V_CMP_NE_I16_e32_vi:
    case AMDGPU::V_CMP_NE_I32_e32_si:
    case AMDGPU::V_CMP_NE_I32_e32_vi:
    case AMDGPU::V_CMP_NE_I64_e32_si:
    case AMDGPU::V_CMP_NE_I64_e32_vi:
    case AMDGPU::V_CMP_NE_U16_e32_vi:
    case AMDGPU::V_CMP_NE_U32_e32_si:
    case AMDGPU::V_CMP_NE_U32_e32_vi:
    case AMDGPU::V_CMP_NE_U64_e32_si:
    case AMDGPU::V_CMP_NE_U64_e32_vi:
    case AMDGPU::V_CMP_NGE_F16_e32_vi:
    case AMDGPU::V_CMP_NGE_F32_e32_si:
    case AMDGPU::V_CMP_NGE_F32_e32_vi:
    case AMDGPU::V_CMP_NGE_F64_e32_si:
    case AMDGPU::V_CMP_NGE_F64_e32_vi:
    case AMDGPU::V_CMP_NGT_F16_e32_vi:
    case AMDGPU::V_CMP_NGT_F32_e32_si:
    case AMDGPU::V_CMP_NGT_F32_e32_vi:
    case AMDGPU::V_CMP_NGT_F64_e32_si:
    case AMDGPU::V_CMP_NGT_F64_e32_vi:
    case AMDGPU::V_CMP_NLE_F16_e32_vi:
    case AMDGPU::V_CMP_NLE_F32_e32_si:
    case AMDGPU::V_CMP_NLE_F32_e32_vi:
    case AMDGPU::V_CMP_NLE_F64_e32_si:
    case AMDGPU::V_CMP_NLE_F64_e32_vi:
    case AMDGPU::V_CMP_NLG_F16_e32_vi:
    case AMDGPU::V_CMP_NLG_F32_e32_si:
    case AMDGPU::V_CMP_NLG_F32_e32_vi:
    case AMDGPU::V_CMP_NLG_F64_e32_si:
    case AMDGPU::V_CMP_NLG_F64_e32_vi:
    case AMDGPU::V_CMP_NLT_F16_e32_vi:
    case AMDGPU::V_CMP_NLT_F32_e32_si:
    case AMDGPU::V_CMP_NLT_F32_e32_vi:
    case AMDGPU::V_CMP_NLT_F64_e32_si:
    case AMDGPU::V_CMP_NLT_F64_e32_vi:
    case AMDGPU::V_CMP_O_F16_e32_vi:
    case AMDGPU::V_CMP_O_F32_e32_si:
    case AMDGPU::V_CMP_O_F32_e32_vi:
    case AMDGPU::V_CMP_O_F64_e32_si:
    case AMDGPU::V_CMP_O_F64_e32_vi:
    case AMDGPU::V_CMP_TRU_F16_e32_vi:
    case AMDGPU::V_CMP_TRU_F32_e32_si:
    case AMDGPU::V_CMP_TRU_F32_e32_vi:
    case AMDGPU::V_CMP_TRU_F64_e32_si:
    case AMDGPU::V_CMP_TRU_F64_e32_vi:
    case AMDGPU::V_CMP_T_I16_e32_vi:
    case AMDGPU::V_CMP_T_I32_e32_si:
    case AMDGPU::V_CMP_T_I32_e32_vi:
    case AMDGPU::V_CMP_T_I64_e32_si:
    case AMDGPU::V_CMP_T_I64_e32_vi:
    case AMDGPU::V_CMP_T_U16_e32_vi:
    case AMDGPU::V_CMP_T_U32_e32_si:
    case AMDGPU::V_CMP_T_U32_e32_vi:
    case AMDGPU::V_CMP_T_U64_e32_si:
    case AMDGPU::V_CMP_T_U64_e32_vi:
    case AMDGPU::V_CMP_U_F16_e32_vi:
    case AMDGPU::V_CMP_U_F32_e32_si:
    case AMDGPU::V_CMP_U_F32_e32_vi:
    case AMDGPU::V_CMP_U_F64_e32_si:
    case AMDGPU::V_CMP_U_F64_e32_vi: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(511);
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_CVT_F32_I32_e64_si:
    case AMDGPU::V_CVT_F32_U32_e64_si:
    case AMDGPU::V_CVT_F32_UBYTE0_e64_si:
    case AMDGPU::V_CVT_F32_UBYTE1_e64_si:
    case AMDGPU::V_CVT_F32_UBYTE2_e64_si:
    case AMDGPU::V_CVT_F32_UBYTE3_e64_si:
    case AMDGPU::V_CVT_F64_I32_e64_si:
    case AMDGPU::V_CVT_F64_U32_e64_si:
    case AMDGPU::V_CVT_OFF_F32_I4_e64_si: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 11;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CVT_F16_I16_e64_vi:
    case AMDGPU::V_CVT_F16_U16_e64_vi:
    case AMDGPU::V_CVT_F32_I32_e64_vi:
    case AMDGPU::V_CVT_F32_U32_e64_vi:
    case AMDGPU::V_CVT_F32_UBYTE0_e64_vi:
    case AMDGPU::V_CVT_F32_UBYTE1_e64_vi:
    case AMDGPU::V_CVT_F32_UBYTE2_e64_vi:
    case AMDGPU::V_CVT_F32_UBYTE3_e64_vi:
    case AMDGPU::V_CVT_F64_I32_e64_vi:
    case AMDGPU::V_CVT_F64_U32_e64_vi:
    case AMDGPU::V_CVT_OFF_F32_I4_e64_vi: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CMPX_EQ_I16_e64_vi:
    case AMDGPU::V_CMPX_EQ_I32_e64_si:
    case AMDGPU::V_CMPX_EQ_I32_e64_vi:
    case AMDGPU::V_CMPX_EQ_I64_e64_si:
    case AMDGPU::V_CMPX_EQ_I64_e64_vi:
    case AMDGPU::V_CMPX_EQ_U16_e64_vi:
    case AMDGPU::V_CMPX_EQ_U32_e64_si:
    case AMDGPU::V_CMPX_EQ_U32_e64_vi:
    case AMDGPU::V_CMPX_EQ_U64_e64_si:
    case AMDGPU::V_CMPX_EQ_U64_e64_vi:
    case AMDGPU::V_CMPX_F_I16_e64_vi:
    case AMDGPU::V_CMPX_F_I32_e64_si:
    case AMDGPU::V_CMPX_F_I32_e64_vi:
    case AMDGPU::V_CMPX_F_I64_e64_si:
    case AMDGPU::V_CMPX_F_I64_e64_vi:
    case AMDGPU::V_CMPX_F_U16_e64_vi:
    case AMDGPU::V_CMPX_F_U32_e64_si:
    case AMDGPU::V_CMPX_F_U32_e64_vi:
    case AMDGPU::V_CMPX_F_U64_e64_si:
    case AMDGPU::V_CMPX_F_U64_e64_vi:
    case AMDGPU::V_CMPX_GE_I16_e64_vi:
    case AMDGPU::V_CMPX_GE_I32_e64_si:
    case AMDGPU::V_CMPX_GE_I32_e64_vi:
    case AMDGPU::V_CMPX_GE_I64_e64_si:
    case AMDGPU::V_CMPX_GE_I64_e64_vi:
    case AMDGPU::V_CMPX_GE_U16_e64_vi:
    case AMDGPU::V_CMPX_GE_U32_e64_si:
    case AMDGPU::V_CMPX_GE_U32_e64_vi:
    case AMDGPU::V_CMPX_GE_U64_e64_si:
    case AMDGPU::V_CMPX_GE_U64_e64_vi:
    case AMDGPU::V_CMPX_GT_I16_e64_vi:
    case AMDGPU::V_CMPX_GT_I32_e64_si:
    case AMDGPU::V_CMPX_GT_I32_e64_vi:
    case AMDGPU::V_CMPX_GT_I64_e64_si:
    case AMDGPU::V_CMPX_GT_I64_e64_vi:
    case AMDGPU::V_CMPX_GT_U16_e64_vi:
    case AMDGPU::V_CMPX_GT_U32_e64_si:
    case AMDGPU::V_CMPX_GT_U32_e64_vi:
    case AMDGPU::V_CMPX_GT_U64_e64_si:
    case AMDGPU::V_CMPX_GT_U64_e64_vi:
    case AMDGPU::V_CMPX_LE_I16_e64_vi:
    case AMDGPU::V_CMPX_LE_I32_e64_si:
    case AMDGPU::V_CMPX_LE_I32_e64_vi:
    case AMDGPU::V_CMPX_LE_I64_e64_si:
    case AMDGPU::V_CMPX_LE_I64_e64_vi:
    case AMDGPU::V_CMPX_LE_U16_e64_vi:
    case AMDGPU::V_CMPX_LE_U32_e64_si:
    case AMDGPU::V_CMPX_LE_U32_e64_vi:
    case AMDGPU::V_CMPX_LE_U64_e64_si:
    case AMDGPU::V_CMPX_LE_U64_e64_vi:
    case AMDGPU::V_CMPX_LT_I16_e64_vi:
    case AMDGPU::V_CMPX_LT_I32_e64_si:
    case AMDGPU::V_CMPX_LT_I32_e64_vi:
    case AMDGPU::V_CMPX_LT_I64_e64_si:
    case AMDGPU::V_CMPX_LT_I64_e64_vi:
    case AMDGPU::V_CMPX_LT_U16_e64_vi:
    case AMDGPU::V_CMPX_LT_U32_e64_si:
    case AMDGPU::V_CMPX_LT_U32_e64_vi:
    case AMDGPU::V_CMPX_LT_U64_e64_si:
    case AMDGPU::V_CMPX_LT_U64_e64_vi:
    case AMDGPU::V_CMPX_NE_I16_e64_vi:
    case AMDGPU::V_CMPX_NE_I32_e64_si:
    case AMDGPU::V_CMPX_NE_I32_e64_vi:
    case AMDGPU::V_CMPX_NE_I64_e64_si:
    case AMDGPU::V_CMPX_NE_I64_e64_vi:
    case AMDGPU::V_CMPX_NE_U16_e64_vi:
    case AMDGPU::V_CMPX_NE_U32_e64_si:
    case AMDGPU::V_CMPX_NE_U32_e64_vi:
    case AMDGPU::V_CMPX_NE_U64_e64_si:
    case AMDGPU::V_CMPX_NE_U64_e64_vi:
    case AMDGPU::V_CMPX_T_I16_e64_vi:
    case AMDGPU::V_CMPX_T_I32_e64_si:
    case AMDGPU::V_CMPX_T_I32_e64_vi:
    case AMDGPU::V_CMPX_T_I64_e64_si:
    case AMDGPU::V_CMPX_T_I64_e64_vi:
    case AMDGPU::V_CMPX_T_U16_e64_vi:
    case AMDGPU::V_CMPX_T_U32_e64_si:
    case AMDGPU::V_CMPX_T_U32_e64_vi:
    case AMDGPU::V_CMPX_T_U64_e64_si:
    case AMDGPU::V_CMPX_T_U64_e64_vi:
    case AMDGPU::V_CMP_EQ_I16_e64_vi:
    case AMDGPU::V_CMP_EQ_I32_e64_si:
    case AMDGPU::V_CMP_EQ_I32_e64_vi:
    case AMDGPU::V_CMP_EQ_I64_e64_si:
    case AMDGPU::V_CMP_EQ_I64_e64_vi:
    case AMDGPU::V_CMP_EQ_U16_e64_vi:
    case AMDGPU::V_CMP_EQ_U32_e64_si:
    case AMDGPU::V_CMP_EQ_U32_e64_vi:
    case AMDGPU::V_CMP_EQ_U64_e64_si:
    case AMDGPU::V_CMP_EQ_U64_e64_vi:
    case AMDGPU::V_CMP_F_I16_e64_vi:
    case AMDGPU::V_CMP_F_I32_e64_si:
    case AMDGPU::V_CMP_F_I32_e64_vi:
    case AMDGPU::V_CMP_F_I64_e64_si:
    case AMDGPU::V_CMP_F_I64_e64_vi:
    case AMDGPU::V_CMP_F_U16_e64_vi:
    case AMDGPU::V_CMP_F_U32_e64_si:
    case AMDGPU::V_CMP_F_U32_e64_vi:
    case AMDGPU::V_CMP_F_U64_e64_si:
    case AMDGPU::V_CMP_F_U64_e64_vi:
    case AMDGPU::V_CMP_GE_I16_e64_vi:
    case AMDGPU::V_CMP_GE_I32_e64_si:
    case AMDGPU::V_CMP_GE_I32_e64_vi:
    case AMDGPU::V_CMP_GE_I64_e64_si:
    case AMDGPU::V_CMP_GE_I64_e64_vi:
    case AMDGPU::V_CMP_GE_U16_e64_vi:
    case AMDGPU::V_CMP_GE_U32_e64_si:
    case AMDGPU::V_CMP_GE_U32_e64_vi:
    case AMDGPU::V_CMP_GE_U64_e64_si:
    case AMDGPU::V_CMP_GE_U64_e64_vi:
    case AMDGPU::V_CMP_GT_I16_e64_vi:
    case AMDGPU::V_CMP_GT_I32_e64_si:
    case AMDGPU::V_CMP_GT_I32_e64_vi:
    case AMDGPU::V_CMP_GT_I64_e64_si:
    case AMDGPU::V_CMP_GT_I64_e64_vi:
    case AMDGPU::V_CMP_GT_U16_e64_vi:
    case AMDGPU::V_CMP_GT_U32_e64_si:
    case AMDGPU::V_CMP_GT_U32_e64_vi:
    case AMDGPU::V_CMP_GT_U64_e64_si:
    case AMDGPU::V_CMP_GT_U64_e64_vi:
    case AMDGPU::V_CMP_LE_I16_e64_vi:
    case AMDGPU::V_CMP_LE_I32_e64_si:
    case AMDGPU::V_CMP_LE_I32_e64_vi:
    case AMDGPU::V_CMP_LE_I64_e64_si:
    case AMDGPU::V_CMP_LE_I64_e64_vi:
    case AMDGPU::V_CMP_LE_U16_e64_vi:
    case AMDGPU::V_CMP_LE_U32_e64_si:
    case AMDGPU::V_CMP_LE_U32_e64_vi:
    case AMDGPU::V_CMP_LE_U64_e64_si:
    case AMDGPU::V_CMP_LE_U64_e64_vi:
    case AMDGPU::V_CMP_LT_I16_e64_vi:
    case AMDGPU::V_CMP_LT_I32_e64_si:
    case AMDGPU::V_CMP_LT_I32_e64_vi:
    case AMDGPU::V_CMP_LT_I64_e64_si:
    case AMDGPU::V_CMP_LT_I64_e64_vi:
    case AMDGPU::V_CMP_LT_U16_e64_vi:
    case AMDGPU::V_CMP_LT_U32_e64_si:
    case AMDGPU::V_CMP_LT_U32_e64_vi:
    case AMDGPU::V_CMP_LT_U64_e64_si:
    case AMDGPU::V_CMP_LT_U64_e64_vi:
    case AMDGPU::V_CMP_NE_I16_e64_vi:
    case AMDGPU::V_CMP_NE_I32_e64_si:
    case AMDGPU::V_CMP_NE_I32_e64_vi:
    case AMDGPU::V_CMP_NE_I64_e64_si:
    case AMDGPU::V_CMP_NE_I64_e64_vi:
    case AMDGPU::V_CMP_NE_U16_e64_vi:
    case AMDGPU::V_CMP_NE_U32_e64_si:
    case AMDGPU::V_CMP_NE_U32_e64_vi:
    case AMDGPU::V_CMP_NE_U64_e64_si:
    case AMDGPU::V_CMP_NE_U64_e64_vi:
    case AMDGPU::V_CMP_T_I16_e64_vi:
    case AMDGPU::V_CMP_T_I32_e64_si:
    case AMDGPU::V_CMP_T_I32_e64_vi:
    case AMDGPU::V_CMP_T_I64_e64_si:
    case AMDGPU::V_CMP_T_I64_e64_vi:
    case AMDGPU::V_CMP_T_U16_e64_vi:
    case AMDGPU::V_CMP_T_U32_e64_si:
    case AMDGPU::V_CMP_T_U32_e64_vi:
    case AMDGPU::V_CMP_T_U64_e64_si:
    case AMDGPU::V_CMP_T_U64_e64_vi: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_MAD_I32_I24_si:
    case AMDGPU::V_MAD_U32_U24_si:
    case AMDGPU::V_MQSAD_PK_U16_U8_si:
    case AMDGPU::V_MQSAD_U32_U8_ci:
    case AMDGPU::V_MSAD_U8_si:
    case AMDGPU::V_QSAD_PK_U16_U8_ci:
    case AMDGPU::V_SAD_HI_U8_si:
    case AMDGPU::V_SAD_U16_si:
    case AMDGPU::V_SAD_U32_si:
    case AMDGPU::V_SAD_U8_si: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 11;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_MAD_I16_vi:
    case AMDGPU::V_MAD_I32_I24_vi:
    case AMDGPU::V_MAD_LEGACY_I16_gfx9:
    case AMDGPU::V_MAD_LEGACY_U16_gfx9:
    case AMDGPU::V_MAD_U16_vi:
    case AMDGPU::V_MAD_U32_U24_vi:
    case AMDGPU::V_MQSAD_PK_U16_U8_vi:
    case AMDGPU::V_MQSAD_U32_U8_vi:
    case AMDGPU::V_MSAD_U8_vi:
    case AMDGPU::V_QSAD_PK_U16_U8_vi:
    case AMDGPU::V_SAD_HI_U8_vi:
    case AMDGPU::V_SAD_U16_vi:
    case AMDGPU::V_SAD_U32_vi:
    case AMDGPU::V_SAD_U8_vi: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_ADD3_U32_vi:
    case AMDGPU::V_ADD_LSHL_U32_vi:
    case AMDGPU::V_ALIGNBIT_B32_si:
    case AMDGPU::V_ALIGNBIT_B32_vi:
    case AMDGPU::V_ALIGNBYTE_B32_si:
    case AMDGPU::V_ALIGNBYTE_B32_vi:
    case AMDGPU::V_AND_OR_B32_vi:
    case AMDGPU::V_BFE_I32_si:
    case AMDGPU::V_BFE_I32_vi:
    case AMDGPU::V_BFE_U32_si:
    case AMDGPU::V_BFE_U32_vi:
    case AMDGPU::V_BFI_B32_si:
    case AMDGPU::V_BFI_B32_vi:
    case AMDGPU::V_CNDMASK_B32_e64_si:
    case AMDGPU::V_CNDMASK_B32_e64_vi:
    case AMDGPU::V_LERP_U8_si:
    case AMDGPU::V_LERP_U8_vi:
    case AMDGPU::V_LSHL_ADD_U32_vi:
    case AMDGPU::V_LSHL_OR_B32_vi:
    case AMDGPU::V_MAX3_I32_si:
    case AMDGPU::V_MAX3_I32_vi:
    case AMDGPU::V_MAX3_U32_si:
    case AMDGPU::V_MAX3_U32_vi:
    case AMDGPU::V_MED3_I32_si:
    case AMDGPU::V_MED3_I32_vi:
    case AMDGPU::V_MED3_U32_si:
    case AMDGPU::V_MED3_U32_vi:
    case AMDGPU::V_MIN3_I32_si:
    case AMDGPU::V_MIN3_I32_vi:
    case AMDGPU::V_MIN3_U32_si:
    case AMDGPU::V_MIN3_U32_vi:
    case AMDGPU::V_OR3_B32_vi:
    case AMDGPU::V_PERM_B32_vi:
    case AMDGPU::V_XAD_U32_vi: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_ADD_I32_gfx9_gfx9:
    case AMDGPU::V_ADD_U16_e64_vi:
    case AMDGPU::V_ADD_U32_e64_gfx9:
    case AMDGPU::V_AND_B32_e64_si:
    case AMDGPU::V_AND_B32_e64_vi:
    case AMDGPU::V_ASHRREV_I16_e64_vi:
    case AMDGPU::V_ASHRREV_I32_e64_si:
    case AMDGPU::V_ASHRREV_I32_e64_vi:
    case AMDGPU::V_ASHRREV_I64_vi:
    case AMDGPU::V_ASHR_I32_e64_si:
    case AMDGPU::V_ASHR_I64_si:
    case AMDGPU::V_BCNT_U32_B32_e64_si:
    case AMDGPU::V_BCNT_U32_B32_e64_vi:
    case AMDGPU::V_BFM_B32_e64_si:
    case AMDGPU::V_BFM_B32_e64_vi:
    case AMDGPU::V_CVT_PK_I16_I32_e64_si:
    case AMDGPU::V_CVT_PK_I16_I32_e64_vi:
    case AMDGPU::V_CVT_PK_U16_U32_e64_si:
    case AMDGPU::V_CVT_PK_U16_U32_e64_vi:
    case AMDGPU::V_LSHLREV_B16_e64_vi:
    case AMDGPU::V_LSHLREV_B32_e64_si:
    case AMDGPU::V_LSHLREV_B32_e64_vi:
    case AMDGPU::V_LSHLREV_B64_vi:
    case AMDGPU::V_LSHL_B32_e64_si:
    case AMDGPU::V_LSHL_B64_si:
    case AMDGPU::V_LSHRREV_B16_e64_vi:
    case AMDGPU::V_LSHRREV_B32_e64_si:
    case AMDGPU::V_LSHRREV_B32_e64_vi:
    case AMDGPU::V_LSHRREV_B64_vi:
    case AMDGPU::V_LSHR_B32_e64_si:
    case AMDGPU::V_LSHR_B64_si:
    case AMDGPU::V_MAX_I16_e64_vi:
    case AMDGPU::V_MAX_I32_e64_si:
    case AMDGPU::V_MAX_I32_e64_vi:
    case AMDGPU::V_MAX_U16_e64_vi:
    case AMDGPU::V_MAX_U32_e64_si:
    case AMDGPU::V_MAX_U32_e64_vi:
    case AMDGPU::V_MBCNT_HI_U32_B32_e64_si:
    case AMDGPU::V_MBCNT_HI_U32_B32_e64_vi:
    case AMDGPU::V_MBCNT_LO_U32_B32_e64_si:
    case AMDGPU::V_MBCNT_LO_U32_B32_e64_vi:
    case AMDGPU::V_MIN_I16_e64_vi:
    case AMDGPU::V_MIN_I32_e64_si:
    case AMDGPU::V_MIN_I32_e64_vi:
    case AMDGPU::V_MIN_U16_e64_vi:
    case AMDGPU::V_MIN_U32_e64_si:
    case AMDGPU::V_MIN_U32_e64_vi:
    case AMDGPU::V_MUL_HI_I32_I24_e64_si:
    case AMDGPU::V_MUL_HI_I32_I24_e64_vi:
    case AMDGPU::V_MUL_HI_I32_si:
    case AMDGPU::V_MUL_HI_I32_vi:
    case AMDGPU::V_MUL_HI_U32_U24_e64_si:
    case AMDGPU::V_MUL_HI_U32_U24_e64_vi:
    case AMDGPU::V_MUL_HI_U32_si:
    case AMDGPU::V_MUL_HI_U32_vi:
    case AMDGPU::V_MUL_I32_I24_e64_si:
    case AMDGPU::V_MUL_I32_I24_e64_vi:
    case AMDGPU::V_MUL_LO_I32_si:
    case AMDGPU::V_MUL_LO_I32_vi:
    case AMDGPU::V_MUL_LO_U16_e64_vi:
    case AMDGPU::V_MUL_LO_U32_si:
    case AMDGPU::V_MUL_LO_U32_vi:
    case AMDGPU::V_MUL_U32_U24_e64_si:
    case AMDGPU::V_MUL_U32_U24_e64_vi:
    case AMDGPU::V_OR_B32_e64_si:
    case AMDGPU::V_OR_B32_e64_vi:
    case AMDGPU::V_READLANE_B32_vi:
    case AMDGPU::V_SUBREV_U16_e64_vi:
    case AMDGPU::V_SUBREV_U32_e64_gfx9:
    case AMDGPU::V_SUB_I32_gfx9_gfx9:
    case AMDGPU::V_SUB_U16_e64_vi:
    case AMDGPU::V_SUB_U32_e64_gfx9:
    case AMDGPU::V_WRITELANE_B32_vi:
    case AMDGPU::V_XNOR_B32_e64_vi:
    case AMDGPU::V_XOR_B32_e64_si:
    case AMDGPU::V_XOR_B32_e64_vi: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_BFREV_B32_e64_si:
    case AMDGPU::V_BFREV_B32_e64_vi:
    case AMDGPU::V_FFBH_I32_e64_si:
    case AMDGPU::V_FFBH_I32_e64_vi:
    case AMDGPU::V_FFBH_U32_e64_si:
    case AMDGPU::V_FFBH_U32_e64_vi:
    case AMDGPU::V_FFBL_B32_e64_si:
    case AMDGPU::V_FFBL_B32_e64_vi:
    case AMDGPU::V_MOVRELD_B32_e64_si:
    case AMDGPU::V_MOVRELD_B32_e64_vi:
    case AMDGPU::V_MOVRELSD_B32_e64_si:
    case AMDGPU::V_MOVRELSD_B32_e64_vi:
    case AMDGPU::V_MOVRELS_B32_e64_si:
    case AMDGPU::V_MOVRELS_B32_e64_vi:
    case AMDGPU::V_MOV_B32_e64_si:
    case AMDGPU::V_MOV_B32_e64_vi:
    case AMDGPU::V_MOV_FED_B32_e64_si:
    case AMDGPU::V_MOV_FED_B32_e64_vi:
    case AMDGPU::V_NOT_B32_e64_si:
    case AMDGPU::V_NOT_B32_e64_vi:
    case AMDGPU::V_SAT_PK_U8_I16_e64_vi:
    case AMDGPU::V_SCREEN_PARTITION_4SE_B32_e64_vi: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_INTERP_MOV_F32_e64_vi: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: attrchan
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 38;
      // op: attr
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(63)) << 32;
      break;
    }
    case AMDGPU::V_BFREV_B32_dpp_vi:
    case AMDGPU::V_CVT_F16_I16_dpp_vi:
    case AMDGPU::V_CVT_F16_U16_dpp_vi:
    case AMDGPU::V_CVT_F32_I32_dpp_vi:
    case AMDGPU::V_CVT_F32_U32_dpp_vi:
    case AMDGPU::V_CVT_F32_UBYTE0_dpp_vi:
    case AMDGPU::V_CVT_F32_UBYTE1_dpp_vi:
    case AMDGPU::V_CVT_F32_UBYTE2_dpp_vi:
    case AMDGPU::V_CVT_F32_UBYTE3_dpp_vi:
    case AMDGPU::V_CVT_OFF_F32_I4_dpp_vi:
    case AMDGPU::V_FFBH_I32_dpp_vi:
    case AMDGPU::V_FFBH_U32_dpp_vi:
    case AMDGPU::V_FFBL_B32_dpp_vi:
    case AMDGPU::V_MOV_B32_dpp_vi:
    case AMDGPU::V_MOV_FED_B32_dpp_vi:
    case AMDGPU::V_NOT_B32_dpp_vi:
    case AMDGPU::V_SAT_PK_U8_I16_dpp_vi:
    case AMDGPU::V_SCREEN_PARTITION_4SE_B32_dpp_gfx9: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: dpp_ctrl
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 40;
      // op: bound_ctrl
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 51;
      // op: bank_mask
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 56;
      // op: row_mask
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 60;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      break;
    }
    case AMDGPU::V_ADDC_CO_U32_dpp_gfx9:
    case AMDGPU::V_ADDC_U32_dpp_vi:
    case AMDGPU::V_ADD_CO_U32_dpp_gfx9:
    case AMDGPU::V_ADD_U16_dpp_vi:
    case AMDGPU::V_ADD_U32_dpp_gfx9:
    case AMDGPU::V_ADD_U32_dpp_vi:
    case AMDGPU::V_AND_B32_dpp_vi:
    case AMDGPU::V_ASHRREV_I16_dpp_vi:
    case AMDGPU::V_ASHRREV_I32_dpp_vi:
    case AMDGPU::V_CNDMASK_B32_dpp_vi:
    case AMDGPU::V_LSHLREV_B16_dpp_vi:
    case AMDGPU::V_LSHLREV_B32_dpp_vi:
    case AMDGPU::V_LSHRREV_B16_dpp_vi:
    case AMDGPU::V_LSHRREV_B32_dpp_vi:
    case AMDGPU::V_MAX_I16_dpp_vi:
    case AMDGPU::V_MAX_I32_dpp_vi:
    case AMDGPU::V_MAX_U16_dpp_vi:
    case AMDGPU::V_MAX_U32_dpp_vi:
    case AMDGPU::V_MIN_I16_dpp_vi:
    case AMDGPU::V_MIN_I32_dpp_vi:
    case AMDGPU::V_MIN_U16_dpp_vi:
    case AMDGPU::V_MIN_U32_dpp_vi:
    case AMDGPU::V_MUL_HI_I32_I24_dpp_vi:
    case AMDGPU::V_MUL_HI_U32_U24_dpp_vi:
    case AMDGPU::V_MUL_I32_I24_dpp_vi:
    case AMDGPU::V_MUL_LO_U16_dpp_vi:
    case AMDGPU::V_MUL_U32_U24_dpp_vi:
    case AMDGPU::V_OR_B32_dpp_vi:
    case AMDGPU::V_SUBBREV_CO_U32_dpp_gfx9:
    case AMDGPU::V_SUBBREV_U32_dpp_vi:
    case AMDGPU::V_SUBB_CO_U32_dpp_gfx9:
    case AMDGPU::V_SUBB_U32_dpp_vi:
    case AMDGPU::V_SUBREV_CO_U32_dpp_gfx9:
    case AMDGPU::V_SUBREV_U16_dpp_vi:
    case AMDGPU::V_SUBREV_U32_dpp_gfx9:
    case AMDGPU::V_SUBREV_U32_dpp_vi:
    case AMDGPU::V_SUB_CO_U32_dpp_gfx9:
    case AMDGPU::V_SUB_U16_dpp_vi:
    case AMDGPU::V_SUB_U32_dpp_gfx9:
    case AMDGPU::V_SUB_U32_dpp_vi:
    case AMDGPU::V_XNOR_B32_dpp_vi:
    case AMDGPU::V_XOR_B32_dpp_vi: {
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: dpp_ctrl
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 40;
      // op: bound_ctrl
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 51;
      // op: bank_mask
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 56;
      // op: row_mask
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 60;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_FMAC_F32_sdwa_vi:
    case AMDGPU::V_MAC_F16_sdwa_vi:
    case AMDGPU::V_MAC_F32_sdwa_vi: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 60;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_BFREV_B32_sdwa_vi:
    case AMDGPU::V_FFBH_I32_sdwa_vi:
    case AMDGPU::V_FFBH_U32_sdwa_vi:
    case AMDGPU::V_FFBL_B32_sdwa_vi:
    case AMDGPU::V_MOV_B32_sdwa_vi:
    case AMDGPU::V_MOV_FED_B32_sdwa_vi:
    case AMDGPU::V_NOT_B32_sdwa_vi:
    case AMDGPU::V_SAT_PK_U8_I16_sdwa_vi: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 51;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      break;
    }
    case AMDGPU::V_CMPX_EQ_I16_sdwa_vi:
    case AMDGPU::V_CMPX_EQ_I32_sdwa_vi:
    case AMDGPU::V_CMPX_EQ_I64_sdwa_vi:
    case AMDGPU::V_CMPX_EQ_U16_sdwa_vi:
    case AMDGPU::V_CMPX_EQ_U32_sdwa_vi:
    case AMDGPU::V_CMPX_EQ_U64_sdwa_vi:
    case AMDGPU::V_CMPX_F_I16_sdwa_vi:
    case AMDGPU::V_CMPX_F_I32_sdwa_vi:
    case AMDGPU::V_CMPX_F_I64_sdwa_vi:
    case AMDGPU::V_CMPX_F_U16_sdwa_vi:
    case AMDGPU::V_CMPX_F_U32_sdwa_vi:
    case AMDGPU::V_CMPX_F_U64_sdwa_vi:
    case AMDGPU::V_CMPX_GE_I16_sdwa_vi:
    case AMDGPU::V_CMPX_GE_I32_sdwa_vi:
    case AMDGPU::V_CMPX_GE_I64_sdwa_vi:
    case AMDGPU::V_CMPX_GE_U16_sdwa_vi:
    case AMDGPU::V_CMPX_GE_U32_sdwa_vi:
    case AMDGPU::V_CMPX_GE_U64_sdwa_vi:
    case AMDGPU::V_CMPX_GT_I16_sdwa_vi:
    case AMDGPU::V_CMPX_GT_I32_sdwa_vi:
    case AMDGPU::V_CMPX_GT_I64_sdwa_vi:
    case AMDGPU::V_CMPX_GT_U16_sdwa_vi:
    case AMDGPU::V_CMPX_GT_U32_sdwa_vi:
    case AMDGPU::V_CMPX_GT_U64_sdwa_vi:
    case AMDGPU::V_CMPX_LE_I16_sdwa_vi:
    case AMDGPU::V_CMPX_LE_I32_sdwa_vi:
    case AMDGPU::V_CMPX_LE_I64_sdwa_vi:
    case AMDGPU::V_CMPX_LE_U16_sdwa_vi:
    case AMDGPU::V_CMPX_LE_U32_sdwa_vi:
    case AMDGPU::V_CMPX_LE_U64_sdwa_vi:
    case AMDGPU::V_CMPX_LT_I16_sdwa_vi:
    case AMDGPU::V_CMPX_LT_I32_sdwa_vi:
    case AMDGPU::V_CMPX_LT_I64_sdwa_vi:
    case AMDGPU::V_CMPX_LT_U16_sdwa_vi:
    case AMDGPU::V_CMPX_LT_U32_sdwa_vi:
    case AMDGPU::V_CMPX_LT_U64_sdwa_vi:
    case AMDGPU::V_CMPX_NE_I16_sdwa_vi:
    case AMDGPU::V_CMPX_NE_I32_sdwa_vi:
    case AMDGPU::V_CMPX_NE_I64_sdwa_vi:
    case AMDGPU::V_CMPX_NE_U16_sdwa_vi:
    case AMDGPU::V_CMPX_NE_U32_sdwa_vi:
    case AMDGPU::V_CMPX_NE_U64_sdwa_vi:
    case AMDGPU::V_CMPX_T_I16_sdwa_vi:
    case AMDGPU::V_CMPX_T_I32_sdwa_vi:
    case AMDGPU::V_CMPX_T_I64_sdwa_vi:
    case AMDGPU::V_CMPX_T_U16_sdwa_vi:
    case AMDGPU::V_CMPX_T_U32_sdwa_vi:
    case AMDGPU::V_CMPX_T_U64_sdwa_vi:
    case AMDGPU::V_CMP_EQ_I16_sdwa_vi:
    case AMDGPU::V_CMP_EQ_I32_sdwa_vi:
    case AMDGPU::V_CMP_EQ_I64_sdwa_vi:
    case AMDGPU::V_CMP_EQ_U16_sdwa_vi:
    case AMDGPU::V_CMP_EQ_U32_sdwa_vi:
    case AMDGPU::V_CMP_EQ_U64_sdwa_vi:
    case AMDGPU::V_CMP_F_I16_sdwa_vi:
    case AMDGPU::V_CMP_F_I32_sdwa_vi:
    case AMDGPU::V_CMP_F_I64_sdwa_vi:
    case AMDGPU::V_CMP_F_U16_sdwa_vi:
    case AMDGPU::V_CMP_F_U32_sdwa_vi:
    case AMDGPU::V_CMP_F_U64_sdwa_vi:
    case AMDGPU::V_CMP_GE_I16_sdwa_vi:
    case AMDGPU::V_CMP_GE_I32_sdwa_vi:
    case AMDGPU::V_CMP_GE_I64_sdwa_vi:
    case AMDGPU::V_CMP_GE_U16_sdwa_vi:
    case AMDGPU::V_CMP_GE_U32_sdwa_vi:
    case AMDGPU::V_CMP_GE_U64_sdwa_vi:
    case AMDGPU::V_CMP_GT_I16_sdwa_vi:
    case AMDGPU::V_CMP_GT_I32_sdwa_vi:
    case AMDGPU::V_CMP_GT_I64_sdwa_vi:
    case AMDGPU::V_CMP_GT_U16_sdwa_vi:
    case AMDGPU::V_CMP_GT_U32_sdwa_vi:
    case AMDGPU::V_CMP_GT_U64_sdwa_vi:
    case AMDGPU::V_CMP_LE_I16_sdwa_vi:
    case AMDGPU::V_CMP_LE_I32_sdwa_vi:
    case AMDGPU::V_CMP_LE_I64_sdwa_vi:
    case AMDGPU::V_CMP_LE_U16_sdwa_vi:
    case AMDGPU::V_CMP_LE_U32_sdwa_vi:
    case AMDGPU::V_CMP_LE_U64_sdwa_vi:
    case AMDGPU::V_CMP_LT_I16_sdwa_vi:
    case AMDGPU::V_CMP_LT_I32_sdwa_vi:
    case AMDGPU::V_CMP_LT_I64_sdwa_vi:
    case AMDGPU::V_CMP_LT_U16_sdwa_vi:
    case AMDGPU::V_CMP_LT_U32_sdwa_vi:
    case AMDGPU::V_CMP_LT_U64_sdwa_vi:
    case AMDGPU::V_CMP_NE_I16_sdwa_vi:
    case AMDGPU::V_CMP_NE_I32_sdwa_vi:
    case AMDGPU::V_CMP_NE_I64_sdwa_vi:
    case AMDGPU::V_CMP_NE_U16_sdwa_vi:
    case AMDGPU::V_CMP_NE_U32_sdwa_vi:
    case AMDGPU::V_CMP_NE_U64_sdwa_vi:
    case AMDGPU::V_CMP_T_I16_sdwa_vi:
    case AMDGPU::V_CMP_T_I32_sdwa_vi:
    case AMDGPU::V_CMP_T_I64_sdwa_vi:
    case AMDGPU::V_CMP_T_U16_sdwa_vi:
    case AMDGPU::V_CMP_T_U32_sdwa_vi:
    case AMDGPU::V_CMP_T_U64_sdwa_vi: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 51;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 59;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_CVT_FLR_I32_F32_sdwa_vi:
    case AMDGPU::V_CVT_I16_F16_sdwa_vi:
    case AMDGPU::V_CVT_I32_F32_sdwa_vi:
    case AMDGPU::V_CVT_I32_F64_sdwa_vi:
    case AMDGPU::V_CVT_NORM_I16_F16_sdwa_vi:
    case AMDGPU::V_CVT_NORM_U16_F16_sdwa_vi:
    case AMDGPU::V_CVT_RPI_I32_F32_sdwa_vi:
    case AMDGPU::V_CVT_U16_F16_sdwa_vi:
    case AMDGPU::V_CVT_U32_F32_sdwa_vi:
    case AMDGPU::V_CVT_U32_F64_sdwa_vi:
    case AMDGPU::V_FREXP_EXP_I16_F16_sdwa_vi:
    case AMDGPU::V_FREXP_EXP_I32_F32_sdwa_vi:
    case AMDGPU::V_FREXP_EXP_I32_F64_sdwa_vi: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      break;
    }
    case AMDGPU::V_CMPX_CLASS_F16_sdwa_vi:
    case AMDGPU::V_CMPX_CLASS_F32_sdwa_vi:
    case AMDGPU::V_CMPX_CLASS_F64_sdwa_vi:
    case AMDGPU::V_CMP_CLASS_F16_sdwa_vi:
    case AMDGPU::V_CMP_CLASS_F32_sdwa_vi:
    case AMDGPU::V_CMP_CLASS_F64_sdwa_vi: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 59;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_CMPX_EQ_F16_sdwa_vi:
    case AMDGPU::V_CMPX_EQ_F32_sdwa_vi:
    case AMDGPU::V_CMPX_EQ_F64_sdwa_vi:
    case AMDGPU::V_CMPX_F_F16_sdwa_vi:
    case AMDGPU::V_CMPX_F_F32_sdwa_vi:
    case AMDGPU::V_CMPX_F_F64_sdwa_vi:
    case AMDGPU::V_CMPX_GE_F16_sdwa_vi:
    case AMDGPU::V_CMPX_GE_F32_sdwa_vi:
    case AMDGPU::V_CMPX_GE_F64_sdwa_vi:
    case AMDGPU::V_CMPX_GT_F16_sdwa_vi:
    case AMDGPU::V_CMPX_GT_F32_sdwa_vi:
    case AMDGPU::V_CMPX_GT_F64_sdwa_vi:
    case AMDGPU::V_CMPX_LE_F16_sdwa_vi:
    case AMDGPU::V_CMPX_LE_F32_sdwa_vi:
    case AMDGPU::V_CMPX_LE_F64_sdwa_vi:
    case AMDGPU::V_CMPX_LG_F16_sdwa_vi:
    case AMDGPU::V_CMPX_LG_F32_sdwa_vi:
    case AMDGPU::V_CMPX_LG_F64_sdwa_vi:
    case AMDGPU::V_CMPX_LT_F16_sdwa_vi:
    case AMDGPU::V_CMPX_LT_F32_sdwa_vi:
    case AMDGPU::V_CMPX_LT_F64_sdwa_vi:
    case AMDGPU::V_CMPX_NEQ_F16_sdwa_vi:
    case AMDGPU::V_CMPX_NEQ_F32_sdwa_vi:
    case AMDGPU::V_CMPX_NEQ_F64_sdwa_vi:
    case AMDGPU::V_CMPX_NGE_F16_sdwa_vi:
    case AMDGPU::V_CMPX_NGE_F32_sdwa_vi:
    case AMDGPU::V_CMPX_NGE_F64_sdwa_vi:
    case AMDGPU::V_CMPX_NGT_F16_sdwa_vi:
    case AMDGPU::V_CMPX_NGT_F32_sdwa_vi:
    case AMDGPU::V_CMPX_NGT_F64_sdwa_vi:
    case AMDGPU::V_CMPX_NLE_F16_sdwa_vi:
    case AMDGPU::V_CMPX_NLE_F32_sdwa_vi:
    case AMDGPU::V_CMPX_NLE_F64_sdwa_vi:
    case AMDGPU::V_CMPX_NLG_F16_sdwa_vi:
    case AMDGPU::V_CMPX_NLG_F32_sdwa_vi:
    case AMDGPU::V_CMPX_NLG_F64_sdwa_vi:
    case AMDGPU::V_CMPX_NLT_F16_sdwa_vi:
    case AMDGPU::V_CMPX_NLT_F32_sdwa_vi:
    case AMDGPU::V_CMPX_NLT_F64_sdwa_vi:
    case AMDGPU::V_CMPX_O_F16_sdwa_vi:
    case AMDGPU::V_CMPX_O_F32_sdwa_vi:
    case AMDGPU::V_CMPX_O_F64_sdwa_vi:
    case AMDGPU::V_CMPX_TRU_F16_sdwa_vi:
    case AMDGPU::V_CMPX_TRU_F32_sdwa_vi:
    case AMDGPU::V_CMPX_TRU_F64_sdwa_vi:
    case AMDGPU::V_CMPX_U_F16_sdwa_vi:
    case AMDGPU::V_CMPX_U_F32_sdwa_vi:
    case AMDGPU::V_CMPX_U_F64_sdwa_vi:
    case AMDGPU::V_CMP_EQ_F16_sdwa_vi:
    case AMDGPU::V_CMP_EQ_F32_sdwa_vi:
    case AMDGPU::V_CMP_EQ_F64_sdwa_vi:
    case AMDGPU::V_CMP_F_F16_sdwa_vi:
    case AMDGPU::V_CMP_F_F32_sdwa_vi:
    case AMDGPU::V_CMP_F_F64_sdwa_vi:
    case AMDGPU::V_CMP_GE_F16_sdwa_vi:
    case AMDGPU::V_CMP_GE_F32_sdwa_vi:
    case AMDGPU::V_CMP_GE_F64_sdwa_vi:
    case AMDGPU::V_CMP_GT_F16_sdwa_vi:
    case AMDGPU::V_CMP_GT_F32_sdwa_vi:
    case AMDGPU::V_CMP_GT_F64_sdwa_vi:
    case AMDGPU::V_CMP_LE_F16_sdwa_vi:
    case AMDGPU::V_CMP_LE_F32_sdwa_vi:
    case AMDGPU::V_CMP_LE_F64_sdwa_vi:
    case AMDGPU::V_CMP_LG_F16_sdwa_vi:
    case AMDGPU::V_CMP_LG_F32_sdwa_vi:
    case AMDGPU::V_CMP_LG_F64_sdwa_vi:
    case AMDGPU::V_CMP_LT_F16_sdwa_vi:
    case AMDGPU::V_CMP_LT_F32_sdwa_vi:
    case AMDGPU::V_CMP_LT_F64_sdwa_vi:
    case AMDGPU::V_CMP_NEQ_F16_sdwa_vi:
    case AMDGPU::V_CMP_NEQ_F32_sdwa_vi:
    case AMDGPU::V_CMP_NEQ_F64_sdwa_vi:
    case AMDGPU::V_CMP_NGE_F16_sdwa_vi:
    case AMDGPU::V_CMP_NGE_F32_sdwa_vi:
    case AMDGPU::V_CMP_NGE_F64_sdwa_vi:
    case AMDGPU::V_CMP_NGT_F16_sdwa_vi:
    case AMDGPU::V_CMP_NGT_F32_sdwa_vi:
    case AMDGPU::V_CMP_NGT_F64_sdwa_vi:
    case AMDGPU::V_CMP_NLE_F16_sdwa_vi:
    case AMDGPU::V_CMP_NLE_F32_sdwa_vi:
    case AMDGPU::V_CMP_NLE_F64_sdwa_vi:
    case AMDGPU::V_CMP_NLG_F16_sdwa_vi:
    case AMDGPU::V_CMP_NLG_F32_sdwa_vi:
    case AMDGPU::V_CMP_NLG_F64_sdwa_vi:
    case AMDGPU::V_CMP_NLT_F16_sdwa_vi:
    case AMDGPU::V_CMP_NLT_F32_sdwa_vi:
    case AMDGPU::V_CMP_NLT_F64_sdwa_vi:
    case AMDGPU::V_CMP_O_F16_sdwa_vi:
    case AMDGPU::V_CMP_O_F32_sdwa_vi:
    case AMDGPU::V_CMP_O_F64_sdwa_vi:
    case AMDGPU::V_CMP_TRU_F16_sdwa_vi:
    case AMDGPU::V_CMP_TRU_F32_sdwa_vi:
    case AMDGPU::V_CMP_TRU_F64_sdwa_vi:
    case AMDGPU::V_CMP_U_F16_sdwa_vi:
    case AMDGPU::V_CMP_U_F32_sdwa_vi:
    case AMDGPU::V_CMP_U_F64_sdwa_vi: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 60;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_CVT_F16_I16_sdwa_vi:
    case AMDGPU::V_CVT_F16_U16_sdwa_vi:
    case AMDGPU::V_CVT_F32_I32_sdwa_vi:
    case AMDGPU::V_CVT_F32_U32_sdwa_vi:
    case AMDGPU::V_CVT_F32_UBYTE0_sdwa_vi:
    case AMDGPU::V_CVT_F32_UBYTE1_sdwa_vi:
    case AMDGPU::V_CVT_F32_UBYTE2_sdwa_vi:
    case AMDGPU::V_CVT_F32_UBYTE3_sdwa_vi:
    case AMDGPU::V_CVT_F64_I32_sdwa_vi:
    case AMDGPU::V_CVT_F64_U32_sdwa_vi:
    case AMDGPU::V_CVT_OFF_F32_I4_sdwa_vi: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 51;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      break;
    }
    case AMDGPU::V_CEIL_F16_sdwa_vi:
    case AMDGPU::V_CEIL_F32_sdwa_vi:
    case AMDGPU::V_CEIL_F64_sdwa_vi:
    case AMDGPU::V_COS_F16_sdwa_vi:
    case AMDGPU::V_COS_F32_sdwa_vi:
    case AMDGPU::V_CVT_F16_F32_sdwa_vi:
    case AMDGPU::V_CVT_F32_F16_sdwa_vi:
    case AMDGPU::V_CVT_F32_F64_sdwa_vi:
    case AMDGPU::V_CVT_F64_F32_sdwa_vi:
    case AMDGPU::V_EXP_F16_sdwa_vi:
    case AMDGPU::V_EXP_F32_sdwa_vi:
    case AMDGPU::V_EXP_LEGACY_F32_sdwa_vi:
    case AMDGPU::V_FLOOR_F16_sdwa_vi:
    case AMDGPU::V_FLOOR_F32_sdwa_vi:
    case AMDGPU::V_FLOOR_F64_sdwa_vi:
    case AMDGPU::V_FRACT_F16_sdwa_vi:
    case AMDGPU::V_FRACT_F32_sdwa_vi:
    case AMDGPU::V_FRACT_F64_sdwa_vi:
    case AMDGPU::V_FREXP_MANT_F16_sdwa_vi:
    case AMDGPU::V_FREXP_MANT_F32_sdwa_vi:
    case AMDGPU::V_FREXP_MANT_F64_sdwa_vi:
    case AMDGPU::V_LOG_F16_sdwa_vi:
    case AMDGPU::V_LOG_F32_sdwa_vi:
    case AMDGPU::V_LOG_LEGACY_F32_sdwa_vi:
    case AMDGPU::V_RCP_F16_sdwa_vi:
    case AMDGPU::V_RCP_F32_sdwa_vi:
    case AMDGPU::V_RCP_F64_sdwa_vi:
    case AMDGPU::V_RCP_IFLAG_F32_sdwa_vi:
    case AMDGPU::V_RNDNE_F16_sdwa_vi:
    case AMDGPU::V_RNDNE_F32_sdwa_vi:
    case AMDGPU::V_RNDNE_F64_sdwa_vi:
    case AMDGPU::V_RSQ_F16_sdwa_vi:
    case AMDGPU::V_RSQ_F32_sdwa_vi:
    case AMDGPU::V_RSQ_F64_sdwa_vi:
    case AMDGPU::V_SIN_F16_sdwa_vi:
    case AMDGPU::V_SIN_F32_sdwa_vi:
    case AMDGPU::V_SQRT_F16_sdwa_vi:
    case AMDGPU::V_SQRT_F32_sdwa_vi:
    case AMDGPU::V_SQRT_F64_sdwa_vi:
    case AMDGPU::V_TRUNC_F16_sdwa_vi:
    case AMDGPU::V_TRUNC_F32_sdwa_vi:
    case AMDGPU::V_TRUNC_F64_sdwa_vi: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      break;
    }
    case AMDGPU::V_ADDC_U32_sdwa_vi:
    case AMDGPU::V_ADD_U16_sdwa_vi:
    case AMDGPU::V_ADD_U32_sdwa_vi:
    case AMDGPU::V_AND_B32_sdwa_vi:
    case AMDGPU::V_ASHRREV_I16_sdwa_vi:
    case AMDGPU::V_ASHRREV_I32_sdwa_vi:
    case AMDGPU::V_CNDMASK_B32_sdwa_vi:
    case AMDGPU::V_LSHLREV_B16_sdwa_vi:
    case AMDGPU::V_LSHLREV_B32_sdwa_vi:
    case AMDGPU::V_LSHRREV_B16_sdwa_vi:
    case AMDGPU::V_LSHRREV_B32_sdwa_vi:
    case AMDGPU::V_MAX_I16_sdwa_vi:
    case AMDGPU::V_MAX_I32_sdwa_vi:
    case AMDGPU::V_MAX_U16_sdwa_vi:
    case AMDGPU::V_MAX_U32_sdwa_vi:
    case AMDGPU::V_MIN_I16_sdwa_vi:
    case AMDGPU::V_MIN_I32_sdwa_vi:
    case AMDGPU::V_MIN_U16_sdwa_vi:
    case AMDGPU::V_MIN_U32_sdwa_vi:
    case AMDGPU::V_MUL_HI_I32_I24_sdwa_vi:
    case AMDGPU::V_MUL_HI_U32_U24_sdwa_vi:
    case AMDGPU::V_MUL_I32_I24_sdwa_vi:
    case AMDGPU::V_MUL_LO_U16_sdwa_vi:
    case AMDGPU::V_MUL_U32_U24_sdwa_vi:
    case AMDGPU::V_OR_B32_sdwa_vi:
    case AMDGPU::V_SUBBREV_U32_sdwa_vi:
    case AMDGPU::V_SUBB_U32_sdwa_vi:
    case AMDGPU::V_SUBREV_U16_sdwa_vi:
    case AMDGPU::V_SUBREV_U32_sdwa_vi:
    case AMDGPU::V_SUB_U16_sdwa_vi:
    case AMDGPU::V_SUB_U32_sdwa_vi:
    case AMDGPU::V_XNOR_B32_sdwa_vi:
    case AMDGPU::V_XOR_B32_sdwa_vi: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 51;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 59;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_LDEXP_F16_sdwa_vi: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 59;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_ADD_F16_sdwa_vi:
    case AMDGPU::V_ADD_F32_sdwa_vi:
    case AMDGPU::V_MAX_F16_sdwa_vi:
    case AMDGPU::V_MAX_F32_sdwa_vi:
    case AMDGPU::V_MIN_F16_sdwa_vi:
    case AMDGPU::V_MIN_F32_sdwa_vi:
    case AMDGPU::V_MUL_F16_sdwa_vi:
    case AMDGPU::V_MUL_F32_sdwa_vi:
    case AMDGPU::V_MUL_LEGACY_F32_sdwa_vi:
    case AMDGPU::V_SUBREV_F16_sdwa_vi:
    case AMDGPU::V_SUBREV_F32_sdwa_vi:
    case AMDGPU::V_SUB_F16_sdwa_vi:
    case AMDGPU::V_SUB_F32_sdwa_vi: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 60;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_FMAC_F32_sdwa_gfx9:
    case AMDGPU::V_MAC_F16_sdwa_gfx9:
    case AMDGPU::V_MAC_F32_sdwa_gfx9: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 47;
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 60;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 46;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 55;
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_BFREV_B32_sdwa_gfx9:
    case AMDGPU::V_FFBH_I32_sdwa_gfx9:
    case AMDGPU::V_FFBH_U32_sdwa_gfx9:
    case AMDGPU::V_FFBL_B32_sdwa_gfx9:
    case AMDGPU::V_MOV_B32_sdwa_gfx9:
    case AMDGPU::V_MOV_FED_B32_sdwa_gfx9:
    case AMDGPU::V_NOT_B32_sdwa_gfx9:
    case AMDGPU::V_SAT_PK_U8_I16_sdwa_gfx9:
    case AMDGPU::V_SCREEN_PARTITION_4SE_B32_sdwa_gfx9: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 47;
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 51;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      break;
    }
    case AMDGPU::V_CMPX_EQ_I16_sdwa_gfx9:
    case AMDGPU::V_CMPX_EQ_I32_sdwa_gfx9:
    case AMDGPU::V_CMPX_EQ_I64_sdwa_gfx9:
    case AMDGPU::V_CMPX_EQ_U16_sdwa_gfx9:
    case AMDGPU::V_CMPX_EQ_U32_sdwa_gfx9:
    case AMDGPU::V_CMPX_EQ_U64_sdwa_gfx9:
    case AMDGPU::V_CMPX_F_I16_sdwa_gfx9:
    case AMDGPU::V_CMPX_F_I32_sdwa_gfx9:
    case AMDGPU::V_CMPX_F_I64_sdwa_gfx9:
    case AMDGPU::V_CMPX_F_U16_sdwa_gfx9:
    case AMDGPU::V_CMPX_F_U32_sdwa_gfx9:
    case AMDGPU::V_CMPX_F_U64_sdwa_gfx9:
    case AMDGPU::V_CMPX_GE_I16_sdwa_gfx9:
    case AMDGPU::V_CMPX_GE_I32_sdwa_gfx9:
    case AMDGPU::V_CMPX_GE_I64_sdwa_gfx9:
    case AMDGPU::V_CMPX_GE_U16_sdwa_gfx9:
    case AMDGPU::V_CMPX_GE_U32_sdwa_gfx9:
    case AMDGPU::V_CMPX_GE_U64_sdwa_gfx9:
    case AMDGPU::V_CMPX_GT_I16_sdwa_gfx9:
    case AMDGPU::V_CMPX_GT_I32_sdwa_gfx9:
    case AMDGPU::V_CMPX_GT_I64_sdwa_gfx9:
    case AMDGPU::V_CMPX_GT_U16_sdwa_gfx9:
    case AMDGPU::V_CMPX_GT_U32_sdwa_gfx9:
    case AMDGPU::V_CMPX_GT_U64_sdwa_gfx9:
    case AMDGPU::V_CMPX_LE_I16_sdwa_gfx9:
    case AMDGPU::V_CMPX_LE_I32_sdwa_gfx9:
    case AMDGPU::V_CMPX_LE_I64_sdwa_gfx9:
    case AMDGPU::V_CMPX_LE_U16_sdwa_gfx9:
    case AMDGPU::V_CMPX_LE_U32_sdwa_gfx9:
    case AMDGPU::V_CMPX_LE_U64_sdwa_gfx9:
    case AMDGPU::V_CMPX_LT_I16_sdwa_gfx9:
    case AMDGPU::V_CMPX_LT_I32_sdwa_gfx9:
    case AMDGPU::V_CMPX_LT_I64_sdwa_gfx9:
    case AMDGPU::V_CMPX_LT_U16_sdwa_gfx9:
    case AMDGPU::V_CMPX_LT_U32_sdwa_gfx9:
    case AMDGPU::V_CMPX_LT_U64_sdwa_gfx9:
    case AMDGPU::V_CMPX_NE_I16_sdwa_gfx9:
    case AMDGPU::V_CMPX_NE_I32_sdwa_gfx9:
    case AMDGPU::V_CMPX_NE_I64_sdwa_gfx9:
    case AMDGPU::V_CMPX_NE_U16_sdwa_gfx9:
    case AMDGPU::V_CMPX_NE_U32_sdwa_gfx9:
    case AMDGPU::V_CMPX_NE_U64_sdwa_gfx9:
    case AMDGPU::V_CMPX_T_I16_sdwa_gfx9:
    case AMDGPU::V_CMPX_T_I32_sdwa_gfx9:
    case AMDGPU::V_CMPX_T_I64_sdwa_gfx9:
    case AMDGPU::V_CMPX_T_U16_sdwa_gfx9:
    case AMDGPU::V_CMPX_T_U32_sdwa_gfx9:
    case AMDGPU::V_CMPX_T_U64_sdwa_gfx9:
    case AMDGPU::V_CMP_EQ_I16_sdwa_gfx9:
    case AMDGPU::V_CMP_EQ_I32_sdwa_gfx9:
    case AMDGPU::V_CMP_EQ_I64_sdwa_gfx9:
    case AMDGPU::V_CMP_EQ_U16_sdwa_gfx9:
    case AMDGPU::V_CMP_EQ_U32_sdwa_gfx9:
    case AMDGPU::V_CMP_EQ_U64_sdwa_gfx9:
    case AMDGPU::V_CMP_F_I16_sdwa_gfx9:
    case AMDGPU::V_CMP_F_I32_sdwa_gfx9:
    case AMDGPU::V_CMP_F_I64_sdwa_gfx9:
    case AMDGPU::V_CMP_F_U16_sdwa_gfx9:
    case AMDGPU::V_CMP_F_U32_sdwa_gfx9:
    case AMDGPU::V_CMP_F_U64_sdwa_gfx9:
    case AMDGPU::V_CMP_GE_I16_sdwa_gfx9:
    case AMDGPU::V_CMP_GE_I32_sdwa_gfx9:
    case AMDGPU::V_CMP_GE_I64_sdwa_gfx9:
    case AMDGPU::V_CMP_GE_U16_sdwa_gfx9:
    case AMDGPU::V_CMP_GE_U32_sdwa_gfx9:
    case AMDGPU::V_CMP_GE_U64_sdwa_gfx9:
    case AMDGPU::V_CMP_GT_I16_sdwa_gfx9:
    case AMDGPU::V_CMP_GT_I32_sdwa_gfx9:
    case AMDGPU::V_CMP_GT_I64_sdwa_gfx9:
    case AMDGPU::V_CMP_GT_U16_sdwa_gfx9:
    case AMDGPU::V_CMP_GT_U32_sdwa_gfx9:
    case AMDGPU::V_CMP_GT_U64_sdwa_gfx9:
    case AMDGPU::V_CMP_LE_I16_sdwa_gfx9:
    case AMDGPU::V_CMP_LE_I32_sdwa_gfx9:
    case AMDGPU::V_CMP_LE_I64_sdwa_gfx9:
    case AMDGPU::V_CMP_LE_U16_sdwa_gfx9:
    case AMDGPU::V_CMP_LE_U32_sdwa_gfx9:
    case AMDGPU::V_CMP_LE_U64_sdwa_gfx9:
    case AMDGPU::V_CMP_LT_I16_sdwa_gfx9:
    case AMDGPU::V_CMP_LT_I32_sdwa_gfx9:
    case AMDGPU::V_CMP_LT_I64_sdwa_gfx9:
    case AMDGPU::V_CMP_LT_U16_sdwa_gfx9:
    case AMDGPU::V_CMP_LT_U32_sdwa_gfx9:
    case AMDGPU::V_CMP_LT_U64_sdwa_gfx9:
    case AMDGPU::V_CMP_NE_I16_sdwa_gfx9:
    case AMDGPU::V_CMP_NE_I32_sdwa_gfx9:
    case AMDGPU::V_CMP_NE_I64_sdwa_gfx9:
    case AMDGPU::V_CMP_NE_U16_sdwa_gfx9:
    case AMDGPU::V_CMP_NE_U32_sdwa_gfx9:
    case AMDGPU::V_CMP_NE_U64_sdwa_gfx9:
    case AMDGPU::V_CMP_T_I16_sdwa_gfx9:
    case AMDGPU::V_CMP_T_I32_sdwa_gfx9:
    case AMDGPU::V_CMP_T_I64_sdwa_gfx9:
    case AMDGPU::V_CMP_T_U16_sdwa_gfx9:
    case AMDGPU::V_CMP_T_U32_sdwa_gfx9:
    case AMDGPU::V_CMP_T_U64_sdwa_gfx9: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 47;
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 51;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 59;
      // op: sdst
      op = getSDWAVopcDstEncoding(MI, 0, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 55;
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_CVT_FLR_I32_F32_sdwa_gfx9:
    case AMDGPU::V_CVT_I16_F16_sdwa_gfx9:
    case AMDGPU::V_CVT_I32_F32_sdwa_gfx9:
    case AMDGPU::V_CVT_I32_F64_sdwa_gfx9:
    case AMDGPU::V_CVT_NORM_I16_F16_sdwa_gfx9:
    case AMDGPU::V_CVT_NORM_U16_F16_sdwa_gfx9:
    case AMDGPU::V_CVT_RPI_I32_F32_sdwa_gfx9:
    case AMDGPU::V_CVT_U16_F16_sdwa_gfx9:
    case AMDGPU::V_CVT_U32_F32_sdwa_gfx9:
    case AMDGPU::V_CVT_U32_F64_sdwa_gfx9:
    case AMDGPU::V_FREXP_EXP_I16_F16_sdwa_gfx9:
    case AMDGPU::V_FREXP_EXP_I32_F32_sdwa_gfx9:
    case AMDGPU::V_FREXP_EXP_I32_F64_sdwa_gfx9: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 47;
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      break;
    }
    case AMDGPU::V_CMPX_CLASS_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_CLASS_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_CLASS_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_CLASS_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_CLASS_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_CLASS_F64_sdwa_gfx9: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 47;
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 59;
      // op: sdst
      op = getSDWAVopcDstEncoding(MI, 0, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 55;
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_CMPX_EQ_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_EQ_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_EQ_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_F_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_F_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_F_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_GE_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_GE_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_GE_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_GT_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_GT_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_GT_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_LE_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_LE_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_LE_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_LG_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_LG_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_LG_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_LT_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_LT_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_LT_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_NEQ_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_NEQ_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_NEQ_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_NGE_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_NGE_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_NGE_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_NGT_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_NGT_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_NGT_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_NLE_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_NLE_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_NLE_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_NLG_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_NLG_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_NLG_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_NLT_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_NLT_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_NLT_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_O_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_O_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_O_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_TRU_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_TRU_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_TRU_F64_sdwa_gfx9:
    case AMDGPU::V_CMPX_U_F16_sdwa_gfx9:
    case AMDGPU::V_CMPX_U_F32_sdwa_gfx9:
    case AMDGPU::V_CMPX_U_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_EQ_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_EQ_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_EQ_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_F_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_F_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_F_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_GE_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_GE_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_GE_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_GT_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_GT_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_GT_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_LE_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_LE_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_LE_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_LG_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_LG_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_LG_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_LT_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_LT_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_LT_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_NEQ_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_NEQ_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_NEQ_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_NGE_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_NGE_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_NGE_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_NGT_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_NGT_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_NGT_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_NLE_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_NLE_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_NLE_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_NLG_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_NLG_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_NLG_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_NLT_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_NLT_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_NLT_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_O_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_O_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_O_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_TRU_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_TRU_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_TRU_F64_sdwa_gfx9:
    case AMDGPU::V_CMP_U_F16_sdwa_gfx9:
    case AMDGPU::V_CMP_U_F32_sdwa_gfx9:
    case AMDGPU::V_CMP_U_F64_sdwa_gfx9: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 47;
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 60;
      // op: sdst
      op = getSDWAVopcDstEncoding(MI, 0, Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 55;
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_CVT_F16_I16_sdwa_gfx9:
    case AMDGPU::V_CVT_F16_U16_sdwa_gfx9:
    case AMDGPU::V_CVT_F32_I32_sdwa_gfx9:
    case AMDGPU::V_CVT_F32_U32_sdwa_gfx9:
    case AMDGPU::V_CVT_F32_UBYTE0_sdwa_gfx9:
    case AMDGPU::V_CVT_F32_UBYTE1_sdwa_gfx9:
    case AMDGPU::V_CVT_F32_UBYTE2_sdwa_gfx9:
    case AMDGPU::V_CVT_F32_UBYTE3_sdwa_gfx9:
    case AMDGPU::V_CVT_F64_I32_sdwa_gfx9:
    case AMDGPU::V_CVT_F64_U32_sdwa_gfx9:
    case AMDGPU::V_CVT_OFF_F32_I4_sdwa_gfx9: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 47;
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 51;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 46;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      break;
    }
    case AMDGPU::V_CEIL_F16_sdwa_gfx9:
    case AMDGPU::V_CEIL_F32_sdwa_gfx9:
    case AMDGPU::V_CEIL_F64_sdwa_gfx9:
    case AMDGPU::V_COS_F16_sdwa_gfx9:
    case AMDGPU::V_COS_F32_sdwa_gfx9:
    case AMDGPU::V_CVT_F16_F32_sdwa_gfx9:
    case AMDGPU::V_CVT_F32_F16_sdwa_gfx9:
    case AMDGPU::V_CVT_F32_F64_sdwa_gfx9:
    case AMDGPU::V_CVT_F64_F32_sdwa_gfx9:
    case AMDGPU::V_EXP_F16_sdwa_gfx9:
    case AMDGPU::V_EXP_F32_sdwa_gfx9:
    case AMDGPU::V_EXP_LEGACY_F32_sdwa_gfx9:
    case AMDGPU::V_FLOOR_F16_sdwa_gfx9:
    case AMDGPU::V_FLOOR_F32_sdwa_gfx9:
    case AMDGPU::V_FLOOR_F64_sdwa_gfx9:
    case AMDGPU::V_FRACT_F16_sdwa_gfx9:
    case AMDGPU::V_FRACT_F32_sdwa_gfx9:
    case AMDGPU::V_FRACT_F64_sdwa_gfx9:
    case AMDGPU::V_FREXP_MANT_F16_sdwa_gfx9:
    case AMDGPU::V_FREXP_MANT_F32_sdwa_gfx9:
    case AMDGPU::V_FREXP_MANT_F64_sdwa_gfx9:
    case AMDGPU::V_LOG_F16_sdwa_gfx9:
    case AMDGPU::V_LOG_F32_sdwa_gfx9:
    case AMDGPU::V_LOG_LEGACY_F32_sdwa_gfx9:
    case AMDGPU::V_RCP_F16_sdwa_gfx9:
    case AMDGPU::V_RCP_F32_sdwa_gfx9:
    case AMDGPU::V_RCP_F64_sdwa_gfx9:
    case AMDGPU::V_RCP_IFLAG_F32_sdwa_gfx9:
    case AMDGPU::V_RNDNE_F16_sdwa_gfx9:
    case AMDGPU::V_RNDNE_F32_sdwa_gfx9:
    case AMDGPU::V_RNDNE_F64_sdwa_gfx9:
    case AMDGPU::V_RSQ_F16_sdwa_gfx9:
    case AMDGPU::V_RSQ_F32_sdwa_gfx9:
    case AMDGPU::V_RSQ_F64_sdwa_gfx9:
    case AMDGPU::V_SIN_F16_sdwa_gfx9:
    case AMDGPU::V_SIN_F32_sdwa_gfx9:
    case AMDGPU::V_SQRT_F16_sdwa_gfx9:
    case AMDGPU::V_SQRT_F32_sdwa_gfx9:
    case AMDGPU::V_SQRT_F64_sdwa_gfx9:
    case AMDGPU::V_TRUNC_F16_sdwa_gfx9:
    case AMDGPU::V_TRUNC_F32_sdwa_gfx9:
    case AMDGPU::V_TRUNC_F64_sdwa_gfx9: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 47;
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 46;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      break;
    }
    case AMDGPU::V_ADDC_CO_U32_sdwa_gfx9:
    case AMDGPU::V_ADD_CO_U32_sdwa_gfx9:
    case AMDGPU::V_ADD_U16_sdwa_gfx9:
    case AMDGPU::V_ADD_U32_sdwa_gfx9:
    case AMDGPU::V_AND_B32_sdwa_gfx9:
    case AMDGPU::V_ASHRREV_I16_sdwa_gfx9:
    case AMDGPU::V_ASHRREV_I32_sdwa_gfx9:
    case AMDGPU::V_CNDMASK_B32_sdwa_gfx9:
    case AMDGPU::V_LSHLREV_B16_sdwa_gfx9:
    case AMDGPU::V_LSHLREV_B32_sdwa_gfx9:
    case AMDGPU::V_LSHRREV_B16_sdwa_gfx9:
    case AMDGPU::V_LSHRREV_B32_sdwa_gfx9:
    case AMDGPU::V_MAX_I16_sdwa_gfx9:
    case AMDGPU::V_MAX_I32_sdwa_gfx9:
    case AMDGPU::V_MAX_U16_sdwa_gfx9:
    case AMDGPU::V_MAX_U32_sdwa_gfx9:
    case AMDGPU::V_MIN_I16_sdwa_gfx9:
    case AMDGPU::V_MIN_I32_sdwa_gfx9:
    case AMDGPU::V_MIN_U16_sdwa_gfx9:
    case AMDGPU::V_MIN_U32_sdwa_gfx9:
    case AMDGPU::V_MUL_HI_I32_I24_sdwa_gfx9:
    case AMDGPU::V_MUL_HI_U32_U24_sdwa_gfx9:
    case AMDGPU::V_MUL_I32_I24_sdwa_gfx9:
    case AMDGPU::V_MUL_LO_U16_sdwa_gfx9:
    case AMDGPU::V_MUL_U32_U24_sdwa_gfx9:
    case AMDGPU::V_OR_B32_sdwa_gfx9:
    case AMDGPU::V_SUBBREV_CO_U32_sdwa_gfx9:
    case AMDGPU::V_SUBB_CO_U32_sdwa_gfx9:
    case AMDGPU::V_SUBREV_CO_U32_sdwa_gfx9:
    case AMDGPU::V_SUBREV_U16_sdwa_gfx9:
    case AMDGPU::V_SUBREV_U32_sdwa_gfx9:
    case AMDGPU::V_SUB_CO_U32_sdwa_gfx9:
    case AMDGPU::V_SUB_U16_sdwa_gfx9:
    case AMDGPU::V_SUB_U32_sdwa_gfx9:
    case AMDGPU::V_XNOR_B32_sdwa_gfx9:
    case AMDGPU::V_XOR_B32_sdwa_gfx9: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 47;
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 51;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 59;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 55;
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_LDEXP_F16_sdwa_gfx9: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 47;
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 59;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 46;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 55;
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_ADD_F16_sdwa_gfx9:
    case AMDGPU::V_ADD_F32_sdwa_gfx9:
    case AMDGPU::V_MAX_F16_sdwa_gfx9:
    case AMDGPU::V_MAX_F32_sdwa_gfx9:
    case AMDGPU::V_MIN_F16_sdwa_gfx9:
    case AMDGPU::V_MIN_F32_sdwa_gfx9:
    case AMDGPU::V_MUL_F16_sdwa_gfx9:
    case AMDGPU::V_MUL_F32_sdwa_gfx9:
    case AMDGPU::V_MUL_LEGACY_F32_sdwa_gfx9:
    case AMDGPU::V_SUBREV_F16_sdwa_gfx9:
    case AMDGPU::V_SUBREV_F32_sdwa_gfx9:
    case AMDGPU::V_SUB_F16_sdwa_gfx9:
    case AMDGPU::V_SUB_F32_sdwa_gfx9: {
      // op: src0
      op = getSDWASrcEncoding(MI, 2, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 47;
      Value |= (op & UINT64_C(255)) << 32;
      // op: src0_sel
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 48;
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: src1_sel
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 56;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 60;
      // op: dst_sel
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(7)) << 40;
      // op: dst_unused
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 43;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 45;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 46;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src1
      op = getSDWASrcEncoding(MI, 4, Fixups, STI);
      Value |= (op & UINT64_C(256)) << 55;
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_CEIL_F32_e64_si:
    case AMDGPU::V_CEIL_F64_e64_ci:
    case AMDGPU::V_COS_F32_e64_si:
    case AMDGPU::V_CVT_F16_F32_e64_si:
    case AMDGPU::V_CVT_F32_F16_e64_si:
    case AMDGPU::V_CVT_F32_F64_e64_si:
    case AMDGPU::V_CVT_F64_F32_e64_si:
    case AMDGPU::V_EXP_F32_e64_si:
    case AMDGPU::V_EXP_LEGACY_F32_e64_ci:
    case AMDGPU::V_FLOOR_F32_e64_si:
    case AMDGPU::V_FLOOR_F64_e64_ci:
    case AMDGPU::V_FRACT_F32_e64_si:
    case AMDGPU::V_FRACT_F64_e64_si:
    case AMDGPU::V_FREXP_MANT_F32_e64_si:
    case AMDGPU::V_FREXP_MANT_F64_e64_si:
    case AMDGPU::V_LOG_CLAMP_F32_e64_si:
    case AMDGPU::V_LOG_F32_e64_si:
    case AMDGPU::V_LOG_LEGACY_F32_e64_ci:
    case AMDGPU::V_RCP_CLAMP_F32_e64_si:
    case AMDGPU::V_RCP_CLAMP_F64_e64_si:
    case AMDGPU::V_RCP_F32_e64_si:
    case AMDGPU::V_RCP_F64_e64_si:
    case AMDGPU::V_RCP_IFLAG_F32_e64_si:
    case AMDGPU::V_RCP_LEGACY_F32_e64_si:
    case AMDGPU::V_RNDNE_F32_e64_si:
    case AMDGPU::V_RNDNE_F64_e64_ci:
    case AMDGPU::V_RSQ_CLAMP_F32_e64_si:
    case AMDGPU::V_RSQ_CLAMP_F64_e64_si:
    case AMDGPU::V_RSQ_F32_e64_si:
    case AMDGPU::V_RSQ_F64_e64_si:
    case AMDGPU::V_RSQ_LEGACY_F32_e64_si:
    case AMDGPU::V_SIN_F32_e64_si:
    case AMDGPU::V_SQRT_F32_e64_si:
    case AMDGPU::V_SQRT_F64_e64_si:
    case AMDGPU::V_TRUNC_F32_e64_si:
    case AMDGPU::V_TRUNC_F64_e64_ci: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 11;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CVT_FLR_I32_F32_e64_si:
    case AMDGPU::V_CVT_I32_F32_e64_si:
    case AMDGPU::V_CVT_I32_F64_e64_si:
    case AMDGPU::V_CVT_RPI_I32_F32_e64_si:
    case AMDGPU::V_CVT_U32_F32_e64_si:
    case AMDGPU::V_CVT_U32_F64_e64_si:
    case AMDGPU::V_FREXP_EXP_I32_F32_e64_si:
    case AMDGPU::V_FREXP_EXP_I32_F64_e64_si: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 11;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CEIL_F16_e64_vi:
    case AMDGPU::V_CEIL_F32_e64_vi:
    case AMDGPU::V_CEIL_F64_e64_vi:
    case AMDGPU::V_COS_F16_e64_vi:
    case AMDGPU::V_COS_F32_e64_vi:
    case AMDGPU::V_CVT_F16_F32_e64_vi:
    case AMDGPU::V_CVT_F32_F16_e64_vi:
    case AMDGPU::V_CVT_F32_F64_e64_vi:
    case AMDGPU::V_CVT_F64_F32_e64_vi:
    case AMDGPU::V_EXP_F16_e64_vi:
    case AMDGPU::V_EXP_F32_e64_vi:
    case AMDGPU::V_EXP_LEGACY_F32_e64_vi:
    case AMDGPU::V_FLOOR_F16_e64_vi:
    case AMDGPU::V_FLOOR_F32_e64_vi:
    case AMDGPU::V_FLOOR_F64_e64_vi:
    case AMDGPU::V_FRACT_F16_e64_vi:
    case AMDGPU::V_FRACT_F32_e64_vi:
    case AMDGPU::V_FRACT_F64_e64_vi:
    case AMDGPU::V_FREXP_MANT_F16_e64_vi:
    case AMDGPU::V_FREXP_MANT_F32_e64_vi:
    case AMDGPU::V_FREXP_MANT_F64_e64_vi:
    case AMDGPU::V_LOG_F16_e64_vi:
    case AMDGPU::V_LOG_F32_e64_vi:
    case AMDGPU::V_LOG_LEGACY_F32_e64_vi:
    case AMDGPU::V_RCP_F16_e64_vi:
    case AMDGPU::V_RCP_F32_e64_vi:
    case AMDGPU::V_RCP_F64_e64_vi:
    case AMDGPU::V_RCP_IFLAG_F32_e64_vi:
    case AMDGPU::V_RNDNE_F16_e64_vi:
    case AMDGPU::V_RNDNE_F32_e64_vi:
    case AMDGPU::V_RNDNE_F64_e64_vi:
    case AMDGPU::V_RSQ_F16_e64_vi:
    case AMDGPU::V_RSQ_F32_e64_vi:
    case AMDGPU::V_RSQ_F64_e64_vi:
    case AMDGPU::V_SIN_F16_e64_vi:
    case AMDGPU::V_SIN_F32_e64_vi:
    case AMDGPU::V_SQRT_F16_e64_vi:
    case AMDGPU::V_SQRT_F32_e64_vi:
    case AMDGPU::V_SQRT_F64_e64_vi:
    case AMDGPU::V_TRUNC_F16_e64_vi:
    case AMDGPU::V_TRUNC_F32_e64_vi:
    case AMDGPU::V_TRUNC_F64_e64_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CVT_FLR_I32_F32_e64_vi:
    case AMDGPU::V_CVT_I16_F16_e64_vi:
    case AMDGPU::V_CVT_I32_F32_e64_vi:
    case AMDGPU::V_CVT_I32_F64_e64_vi:
    case AMDGPU::V_CVT_NORM_I16_F16_e64_vi:
    case AMDGPU::V_CVT_NORM_U16_F16_e64_vi:
    case AMDGPU::V_CVT_RPI_I32_F32_e64_vi:
    case AMDGPU::V_CVT_U16_F16_e64_vi:
    case AMDGPU::V_CVT_U32_F32_e64_vi:
    case AMDGPU::V_CVT_U32_F64_e64_vi:
    case AMDGPU::V_FREXP_EXP_I16_F16_e64_vi:
    case AMDGPU::V_FREXP_EXP_I32_F32_e64_vi:
    case AMDGPU::V_FREXP_EXP_I32_F64_e64_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CMPX_CLASS_F16_e64_vi:
    case AMDGPU::V_CMPX_CLASS_F32_e64_si:
    case AMDGPU::V_CMPX_CLASS_F32_e64_vi:
    case AMDGPU::V_CMPX_CLASS_F64_e64_si:
    case AMDGPU::V_CMPX_CLASS_F64_e64_vi:
    case AMDGPU::V_CMP_CLASS_F16_e64_vi:
    case AMDGPU::V_CMP_CLASS_F32_e64_si:
    case AMDGPU::V_CMP_CLASS_F32_e64_vi:
    case AMDGPU::V_CMP_CLASS_F64_e64_si:
    case AMDGPU::V_CMP_CLASS_F64_e64_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_ADD_F32_e64_si:
    case AMDGPU::V_ADD_F64_si:
    case AMDGPU::V_CVT_PKRTZ_F16_F32_e64_si:
    case AMDGPU::V_LDEXP_F32_e64_si:
    case AMDGPU::V_LDEXP_F64_si:
    case AMDGPU::V_MAC_LEGACY_F32_e64_si:
    case AMDGPU::V_MAX_F32_e64_si:
    case AMDGPU::V_MAX_F64_si:
    case AMDGPU::V_MAX_LEGACY_F32_e64_si:
    case AMDGPU::V_MIN_F32_e64_si:
    case AMDGPU::V_MIN_F64_si:
    case AMDGPU::V_MIN_LEGACY_F32_e64_si:
    case AMDGPU::V_MUL_F32_e64_si:
    case AMDGPU::V_MUL_F64_si:
    case AMDGPU::V_MUL_LEGACY_F32_e64_si:
    case AMDGPU::V_SUBREV_F32_e64_si:
    case AMDGPU::V_SUB_F32_e64_si:
    case AMDGPU::V_TRIG_PREOP_F64_si: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 11;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CMPSX_EQ_F32_e64_si:
    case AMDGPU::V_CMPSX_EQ_F64_e64_si:
    case AMDGPU::V_CMPSX_F_F32_e64_si:
    case AMDGPU::V_CMPSX_F_F64_e64_si:
    case AMDGPU::V_CMPSX_GE_F32_e64_si:
    case AMDGPU::V_CMPSX_GE_F64_e64_si:
    case AMDGPU::V_CMPSX_GT_F32_e64_si:
    case AMDGPU::V_CMPSX_GT_F64_e64_si:
    case AMDGPU::V_CMPSX_LE_F32_e64_si:
    case AMDGPU::V_CMPSX_LE_F64_e64_si:
    case AMDGPU::V_CMPSX_LG_F32_e64_si:
    case AMDGPU::V_CMPSX_LG_F64_e64_si:
    case AMDGPU::V_CMPSX_LT_F32_e64_si:
    case AMDGPU::V_CMPSX_LT_F64_e64_si:
    case AMDGPU::V_CMPSX_NEQ_F32_e64_si:
    case AMDGPU::V_CMPSX_NEQ_F64_e64_si:
    case AMDGPU::V_CMPSX_NGE_F32_e64_si:
    case AMDGPU::V_CMPSX_NGE_F64_e64_si:
    case AMDGPU::V_CMPSX_NGT_F32_e64_si:
    case AMDGPU::V_CMPSX_NGT_F64_e64_si:
    case AMDGPU::V_CMPSX_NLE_F32_e64_si:
    case AMDGPU::V_CMPSX_NLE_F64_e64_si:
    case AMDGPU::V_CMPSX_NLG_F32_e64_si:
    case AMDGPU::V_CMPSX_NLG_F64_e64_si:
    case AMDGPU::V_CMPSX_NLT_F32_e64_si:
    case AMDGPU::V_CMPSX_NLT_F64_e64_si:
    case AMDGPU::V_CMPSX_O_F32_e64_si:
    case AMDGPU::V_CMPSX_O_F64_e64_si:
    case AMDGPU::V_CMPSX_TRU_F32_e64_si:
    case AMDGPU::V_CMPSX_TRU_F64_e64_si:
    case AMDGPU::V_CMPSX_U_F32_e64_si:
    case AMDGPU::V_CMPSX_U_F64_e64_si:
    case AMDGPU::V_CMPS_EQ_F32_e64_si:
    case AMDGPU::V_CMPS_EQ_F64_e64_si:
    case AMDGPU::V_CMPS_F_F32_e64_si:
    case AMDGPU::V_CMPS_F_F64_e64_si:
    case AMDGPU::V_CMPS_GE_F32_e64_si:
    case AMDGPU::V_CMPS_GE_F64_e64_si:
    case AMDGPU::V_CMPS_GT_F32_e64_si:
    case AMDGPU::V_CMPS_GT_F64_e64_si:
    case AMDGPU::V_CMPS_LE_F32_e64_si:
    case AMDGPU::V_CMPS_LE_F64_e64_si:
    case AMDGPU::V_CMPS_LG_F32_e64_si:
    case AMDGPU::V_CMPS_LG_F64_e64_si:
    case AMDGPU::V_CMPS_LT_F32_e64_si:
    case AMDGPU::V_CMPS_LT_F64_e64_si:
    case AMDGPU::V_CMPS_NEQ_F32_e64_si:
    case AMDGPU::V_CMPS_NEQ_F64_e64_si:
    case AMDGPU::V_CMPS_NGE_F32_e64_si:
    case AMDGPU::V_CMPS_NGE_F64_e64_si:
    case AMDGPU::V_CMPS_NGT_F32_e64_si:
    case AMDGPU::V_CMPS_NGT_F64_e64_si:
    case AMDGPU::V_CMPS_NLE_F32_e64_si:
    case AMDGPU::V_CMPS_NLE_F64_e64_si:
    case AMDGPU::V_CMPS_NLG_F32_e64_si:
    case AMDGPU::V_CMPS_NLG_F64_e64_si:
    case AMDGPU::V_CMPS_NLT_F32_e64_si:
    case AMDGPU::V_CMPS_NLT_F64_e64_si:
    case AMDGPU::V_CMPS_O_F32_e64_si:
    case AMDGPU::V_CMPS_O_F64_e64_si:
    case AMDGPU::V_CMPS_TRU_F32_e64_si:
    case AMDGPU::V_CMPS_TRU_F64_e64_si:
    case AMDGPU::V_CMPS_U_F32_e64_si:
    case AMDGPU::V_CMPS_U_F64_e64_si:
    case AMDGPU::V_CMPX_EQ_F32_e64_si:
    case AMDGPU::V_CMPX_EQ_F64_e64_si:
    case AMDGPU::V_CMPX_F_F32_e64_si:
    case AMDGPU::V_CMPX_F_F64_e64_si:
    case AMDGPU::V_CMPX_GE_F32_e64_si:
    case AMDGPU::V_CMPX_GE_F64_e64_si:
    case AMDGPU::V_CMPX_GT_F32_e64_si:
    case AMDGPU::V_CMPX_GT_F64_e64_si:
    case AMDGPU::V_CMPX_LE_F32_e64_si:
    case AMDGPU::V_CMPX_LE_F64_e64_si:
    case AMDGPU::V_CMPX_LG_F32_e64_si:
    case AMDGPU::V_CMPX_LG_F64_e64_si:
    case AMDGPU::V_CMPX_LT_F32_e64_si:
    case AMDGPU::V_CMPX_LT_F64_e64_si:
    case AMDGPU::V_CMPX_NEQ_F32_e64_si:
    case AMDGPU::V_CMPX_NEQ_F64_e64_si:
    case AMDGPU::V_CMPX_NGE_F32_e64_si:
    case AMDGPU::V_CMPX_NGE_F64_e64_si:
    case AMDGPU::V_CMPX_NGT_F32_e64_si:
    case AMDGPU::V_CMPX_NGT_F64_e64_si:
    case AMDGPU::V_CMPX_NLE_F32_e64_si:
    case AMDGPU::V_CMPX_NLE_F64_e64_si:
    case AMDGPU::V_CMPX_NLG_F32_e64_si:
    case AMDGPU::V_CMPX_NLG_F64_e64_si:
    case AMDGPU::V_CMPX_NLT_F32_e64_si:
    case AMDGPU::V_CMPX_NLT_F64_e64_si:
    case AMDGPU::V_CMPX_O_F32_e64_si:
    case AMDGPU::V_CMPX_O_F64_e64_si:
    case AMDGPU::V_CMPX_TRU_F32_e64_si:
    case AMDGPU::V_CMPX_TRU_F64_e64_si:
    case AMDGPU::V_CMPX_U_F32_e64_si:
    case AMDGPU::V_CMPX_U_F64_e64_si:
    case AMDGPU::V_CMP_EQ_F32_e64_si:
    case AMDGPU::V_CMP_EQ_F64_e64_si:
    case AMDGPU::V_CMP_F_F32_e64_si:
    case AMDGPU::V_CMP_F_F64_e64_si:
    case AMDGPU::V_CMP_GE_F32_e64_si:
    case AMDGPU::V_CMP_GE_F64_e64_si:
    case AMDGPU::V_CMP_GT_F32_e64_si:
    case AMDGPU::V_CMP_GT_F64_e64_si:
    case AMDGPU::V_CMP_LE_F32_e64_si:
    case AMDGPU::V_CMP_LE_F64_e64_si:
    case AMDGPU::V_CMP_LG_F32_e64_si:
    case AMDGPU::V_CMP_LG_F64_e64_si:
    case AMDGPU::V_CMP_LT_F32_e64_si:
    case AMDGPU::V_CMP_LT_F64_e64_si:
    case AMDGPU::V_CMP_NEQ_F32_e64_si:
    case AMDGPU::V_CMP_NEQ_F64_e64_si:
    case AMDGPU::V_CMP_NGE_F32_e64_si:
    case AMDGPU::V_CMP_NGE_F64_e64_si:
    case AMDGPU::V_CMP_NGT_F32_e64_si:
    case AMDGPU::V_CMP_NGT_F64_e64_si:
    case AMDGPU::V_CMP_NLE_F32_e64_si:
    case AMDGPU::V_CMP_NLE_F64_e64_si:
    case AMDGPU::V_CMP_NLG_F32_e64_si:
    case AMDGPU::V_CMP_NLG_F64_e64_si:
    case AMDGPU::V_CMP_NLT_F32_e64_si:
    case AMDGPU::V_CMP_NLT_F64_e64_si:
    case AMDGPU::V_CMP_O_F32_e64_si:
    case AMDGPU::V_CMP_O_F64_e64_si:
    case AMDGPU::V_CMP_TRU_F32_e64_si:
    case AMDGPU::V_CMP_TRU_F64_e64_si:
    case AMDGPU::V_CMP_U_F32_e64_si:
    case AMDGPU::V_CMP_U_F64_e64_si: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 11;
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CVT_PKACCUM_U8_F32_e64_si:
    case AMDGPU::V_CVT_PKNORM_I16_F32_e64_si:
    case AMDGPU::V_CVT_PKNORM_U16_F32_e64_si: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 11;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_ADD_F16_e64_vi:
    case AMDGPU::V_ADD_F32_e64_vi:
    case AMDGPU::V_ADD_F64_vi:
    case AMDGPU::V_CVT_PKRTZ_F16_F32_e64_vi:
    case AMDGPU::V_LDEXP_F16_e64_vi:
    case AMDGPU::V_LDEXP_F32_e64_vi:
    case AMDGPU::V_LDEXP_F64_vi:
    case AMDGPU::V_MAX_F16_e64_vi:
    case AMDGPU::V_MAX_F32_e64_vi:
    case AMDGPU::V_MAX_F64_vi:
    case AMDGPU::V_MIN_F16_e64_vi:
    case AMDGPU::V_MIN_F32_e64_vi:
    case AMDGPU::V_MIN_F64_vi:
    case AMDGPU::V_MUL_F16_e64_vi:
    case AMDGPU::V_MUL_F32_e64_vi:
    case AMDGPU::V_MUL_F64_vi:
    case AMDGPU::V_MUL_LEGACY_F32_e64_vi:
    case AMDGPU::V_SUBREV_F16_e64_vi:
    case AMDGPU::V_SUBREV_F32_e64_vi:
    case AMDGPU::V_SUB_F16_e64_vi:
    case AMDGPU::V_SUB_F32_e64_vi:
    case AMDGPU::V_TRIG_PREOP_F64_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CMPX_EQ_F16_e64_vi:
    case AMDGPU::V_CMPX_EQ_F32_e64_vi:
    case AMDGPU::V_CMPX_EQ_F64_e64_vi:
    case AMDGPU::V_CMPX_F_F16_e64_vi:
    case AMDGPU::V_CMPX_F_F32_e64_vi:
    case AMDGPU::V_CMPX_F_F64_e64_vi:
    case AMDGPU::V_CMPX_GE_F16_e64_vi:
    case AMDGPU::V_CMPX_GE_F32_e64_vi:
    case AMDGPU::V_CMPX_GE_F64_e64_vi:
    case AMDGPU::V_CMPX_GT_F16_e64_vi:
    case AMDGPU::V_CMPX_GT_F32_e64_vi:
    case AMDGPU::V_CMPX_GT_F64_e64_vi:
    case AMDGPU::V_CMPX_LE_F16_e64_vi:
    case AMDGPU::V_CMPX_LE_F32_e64_vi:
    case AMDGPU::V_CMPX_LE_F64_e64_vi:
    case AMDGPU::V_CMPX_LG_F16_e64_vi:
    case AMDGPU::V_CMPX_LG_F32_e64_vi:
    case AMDGPU::V_CMPX_LG_F64_e64_vi:
    case AMDGPU::V_CMPX_LT_F16_e64_vi:
    case AMDGPU::V_CMPX_LT_F32_e64_vi:
    case AMDGPU::V_CMPX_LT_F64_e64_vi:
    case AMDGPU::V_CMPX_NEQ_F16_e64_vi:
    case AMDGPU::V_CMPX_NEQ_F32_e64_vi:
    case AMDGPU::V_CMPX_NEQ_F64_e64_vi:
    case AMDGPU::V_CMPX_NGE_F16_e64_vi:
    case AMDGPU::V_CMPX_NGE_F32_e64_vi:
    case AMDGPU::V_CMPX_NGE_F64_e64_vi:
    case AMDGPU::V_CMPX_NGT_F16_e64_vi:
    case AMDGPU::V_CMPX_NGT_F32_e64_vi:
    case AMDGPU::V_CMPX_NGT_F64_e64_vi:
    case AMDGPU::V_CMPX_NLE_F16_e64_vi:
    case AMDGPU::V_CMPX_NLE_F32_e64_vi:
    case AMDGPU::V_CMPX_NLE_F64_e64_vi:
    case AMDGPU::V_CMPX_NLG_F16_e64_vi:
    case AMDGPU::V_CMPX_NLG_F32_e64_vi:
    case AMDGPU::V_CMPX_NLG_F64_e64_vi:
    case AMDGPU::V_CMPX_NLT_F16_e64_vi:
    case AMDGPU::V_CMPX_NLT_F32_e64_vi:
    case AMDGPU::V_CMPX_NLT_F64_e64_vi:
    case AMDGPU::V_CMPX_O_F16_e64_vi:
    case AMDGPU::V_CMPX_O_F32_e64_vi:
    case AMDGPU::V_CMPX_O_F64_e64_vi:
    case AMDGPU::V_CMPX_TRU_F16_e64_vi:
    case AMDGPU::V_CMPX_TRU_F32_e64_vi:
    case AMDGPU::V_CMPX_TRU_F64_e64_vi:
    case AMDGPU::V_CMPX_U_F16_e64_vi:
    case AMDGPU::V_CMPX_U_F32_e64_vi:
    case AMDGPU::V_CMPX_U_F64_e64_vi:
    case AMDGPU::V_CMP_EQ_F16_e64_vi:
    case AMDGPU::V_CMP_EQ_F32_e64_vi:
    case AMDGPU::V_CMP_EQ_F64_e64_vi:
    case AMDGPU::V_CMP_F_F16_e64_vi:
    case AMDGPU::V_CMP_F_F32_e64_vi:
    case AMDGPU::V_CMP_F_F64_e64_vi:
    case AMDGPU::V_CMP_GE_F16_e64_vi:
    case AMDGPU::V_CMP_GE_F32_e64_vi:
    case AMDGPU::V_CMP_GE_F64_e64_vi:
    case AMDGPU::V_CMP_GT_F16_e64_vi:
    case AMDGPU::V_CMP_GT_F32_e64_vi:
    case AMDGPU::V_CMP_GT_F64_e64_vi:
    case AMDGPU::V_CMP_LE_F16_e64_vi:
    case AMDGPU::V_CMP_LE_F32_e64_vi:
    case AMDGPU::V_CMP_LE_F64_e64_vi:
    case AMDGPU::V_CMP_LG_F16_e64_vi:
    case AMDGPU::V_CMP_LG_F32_e64_vi:
    case AMDGPU::V_CMP_LG_F64_e64_vi:
    case AMDGPU::V_CMP_LT_F16_e64_vi:
    case AMDGPU::V_CMP_LT_F32_e64_vi:
    case AMDGPU::V_CMP_LT_F64_e64_vi:
    case AMDGPU::V_CMP_NEQ_F16_e64_vi:
    case AMDGPU::V_CMP_NEQ_F32_e64_vi:
    case AMDGPU::V_CMP_NEQ_F64_e64_vi:
    case AMDGPU::V_CMP_NGE_F16_e64_vi:
    case AMDGPU::V_CMP_NGE_F32_e64_vi:
    case AMDGPU::V_CMP_NGE_F64_e64_vi:
    case AMDGPU::V_CMP_NGT_F16_e64_vi:
    case AMDGPU::V_CMP_NGT_F32_e64_vi:
    case AMDGPU::V_CMP_NGT_F64_e64_vi:
    case AMDGPU::V_CMP_NLE_F16_e64_vi:
    case AMDGPU::V_CMP_NLE_F32_e64_vi:
    case AMDGPU::V_CMP_NLE_F64_e64_vi:
    case AMDGPU::V_CMP_NLG_F16_e64_vi:
    case AMDGPU::V_CMP_NLG_F32_e64_vi:
    case AMDGPU::V_CMP_NLG_F64_e64_vi:
    case AMDGPU::V_CMP_NLT_F16_e64_vi:
    case AMDGPU::V_CMP_NLT_F32_e64_vi:
    case AMDGPU::V_CMP_NLT_F64_e64_vi:
    case AMDGPU::V_CMP_O_F16_e64_vi:
    case AMDGPU::V_CMP_O_F32_e64_vi:
    case AMDGPU::V_CMP_O_F64_e64_vi:
    case AMDGPU::V_CMP_TRU_F16_e64_vi:
    case AMDGPU::V_CMP_TRU_F32_e64_vi:
    case AMDGPU::V_CMP_TRU_F64_e64_vi:
    case AMDGPU::V_CMP_U_F16_e64_vi:
    case AMDGPU::V_CMP_U_F32_e64_vi:
    case AMDGPU::V_CMP_U_F64_e64_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CVT_PKACCUM_U8_F32_e64_vi:
    case AMDGPU::V_CVT_PKNORM_I16_F32_e64_vi:
    case AMDGPU::V_CVT_PKNORM_U16_F32_e64_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_MAC_F32_e64_si: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 11;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_FMAC_F32_e64_vi:
    case AMDGPU::V_MAC_F16_e64_vi:
    case AMDGPU::V_MAC_F32_e64_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CUBEID_F32_si:
    case AMDGPU::V_CUBEMA_F32_si:
    case AMDGPU::V_CUBESC_F32_si:
    case AMDGPU::V_CUBETC_F32_si:
    case AMDGPU::V_DIV_FIXUP_F32_si:
    case AMDGPU::V_DIV_FIXUP_F64_si:
    case AMDGPU::V_DIV_FMAS_F32_si:
    case AMDGPU::V_DIV_FMAS_F64_si:
    case AMDGPU::V_FMA_F32_si:
    case AMDGPU::V_FMA_F64_si:
    case AMDGPU::V_MAD_F32_si:
    case AMDGPU::V_MAD_LEGACY_F32_si:
    case AMDGPU::V_MAX3_F32_si:
    case AMDGPU::V_MED3_F32_si:
    case AMDGPU::V_MIN3_F32_si:
    case AMDGPU::V_MULLIT_F32_si: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2_modifiers
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 63;
      Value |= (op & UINT64_C(2)) << 9;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 11;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CVT_PK_U8_F32_si: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2_modifiers
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 63;
      Value |= (op & UINT64_C(2)) << 9;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 11;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CUBEID_F32_vi:
    case AMDGPU::V_CUBEMA_F32_vi:
    case AMDGPU::V_CUBESC_F32_vi:
    case AMDGPU::V_CUBETC_F32_vi:
    case AMDGPU::V_DIV_FIXUP_F16_vi:
    case AMDGPU::V_DIV_FIXUP_F32_vi:
    case AMDGPU::V_DIV_FIXUP_F64_vi:
    case AMDGPU::V_DIV_FIXUP_LEGACY_F16_gfx9:
    case AMDGPU::V_DIV_FMAS_F32_vi:
    case AMDGPU::V_DIV_FMAS_F64_vi:
    case AMDGPU::V_FMA_F16_vi:
    case AMDGPU::V_FMA_F32_vi:
    case AMDGPU::V_FMA_F64_vi:
    case AMDGPU::V_FMA_LEGACY_F16_gfx9:
    case AMDGPU::V_MAD_F16_vi:
    case AMDGPU::V_MAD_F32_vi:
    case AMDGPU::V_MAD_LEGACY_F16_gfx9:
    case AMDGPU::V_MAD_LEGACY_F32_vi:
    case AMDGPU::V_MAX3_F32_vi:
    case AMDGPU::V_MED3_F32_vi:
    case AMDGPU::V_MIN3_F32_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2_modifiers
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 63;
      Value |= (op & UINT64_C(2)) << 9;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CVT_PK_U8_F32_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2_modifiers
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 63;
      Value |= (op & UINT64_C(2)) << 9;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CVT_PKNORM_I16_F16_vi:
    case AMDGPU::V_CVT_PKNORM_U16_F16_vi:
    case AMDGPU::V_PACK_B32_F16_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(8)) << 11;
      Value |= (op & UINT64_C(4)) << 9;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(4)) << 10;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_DIV_FIXUP_F16_gfx9_gfx9:
    case AMDGPU::V_FMA_F16_gfx9_gfx9:
    case AMDGPU::V_MAD_F16_gfx9_gfx9:
    case AMDGPU::V_MAX3_F16_vi:
    case AMDGPU::V_MED3_F16_vi:
    case AMDGPU::V_MIN3_F16_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(8)) << 11;
      Value |= (op & UINT64_C(4)) << 9;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(4)) << 10;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2_modifiers
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 63;
      Value |= (op & UINT64_C(4)) << 11;
      Value |= (op & UINT64_C(2)) << 9;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_INTERP_P1_F32_e64_vi:
    case AMDGPU::V_INTERP_P2_F32_e64_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: attrchan
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 38;
      // op: attr
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(63)) << 32;
      break;
    }
    case AMDGPU::V_INTERP_P1LL_F16_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: attrchan
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 38;
      // op: attr
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(63)) << 32;
      // op: high
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 40;
      break;
    }
    case AMDGPU::V_INTERP_P1LV_F16_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2_modifiers
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 63;
      Value |= (op & UINT64_C(2)) << 9;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: omod
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 59;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: attrchan
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 38;
      // op: attr
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(63)) << 32;
      // op: high
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 40;
      break;
    }
    case AMDGPU::V_INTERP_P2_F16_gfx9_gfx9:
    case AMDGPU::V_INTERP_P2_F16_vi:
    case AMDGPU::V_INTERP_P2_LEGACY_F16_gfx9: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2_modifiers
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 63;
      Value |= (op & UINT64_C(2)) << 9;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: attrchan
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 38;
      // op: attr
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(63)) << 32;
      // op: high
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 40;
      break;
    }
    case AMDGPU::V_FMAC_F32_dpp_vi:
    case AMDGPU::V_MAC_F16_dpp_vi:
    case AMDGPU::V_MAC_F32_dpp_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 54;
      // op: dpp_ctrl
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 40;
      // op: bound_ctrl
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 51;
      // op: bank_mask
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 56;
      // op: row_mask
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 60;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_ADD_I16_vi:
    case AMDGPU::V_SUB_I16_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 11;
      Value |= (op & UINT64_C(4)) << 9;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(4)) << 10;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_MAD_I16_gfx9_gfx9:
    case AMDGPU::V_MAD_I32_I16_vi:
    case AMDGPU::V_MAD_U16_gfx9_gfx9:
    case AMDGPU::V_MAD_U32_U16_vi:
    case AMDGPU::V_MAX3_I16_vi:
    case AMDGPU::V_MAX3_U16_vi:
    case AMDGPU::V_MED3_I16_vi:
    case AMDGPU::V_MED3_U16_vi:
    case AMDGPU::V_MIN3_I16_vi:
    case AMDGPU::V_MIN3_U16_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 11;
      Value |= (op & UINT64_C(4)) << 9;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(4)) << 10;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2_modifiers
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(4)) << 11;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      break;
    }
    case AMDGPU::V_CEIL_F16_dpp_vi:
    case AMDGPU::V_CEIL_F32_dpp_vi:
    case AMDGPU::V_COS_F16_dpp_vi:
    case AMDGPU::V_COS_F32_dpp_vi:
    case AMDGPU::V_CVT_F16_F32_dpp_vi:
    case AMDGPU::V_CVT_F32_F16_dpp_vi:
    case AMDGPU::V_CVT_FLR_I32_F32_dpp_vi:
    case AMDGPU::V_CVT_I16_F16_dpp_vi:
    case AMDGPU::V_CVT_I32_F32_dpp_vi:
    case AMDGPU::V_CVT_NORM_I16_F16_dpp_vi:
    case AMDGPU::V_CVT_NORM_U16_F16_dpp_vi:
    case AMDGPU::V_CVT_RPI_I32_F32_dpp_vi:
    case AMDGPU::V_CVT_U16_F16_dpp_vi:
    case AMDGPU::V_CVT_U32_F32_dpp_vi:
    case AMDGPU::V_EXP_F16_dpp_vi:
    case AMDGPU::V_EXP_F32_dpp_vi:
    case AMDGPU::V_EXP_LEGACY_F32_dpp_vi:
    case AMDGPU::V_FLOOR_F16_dpp_vi:
    case AMDGPU::V_FLOOR_F32_dpp_vi:
    case AMDGPU::V_FRACT_F16_dpp_vi:
    case AMDGPU::V_FRACT_F32_dpp_vi:
    case AMDGPU::V_FREXP_EXP_I16_F16_dpp_vi:
    case AMDGPU::V_FREXP_EXP_I32_F32_dpp_vi:
    case AMDGPU::V_FREXP_MANT_F16_dpp_vi:
    case AMDGPU::V_FREXP_MANT_F32_dpp_vi:
    case AMDGPU::V_LOG_F16_dpp_vi:
    case AMDGPU::V_LOG_F32_dpp_vi:
    case AMDGPU::V_LOG_LEGACY_F32_dpp_vi:
    case AMDGPU::V_RCP_F16_dpp_vi:
    case AMDGPU::V_RCP_F32_dpp_vi:
    case AMDGPU::V_RCP_IFLAG_F32_dpp_vi:
    case AMDGPU::V_RNDNE_F16_dpp_vi:
    case AMDGPU::V_RNDNE_F32_dpp_vi:
    case AMDGPU::V_RSQ_F16_dpp_vi:
    case AMDGPU::V_RSQ_F32_dpp_vi:
    case AMDGPU::V_SIN_F16_dpp_vi:
    case AMDGPU::V_SIN_F32_dpp_vi:
    case AMDGPU::V_SQRT_F16_dpp_vi:
    case AMDGPU::V_SQRT_F32_dpp_vi:
    case AMDGPU::V_TRUNC_F16_dpp_vi:
    case AMDGPU::V_TRUNC_F32_dpp_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: dpp_ctrl
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 40;
      // op: bound_ctrl
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 51;
      // op: bank_mask
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 56;
      // op: row_mask
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 60;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      break;
    }
    case AMDGPU::V_ADD_F16_dpp_vi:
    case AMDGPU::V_ADD_F32_dpp_vi:
    case AMDGPU::V_LDEXP_F16_dpp_vi:
    case AMDGPU::V_MAX_F16_dpp_vi:
    case AMDGPU::V_MAX_F32_dpp_vi:
    case AMDGPU::V_MIN_F16_dpp_vi:
    case AMDGPU::V_MIN_F32_dpp_vi:
    case AMDGPU::V_MUL_F16_dpp_vi:
    case AMDGPU::V_MUL_F32_dpp_vi:
    case AMDGPU::V_MUL_LEGACY_F32_dpp_vi:
    case AMDGPU::V_SUBREV_F16_dpp_vi:
    case AMDGPU::V_SUBREV_F32_dpp_vi:
    case AMDGPU::V_SUB_F16_dpp_vi:
    case AMDGPU::V_SUB_F32_dpp_vi: {
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 52;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 54;
      // op: dpp_ctrl
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 40;
      // op: bound_ctrl
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 51;
      // op: bank_mask
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 56;
      // op: row_mask
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 60;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::GLOBAL_ATOMIC_ADD_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_ADD_X2_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_AND_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_AND_X2_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_CMPSWAP_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_CMPSWAP_X2_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_DEC_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_DEC_X2_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_INC_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_INC_X2_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_OR_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_OR_X2_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMAX_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMAX_X2_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMIN_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMIN_X2_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_SUB_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_SUB_X2_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_SWAP_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_SWAP_X2_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMAX_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMAX_X2_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMIN_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMIN_X2_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_XOR_SADDR_vi:
    case AMDGPU::GLOBAL_ATOMIC_XOR_X2_SADDR_vi: {
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: saddr
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 48;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(8191);
      break;
    }
    case AMDGPU::GLOBAL_STORE_BYTE_D16_HI_SADDR_vi:
    case AMDGPU::GLOBAL_STORE_BYTE_SADDR_vi:
    case AMDGPU::GLOBAL_STORE_DWORDX2_SADDR_vi:
    case AMDGPU::GLOBAL_STORE_DWORDX3_SADDR_vi:
    case AMDGPU::GLOBAL_STORE_DWORDX4_SADDR_vi:
    case AMDGPU::GLOBAL_STORE_DWORD_SADDR_vi:
    case AMDGPU::GLOBAL_STORE_SHORT_D16_HI_SADDR_vi:
    case AMDGPU::GLOBAL_STORE_SHORT_SADDR_vi: {
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: saddr
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 48;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(8191);
      break;
    }
    case AMDGPU::FLAT_ATOMIC_ADD_X2_ci:
    case AMDGPU::FLAT_ATOMIC_ADD_X2_vi:
    case AMDGPU::FLAT_ATOMIC_ADD_ci:
    case AMDGPU::FLAT_ATOMIC_ADD_vi:
    case AMDGPU::FLAT_ATOMIC_AND_X2_ci:
    case AMDGPU::FLAT_ATOMIC_AND_X2_vi:
    case AMDGPU::FLAT_ATOMIC_AND_ci:
    case AMDGPU::FLAT_ATOMIC_AND_vi:
    case AMDGPU::FLAT_ATOMIC_CMPSWAP_X2_ci:
    case AMDGPU::FLAT_ATOMIC_CMPSWAP_X2_vi:
    case AMDGPU::FLAT_ATOMIC_CMPSWAP_ci:
    case AMDGPU::FLAT_ATOMIC_CMPSWAP_vi:
    case AMDGPU::FLAT_ATOMIC_DEC_X2_ci:
    case AMDGPU::FLAT_ATOMIC_DEC_X2_vi:
    case AMDGPU::FLAT_ATOMIC_DEC_ci:
    case AMDGPU::FLAT_ATOMIC_DEC_vi:
    case AMDGPU::FLAT_ATOMIC_FCMPSWAP_X2_ci:
    case AMDGPU::FLAT_ATOMIC_FCMPSWAP_ci:
    case AMDGPU::FLAT_ATOMIC_FMAX_X2_ci:
    case AMDGPU::FLAT_ATOMIC_FMAX_ci:
    case AMDGPU::FLAT_ATOMIC_FMIN_X2_ci:
    case AMDGPU::FLAT_ATOMIC_FMIN_ci:
    case AMDGPU::FLAT_ATOMIC_INC_X2_ci:
    case AMDGPU::FLAT_ATOMIC_INC_X2_vi:
    case AMDGPU::FLAT_ATOMIC_INC_ci:
    case AMDGPU::FLAT_ATOMIC_INC_vi:
    case AMDGPU::FLAT_ATOMIC_OR_X2_ci:
    case AMDGPU::FLAT_ATOMIC_OR_X2_vi:
    case AMDGPU::FLAT_ATOMIC_OR_ci:
    case AMDGPU::FLAT_ATOMIC_OR_vi:
    case AMDGPU::FLAT_ATOMIC_SMAX_X2_ci:
    case AMDGPU::FLAT_ATOMIC_SMAX_X2_vi:
    case AMDGPU::FLAT_ATOMIC_SMAX_ci:
    case AMDGPU::FLAT_ATOMIC_SMAX_vi:
    case AMDGPU::FLAT_ATOMIC_SMIN_X2_ci:
    case AMDGPU::FLAT_ATOMIC_SMIN_X2_vi:
    case AMDGPU::FLAT_ATOMIC_SMIN_ci:
    case AMDGPU::FLAT_ATOMIC_SMIN_vi:
    case AMDGPU::FLAT_ATOMIC_SUB_X2_ci:
    case AMDGPU::FLAT_ATOMIC_SUB_X2_vi:
    case AMDGPU::FLAT_ATOMIC_SUB_ci:
    case AMDGPU::FLAT_ATOMIC_SUB_vi:
    case AMDGPU::FLAT_ATOMIC_SWAP_X2_ci:
    case AMDGPU::FLAT_ATOMIC_SWAP_X2_vi:
    case AMDGPU::FLAT_ATOMIC_SWAP_ci:
    case AMDGPU::FLAT_ATOMIC_SWAP_vi:
    case AMDGPU::FLAT_ATOMIC_UMAX_X2_ci:
    case AMDGPU::FLAT_ATOMIC_UMAX_X2_vi:
    case AMDGPU::FLAT_ATOMIC_UMAX_ci:
    case AMDGPU::FLAT_ATOMIC_UMAX_vi:
    case AMDGPU::FLAT_ATOMIC_UMIN_X2_ci:
    case AMDGPU::FLAT_ATOMIC_UMIN_X2_vi:
    case AMDGPU::FLAT_ATOMIC_UMIN_ci:
    case AMDGPU::FLAT_ATOMIC_UMIN_vi:
    case AMDGPU::FLAT_ATOMIC_XOR_X2_ci:
    case AMDGPU::FLAT_ATOMIC_XOR_X2_vi:
    case AMDGPU::FLAT_ATOMIC_XOR_ci:
    case AMDGPU::FLAT_ATOMIC_XOR_vi:
    case AMDGPU::GLOBAL_ATOMIC_ADD_X2_vi:
    case AMDGPU::GLOBAL_ATOMIC_ADD_vi:
    case AMDGPU::GLOBAL_ATOMIC_AND_X2_vi:
    case AMDGPU::GLOBAL_ATOMIC_AND_vi:
    case AMDGPU::GLOBAL_ATOMIC_CMPSWAP_X2_vi:
    case AMDGPU::GLOBAL_ATOMIC_CMPSWAP_vi:
    case AMDGPU::GLOBAL_ATOMIC_DEC_X2_vi:
    case AMDGPU::GLOBAL_ATOMIC_DEC_vi:
    case AMDGPU::GLOBAL_ATOMIC_INC_X2_vi:
    case AMDGPU::GLOBAL_ATOMIC_INC_vi:
    case AMDGPU::GLOBAL_ATOMIC_OR_X2_vi:
    case AMDGPU::GLOBAL_ATOMIC_OR_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMAX_X2_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMAX_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMIN_X2_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMIN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SUB_X2_vi:
    case AMDGPU::GLOBAL_ATOMIC_SUB_vi:
    case AMDGPU::GLOBAL_ATOMIC_SWAP_X2_vi:
    case AMDGPU::GLOBAL_ATOMIC_SWAP_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMAX_X2_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMAX_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMIN_X2_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMIN_vi:
    case AMDGPU::GLOBAL_ATOMIC_XOR_X2_vi:
    case AMDGPU::GLOBAL_ATOMIC_XOR_vi: {
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(8191);
      break;
    }
    case AMDGPU::FLAT_STORE_BYTE_D16_HI_vi:
    case AMDGPU::FLAT_STORE_BYTE_ci:
    case AMDGPU::FLAT_STORE_BYTE_vi:
    case AMDGPU::FLAT_STORE_DWORDX2_ci:
    case AMDGPU::FLAT_STORE_DWORDX2_vi:
    case AMDGPU::FLAT_STORE_DWORDX3_ci:
    case AMDGPU::FLAT_STORE_DWORDX3_vi:
    case AMDGPU::FLAT_STORE_DWORDX4_ci:
    case AMDGPU::FLAT_STORE_DWORDX4_vi:
    case AMDGPU::FLAT_STORE_DWORD_ci:
    case AMDGPU::FLAT_STORE_DWORD_vi:
    case AMDGPU::FLAT_STORE_SHORT_D16_HI_vi:
    case AMDGPU::FLAT_STORE_SHORT_ci:
    case AMDGPU::FLAT_STORE_SHORT_vi:
    case AMDGPU::GLOBAL_STORE_BYTE_D16_HI_vi:
    case AMDGPU::GLOBAL_STORE_BYTE_vi:
    case AMDGPU::GLOBAL_STORE_DWORDX2_vi:
    case AMDGPU::GLOBAL_STORE_DWORDX3_vi:
    case AMDGPU::GLOBAL_STORE_DWORDX4_vi:
    case AMDGPU::GLOBAL_STORE_DWORD_vi:
    case AMDGPU::GLOBAL_STORE_SHORT_D16_HI_vi:
    case AMDGPU::GLOBAL_STORE_SHORT_vi: {
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(8191);
      break;
    }
    case AMDGPU::GLOBAL_LOAD_DWORDX2_SADDR_vi:
    case AMDGPU::GLOBAL_LOAD_DWORDX3_SADDR_vi:
    case AMDGPU::GLOBAL_LOAD_DWORDX4_SADDR_vi:
    case AMDGPU::GLOBAL_LOAD_DWORD_SADDR_vi:
    case AMDGPU::GLOBAL_LOAD_SBYTE_D16_HI_SADDR_vi:
    case AMDGPU::GLOBAL_LOAD_SBYTE_D16_SADDR_vi:
    case AMDGPU::GLOBAL_LOAD_SBYTE_SADDR_vi:
    case AMDGPU::GLOBAL_LOAD_SHORT_D16_HI_SADDR_vi:
    case AMDGPU::GLOBAL_LOAD_SHORT_D16_SADDR_vi:
    case AMDGPU::GLOBAL_LOAD_SSHORT_SADDR_vi:
    case AMDGPU::GLOBAL_LOAD_UBYTE_D16_HI_SADDR_vi:
    case AMDGPU::GLOBAL_LOAD_UBYTE_D16_SADDR_vi:
    case AMDGPU::GLOBAL_LOAD_UBYTE_SADDR_vi:
    case AMDGPU::GLOBAL_LOAD_USHORT_SADDR_vi: {
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: saddr
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 48;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(8191);
      break;
    }
    case AMDGPU::SCRATCH_STORE_BYTE_D16_HI_vi:
    case AMDGPU::SCRATCH_STORE_BYTE_vi:
    case AMDGPU::SCRATCH_STORE_DWORDX2_vi:
    case AMDGPU::SCRATCH_STORE_DWORDX3_vi:
    case AMDGPU::SCRATCH_STORE_DWORDX4_vi:
    case AMDGPU::SCRATCH_STORE_DWORD_vi:
    case AMDGPU::SCRATCH_STORE_SHORT_D16_HI_vi:
    case AMDGPU::SCRATCH_STORE_SHORT_vi: {
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(8191);
      break;
    }
    case AMDGPU::GLOBAL_ATOMIC_ADD_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_ADD_X2_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_AND_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_AND_X2_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_CMPSWAP_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_CMPSWAP_X2_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_DEC_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_DEC_X2_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_INC_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_INC_X2_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_OR_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_OR_X2_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMAX_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMAX_X2_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMIN_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMIN_X2_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SUB_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SUB_X2_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SWAP_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SWAP_X2_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMAX_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMAX_X2_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMIN_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMIN_X2_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_XOR_SADDR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_XOR_X2_SADDR_RTN_vi: {
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: saddr
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 48;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(8191);
      break;
    }
    case AMDGPU::FLAT_ATOMIC_ADD_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_ADD_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_ADD_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_ADD_X2_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_AND_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_AND_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_AND_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_AND_X2_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_CMPSWAP_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_CMPSWAP_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_CMPSWAP_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_CMPSWAP_X2_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_DEC_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_DEC_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_DEC_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_DEC_X2_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_FCMPSWAP_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_FCMPSWAP_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_FMAX_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_FMAX_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_FMIN_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_FMIN_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_INC_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_INC_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_INC_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_INC_X2_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_OR_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_OR_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_OR_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_OR_X2_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_SMAX_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_SMAX_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_SMAX_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_SMAX_X2_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_SMIN_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_SMIN_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_SMIN_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_SMIN_X2_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_SUB_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_SUB_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_SUB_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_SUB_X2_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_SWAP_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_SWAP_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_SWAP_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_SWAP_X2_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_UMAX_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_UMAX_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_UMAX_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_UMAX_X2_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_UMIN_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_UMIN_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_UMIN_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_UMIN_X2_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_XOR_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_XOR_RTN_vi:
    case AMDGPU::FLAT_ATOMIC_XOR_X2_RTN_ci:
    case AMDGPU::FLAT_ATOMIC_XOR_X2_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_ADD_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_ADD_X2_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_AND_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_AND_X2_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_CMPSWAP_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_CMPSWAP_X2_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_DEC_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_DEC_X2_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_INC_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_INC_X2_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_OR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_OR_X2_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMAX_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMAX_X2_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMIN_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SMIN_X2_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SUB_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SUB_X2_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SWAP_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_SWAP_X2_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMAX_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMAX_X2_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMIN_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_UMIN_X2_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_XOR_RTN_vi:
    case AMDGPU::GLOBAL_ATOMIC_XOR_X2_RTN_vi: {
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(8191);
      break;
    }
    case AMDGPU::FLAT_LOAD_DWORDX2_ci:
    case AMDGPU::FLAT_LOAD_DWORDX2_vi:
    case AMDGPU::FLAT_LOAD_DWORDX3_ci:
    case AMDGPU::FLAT_LOAD_DWORDX3_vi:
    case AMDGPU::FLAT_LOAD_DWORDX4_ci:
    case AMDGPU::FLAT_LOAD_DWORDX4_vi:
    case AMDGPU::FLAT_LOAD_DWORD_ci:
    case AMDGPU::FLAT_LOAD_DWORD_vi:
    case AMDGPU::FLAT_LOAD_SBYTE_D16_HI_vi:
    case AMDGPU::FLAT_LOAD_SBYTE_D16_vi:
    case AMDGPU::FLAT_LOAD_SBYTE_ci:
    case AMDGPU::FLAT_LOAD_SBYTE_vi:
    case AMDGPU::FLAT_LOAD_SHORT_D16_HI_vi:
    case AMDGPU::FLAT_LOAD_SHORT_D16_vi:
    case AMDGPU::FLAT_LOAD_SSHORT_ci:
    case AMDGPU::FLAT_LOAD_SSHORT_vi:
    case AMDGPU::FLAT_LOAD_UBYTE_D16_HI_vi:
    case AMDGPU::FLAT_LOAD_UBYTE_D16_vi:
    case AMDGPU::FLAT_LOAD_UBYTE_ci:
    case AMDGPU::FLAT_LOAD_UBYTE_vi:
    case AMDGPU::FLAT_LOAD_USHORT_ci:
    case AMDGPU::FLAT_LOAD_USHORT_vi:
    case AMDGPU::GLOBAL_LOAD_DWORDX2_vi:
    case AMDGPU::GLOBAL_LOAD_DWORDX3_vi:
    case AMDGPU::GLOBAL_LOAD_DWORDX4_vi:
    case AMDGPU::GLOBAL_LOAD_DWORD_vi:
    case AMDGPU::GLOBAL_LOAD_SBYTE_D16_HI_vi:
    case AMDGPU::GLOBAL_LOAD_SBYTE_D16_vi:
    case AMDGPU::GLOBAL_LOAD_SBYTE_vi:
    case AMDGPU::GLOBAL_LOAD_SHORT_D16_HI_vi:
    case AMDGPU::GLOBAL_LOAD_SHORT_D16_vi:
    case AMDGPU::GLOBAL_LOAD_SSHORT_vi:
    case AMDGPU::GLOBAL_LOAD_UBYTE_D16_HI_vi:
    case AMDGPU::GLOBAL_LOAD_UBYTE_D16_vi:
    case AMDGPU::GLOBAL_LOAD_UBYTE_vi:
    case AMDGPU::GLOBAL_LOAD_USHORT_vi:
    case AMDGPU::SCRATCH_LOAD_DWORDX2_vi:
    case AMDGPU::SCRATCH_LOAD_DWORDX3_vi:
    case AMDGPU::SCRATCH_LOAD_DWORDX4_vi:
    case AMDGPU::SCRATCH_LOAD_DWORD_vi:
    case AMDGPU::SCRATCH_LOAD_SBYTE_D16_HI_vi:
    case AMDGPU::SCRATCH_LOAD_SBYTE_D16_vi:
    case AMDGPU::SCRATCH_LOAD_SBYTE_vi:
    case AMDGPU::SCRATCH_LOAD_SHORT_D16_HI_vi:
    case AMDGPU::SCRATCH_LOAD_SHORT_D16_vi:
    case AMDGPU::SCRATCH_LOAD_SSHORT_vi:
    case AMDGPU::SCRATCH_LOAD_UBYTE_D16_HI_vi:
    case AMDGPU::SCRATCH_LOAD_UBYTE_D16_vi:
    case AMDGPU::SCRATCH_LOAD_UBYTE_vi:
    case AMDGPU::SCRATCH_LOAD_USHORT_vi: {
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(8191);
      break;
    }
    case AMDGPU::IMAGE_LOAD_MIP_V1_V1:
    case AMDGPU::IMAGE_LOAD_MIP_V1_V2:
    case AMDGPU::IMAGE_LOAD_MIP_V1_V3:
    case AMDGPU::IMAGE_LOAD_MIP_V1_V4:
    case AMDGPU::IMAGE_LOAD_MIP_V2_V1:
    case AMDGPU::IMAGE_LOAD_MIP_V2_V2:
    case AMDGPU::IMAGE_LOAD_MIP_V2_V3:
    case AMDGPU::IMAGE_LOAD_MIP_V2_V4:
    case AMDGPU::IMAGE_LOAD_MIP_V3_V1:
    case AMDGPU::IMAGE_LOAD_MIP_V3_V2:
    case AMDGPU::IMAGE_LOAD_MIP_V3_V3:
    case AMDGPU::IMAGE_LOAD_MIP_V3_V4:
    case AMDGPU::IMAGE_LOAD_MIP_V4_V1:
    case AMDGPU::IMAGE_LOAD_MIP_V4_V2:
    case AMDGPU::IMAGE_LOAD_MIP_V4_V3:
    case AMDGPU::IMAGE_LOAD_MIP_V4_V4:
    case AMDGPU::IMAGE_LOAD_MIP_V8_V1:
    case AMDGPU::IMAGE_LOAD_MIP_V8_V2:
    case AMDGPU::IMAGE_LOAD_MIP_V8_V3:
    case AMDGPU::IMAGE_LOAD_MIP_V8_V4:
    case AMDGPU::IMAGE_LOAD_V1_V1:
    case AMDGPU::IMAGE_LOAD_V1_V2:
    case AMDGPU::IMAGE_LOAD_V1_V3:
    case AMDGPU::IMAGE_LOAD_V1_V4:
    case AMDGPU::IMAGE_LOAD_V2_V1:
    case AMDGPU::IMAGE_LOAD_V2_V2:
    case AMDGPU::IMAGE_LOAD_V2_V3:
    case AMDGPU::IMAGE_LOAD_V2_V4:
    case AMDGPU::IMAGE_LOAD_V3_V1:
    case AMDGPU::IMAGE_LOAD_V3_V2:
    case AMDGPU::IMAGE_LOAD_V3_V3:
    case AMDGPU::IMAGE_LOAD_V3_V4:
    case AMDGPU::IMAGE_LOAD_V4_V1:
    case AMDGPU::IMAGE_LOAD_V4_V2:
    case AMDGPU::IMAGE_LOAD_V4_V3:
    case AMDGPU::IMAGE_LOAD_V4_V4:
    case AMDGPU::IMAGE_LOAD_V8_V1:
    case AMDGPU::IMAGE_LOAD_V8_V2:
    case AMDGPU::IMAGE_LOAD_V8_V3:
    case AMDGPU::IMAGE_LOAD_V8_V4:
    case AMDGPU::IMAGE_STORE_MIP_V1_V1:
    case AMDGPU::IMAGE_STORE_MIP_V1_V2:
    case AMDGPU::IMAGE_STORE_MIP_V1_V3:
    case AMDGPU::IMAGE_STORE_MIP_V1_V4:
    case AMDGPU::IMAGE_STORE_MIP_V2_V1:
    case AMDGPU::IMAGE_STORE_MIP_V2_V2:
    case AMDGPU::IMAGE_STORE_MIP_V2_V3:
    case AMDGPU::IMAGE_STORE_MIP_V2_V4:
    case AMDGPU::IMAGE_STORE_MIP_V3_V1:
    case AMDGPU::IMAGE_STORE_MIP_V3_V2:
    case AMDGPU::IMAGE_STORE_MIP_V3_V3:
    case AMDGPU::IMAGE_STORE_MIP_V3_V4:
    case AMDGPU::IMAGE_STORE_MIP_V4_V1:
    case AMDGPU::IMAGE_STORE_MIP_V4_V2:
    case AMDGPU::IMAGE_STORE_MIP_V4_V3:
    case AMDGPU::IMAGE_STORE_MIP_V4_V4:
    case AMDGPU::IMAGE_STORE_V1_V1:
    case AMDGPU::IMAGE_STORE_V1_V2:
    case AMDGPU::IMAGE_STORE_V1_V3:
    case AMDGPU::IMAGE_STORE_V1_V4:
    case AMDGPU::IMAGE_STORE_V2_V1:
    case AMDGPU::IMAGE_STORE_V2_V2:
    case AMDGPU::IMAGE_STORE_V2_V3:
    case AMDGPU::IMAGE_STORE_V2_V4:
    case AMDGPU::IMAGE_STORE_V3_V1:
    case AMDGPU::IMAGE_STORE_V3_V2:
    case AMDGPU::IMAGE_STORE_V3_V3:
    case AMDGPU::IMAGE_STORE_V3_V4:
    case AMDGPU::IMAGE_STORE_V4_V1:
    case AMDGPU::IMAGE_STORE_V4_V2:
    case AMDGPU::IMAGE_STORE_V4_V3:
    case AMDGPU::IMAGE_STORE_V4_V4: {
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: dmask
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 8;
      // op: unorm
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 12;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 13;
      // op: da
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: r128
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: tfe
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: lwe
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 25;
      // op: d16
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 63;
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      break;
    }
    case AMDGPU::IMAGE_GET_RESINFO_V1_V1:
    case AMDGPU::IMAGE_GET_RESINFO_V1_V2:
    case AMDGPU::IMAGE_GET_RESINFO_V1_V3:
    case AMDGPU::IMAGE_GET_RESINFO_V1_V4:
    case AMDGPU::IMAGE_GET_RESINFO_V2_V1:
    case AMDGPU::IMAGE_GET_RESINFO_V2_V2:
    case AMDGPU::IMAGE_GET_RESINFO_V2_V3:
    case AMDGPU::IMAGE_GET_RESINFO_V2_V4:
    case AMDGPU::IMAGE_GET_RESINFO_V3_V1:
    case AMDGPU::IMAGE_GET_RESINFO_V3_V2:
    case AMDGPU::IMAGE_GET_RESINFO_V3_V3:
    case AMDGPU::IMAGE_GET_RESINFO_V3_V4:
    case AMDGPU::IMAGE_GET_RESINFO_V4_V1:
    case AMDGPU::IMAGE_GET_RESINFO_V4_V2:
    case AMDGPU::IMAGE_GET_RESINFO_V4_V3:
    case AMDGPU::IMAGE_GET_RESINFO_V4_V4:
    case AMDGPU::IMAGE_GET_RESINFO_V8_V1:
    case AMDGPU::IMAGE_GET_RESINFO_V8_V2:
    case AMDGPU::IMAGE_GET_RESINFO_V8_V3:
    case AMDGPU::IMAGE_GET_RESINFO_V8_V4:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V1:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V2:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V3:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V1_V4:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V1:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V2:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V3:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V2_V4:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V1:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V2:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V3:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V3_V4:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V1:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V2:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V3:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V4_V4:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V8_V1:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V8_V2:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V8_V3:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_SGN_V8_V4:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V1:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V2:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V3:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V1_V4:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V1:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V2:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V3:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V2_V4:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V1:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V2:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V3:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V3_V4:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V1:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V2:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V3:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V4_V4:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V8_V1:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V8_V2:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V8_V3:
    case AMDGPU::IMAGE_LOAD_MIP_PCK_V8_V4:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V1:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V2:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V3:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V1_V4:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V1:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V2:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V3:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V2_V4:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V1:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V2:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V3:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V3_V4:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V1:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V2:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V3:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V4_V4:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V8_V1:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V8_V2:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V8_V3:
    case AMDGPU::IMAGE_LOAD_PCK_SGN_V8_V4:
    case AMDGPU::IMAGE_LOAD_PCK_V1_V1:
    case AMDGPU::IMAGE_LOAD_PCK_V1_V2:
    case AMDGPU::IMAGE_LOAD_PCK_V1_V3:
    case AMDGPU::IMAGE_LOAD_PCK_V1_V4:
    case AMDGPU::IMAGE_LOAD_PCK_V2_V1:
    case AMDGPU::IMAGE_LOAD_PCK_V2_V2:
    case AMDGPU::IMAGE_LOAD_PCK_V2_V3:
    case AMDGPU::IMAGE_LOAD_PCK_V2_V4:
    case AMDGPU::IMAGE_LOAD_PCK_V3_V1:
    case AMDGPU::IMAGE_LOAD_PCK_V3_V2:
    case AMDGPU::IMAGE_LOAD_PCK_V3_V3:
    case AMDGPU::IMAGE_LOAD_PCK_V3_V4:
    case AMDGPU::IMAGE_LOAD_PCK_V4_V1:
    case AMDGPU::IMAGE_LOAD_PCK_V4_V2:
    case AMDGPU::IMAGE_LOAD_PCK_V4_V3:
    case AMDGPU::IMAGE_LOAD_PCK_V4_V4:
    case AMDGPU::IMAGE_LOAD_PCK_V8_V1:
    case AMDGPU::IMAGE_LOAD_PCK_V8_V2:
    case AMDGPU::IMAGE_LOAD_PCK_V8_V3:
    case AMDGPU::IMAGE_LOAD_PCK_V8_V4:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V1_V1:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V1_V2:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V1_V3:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V1_V4:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V2_V1:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V2_V2:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V2_V3:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V2_V4:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V3_V1:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V3_V2:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V3_V3:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V3_V4:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V4_V1:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V4_V2:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V4_V3:
    case AMDGPU::IMAGE_STORE_MIP_PCK_V4_V4:
    case AMDGPU::IMAGE_STORE_PCK_V1_V1:
    case AMDGPU::IMAGE_STORE_PCK_V1_V2:
    case AMDGPU::IMAGE_STORE_PCK_V1_V3:
    case AMDGPU::IMAGE_STORE_PCK_V1_V4:
    case AMDGPU::IMAGE_STORE_PCK_V2_V1:
    case AMDGPU::IMAGE_STORE_PCK_V2_V2:
    case AMDGPU::IMAGE_STORE_PCK_V2_V3:
    case AMDGPU::IMAGE_STORE_PCK_V2_V4:
    case AMDGPU::IMAGE_STORE_PCK_V3_V1:
    case AMDGPU::IMAGE_STORE_PCK_V3_V2:
    case AMDGPU::IMAGE_STORE_PCK_V3_V3:
    case AMDGPU::IMAGE_STORE_PCK_V3_V4:
    case AMDGPU::IMAGE_STORE_PCK_V4_V1:
    case AMDGPU::IMAGE_STORE_PCK_V4_V2:
    case AMDGPU::IMAGE_STORE_PCK_V4_V3:
    case AMDGPU::IMAGE_STORE_PCK_V4_V4: {
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: dmask
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 8;
      // op: unorm
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 12;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 13;
      // op: da
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: r128
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: tfe
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: lwe
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 25;
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      break;
    }
    case AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V3:
    case AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V4:
    case AMDGPU::IMAGE_GATHER4_B_CL_O_V2_V8:
    case AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V3:
    case AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V4:
    case AMDGPU::IMAGE_GATHER4_B_CL_O_V4_V8:
    case AMDGPU::IMAGE_GATHER4_B_CL_O_V8_V3:
    case AMDGPU::IMAGE_GATHER4_B_CL_O_V8_V4:
    case AMDGPU::IMAGE_GATHER4_B_CL_O_V8_V8:
    case AMDGPU::IMAGE_GATHER4_B_CL_V2_V2:
    case AMDGPU::IMAGE_GATHER4_B_CL_V2_V3:
    case AMDGPU::IMAGE_GATHER4_B_CL_V2_V4:
    case AMDGPU::IMAGE_GATHER4_B_CL_V2_V8:
    case AMDGPU::IMAGE_GATHER4_B_CL_V4_V2:
    case AMDGPU::IMAGE_GATHER4_B_CL_V4_V3:
    case AMDGPU::IMAGE_GATHER4_B_CL_V4_V4:
    case AMDGPU::IMAGE_GATHER4_B_CL_V4_V8:
    case AMDGPU::IMAGE_GATHER4_B_CL_V8_V2:
    case AMDGPU::IMAGE_GATHER4_B_CL_V8_V3:
    case AMDGPU::IMAGE_GATHER4_B_CL_V8_V4:
    case AMDGPU::IMAGE_GATHER4_B_CL_V8_V8:
    case AMDGPU::IMAGE_GATHER4_B_O_V2_V3:
    case AMDGPU::IMAGE_GATHER4_B_O_V2_V4:
    case AMDGPU::IMAGE_GATHER4_B_O_V2_V8:
    case AMDGPU::IMAGE_GATHER4_B_O_V4_V3:
    case AMDGPU::IMAGE_GATHER4_B_O_V4_V4:
    case AMDGPU::IMAGE_GATHER4_B_O_V4_V8:
    case AMDGPU::IMAGE_GATHER4_B_O_V8_V3:
    case AMDGPU::IMAGE_GATHER4_B_O_V8_V4:
    case AMDGPU::IMAGE_GATHER4_B_O_V8_V8:
    case AMDGPU::IMAGE_GATHER4_B_V2_V2:
    case AMDGPU::IMAGE_GATHER4_B_V2_V3:
    case AMDGPU::IMAGE_GATHER4_B_V2_V4:
    case AMDGPU::IMAGE_GATHER4_B_V4_V2:
    case AMDGPU::IMAGE_GATHER4_B_V4_V3:
    case AMDGPU::IMAGE_GATHER4_B_V4_V4:
    case AMDGPU::IMAGE_GATHER4_B_V8_V2:
    case AMDGPU::IMAGE_GATHER4_B_V8_V3:
    case AMDGPU::IMAGE_GATHER4_B_V8_V4:
    case AMDGPU::IMAGE_GATHER4_CL_O_V2_V2:
    case AMDGPU::IMAGE_GATHER4_CL_O_V2_V3:
    case AMDGPU::IMAGE_GATHER4_CL_O_V2_V4:
    case AMDGPU::IMAGE_GATHER4_CL_O_V2_V8:
    case AMDGPU::IMAGE_GATHER4_CL_O_V4_V2:
    case AMDGPU::IMAGE_GATHER4_CL_O_V4_V3:
    case AMDGPU::IMAGE_GATHER4_CL_O_V4_V4:
    case AMDGPU::IMAGE_GATHER4_CL_O_V4_V8:
    case AMDGPU::IMAGE_GATHER4_CL_O_V8_V2:
    case AMDGPU::IMAGE_GATHER4_CL_O_V8_V3:
    case AMDGPU::IMAGE_GATHER4_CL_O_V8_V4:
    case AMDGPU::IMAGE_GATHER4_CL_O_V8_V8:
    case AMDGPU::IMAGE_GATHER4_CL_V2_V1:
    case AMDGPU::IMAGE_GATHER4_CL_V2_V2:
    case AMDGPU::IMAGE_GATHER4_CL_V2_V3:
    case AMDGPU::IMAGE_GATHER4_CL_V2_V4:
    case AMDGPU::IMAGE_GATHER4_CL_V4_V1:
    case AMDGPU::IMAGE_GATHER4_CL_V4_V2:
    case AMDGPU::IMAGE_GATHER4_CL_V4_V3:
    case AMDGPU::IMAGE_GATHER4_CL_V4_V4:
    case AMDGPU::IMAGE_GATHER4_CL_V8_V1:
    case AMDGPU::IMAGE_GATHER4_CL_V8_V2:
    case AMDGPU::IMAGE_GATHER4_CL_V8_V3:
    case AMDGPU::IMAGE_GATHER4_CL_V8_V4:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V4:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_O_V2_V8:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V4:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_O_V4_V8:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_O_V8_V4:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_O_V8_V8:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V3:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V4:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_V2_V8:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V3:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V4:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_V4_V8:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_V8_V3:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_V8_V4:
    case AMDGPU::IMAGE_GATHER4_C_B_CL_V8_V8:
    case AMDGPU::IMAGE_GATHER4_C_B_O_V2_V4:
    case AMDGPU::IMAGE_GATHER4_C_B_O_V2_V8:
    case AMDGPU::IMAGE_GATHER4_C_B_O_V4_V4:
    case AMDGPU::IMAGE_GATHER4_C_B_O_V4_V8:
    case AMDGPU::IMAGE_GATHER4_C_B_O_V8_V4:
    case AMDGPU::IMAGE_GATHER4_C_B_O_V8_V8:
    case AMDGPU::IMAGE_GATHER4_C_B_V2_V3:
    case AMDGPU::IMAGE_GATHER4_C_B_V2_V4:
    case AMDGPU::IMAGE_GATHER4_C_B_V2_V8:
    case AMDGPU::IMAGE_GATHER4_C_B_V4_V3:
    case AMDGPU::IMAGE_GATHER4_C_B_V4_V4:
    case AMDGPU::IMAGE_GATHER4_C_B_V4_V8:
    case AMDGPU::IMAGE_GATHER4_C_B_V8_V3:
    case AMDGPU::IMAGE_GATHER4_C_B_V8_V4:
    case AMDGPU::IMAGE_GATHER4_C_B_V8_V8:
    case AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V3:
    case AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V4:
    case AMDGPU::IMAGE_GATHER4_C_CL_O_V2_V8:
    case AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V3:
    case AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V4:
    case AMDGPU::IMAGE_GATHER4_C_CL_O_V4_V8:
    case AMDGPU::IMAGE_GATHER4_C_CL_O_V8_V3:
    case AMDGPU::IMAGE_GATHER4_C_CL_O_V8_V4:
    case AMDGPU::IMAGE_GATHER4_C_CL_O_V8_V8:
    case AMDGPU::IMAGE_GATHER4_C_CL_V2_V2:
    case AMDGPU::IMAGE_GATHER4_C_CL_V2_V3:
    case AMDGPU::IMAGE_GATHER4_C_CL_V2_V4:
    case AMDGPU::IMAGE_GATHER4_C_CL_V2_V8:
    case AMDGPU::IMAGE_GATHER4_C_CL_V4_V2:
    case AMDGPU::IMAGE_GATHER4_C_CL_V4_V3:
    case AMDGPU::IMAGE_GATHER4_C_CL_V4_V4:
    case AMDGPU::IMAGE_GATHER4_C_CL_V4_V8:
    case AMDGPU::IMAGE_GATHER4_C_CL_V8_V2:
    case AMDGPU::IMAGE_GATHER4_C_CL_V8_V3:
    case AMDGPU::IMAGE_GATHER4_C_CL_V8_V4:
    case AMDGPU::IMAGE_GATHER4_C_CL_V8_V8:
    case AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V3:
    case AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V4:
    case AMDGPU::IMAGE_GATHER4_C_LZ_O_V2_V8:
    case AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V3:
    case AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V4:
    case AMDGPU::IMAGE_GATHER4_C_LZ_O_V4_V8:
    case AMDGPU::IMAGE_GATHER4_C_LZ_O_V8_V3:
    case AMDGPU::IMAGE_GATHER4_C_LZ_O_V8_V4:
    case AMDGPU::IMAGE_GATHER4_C_LZ_O_V8_V8:
    case AMDGPU::IMAGE_GATHER4_C_LZ_V2_V2:
    case AMDGPU::IMAGE_GATHER4_C_LZ_V2_V3:
    case AMDGPU::IMAGE_GATHER4_C_LZ_V2_V4:
    case AMDGPU::IMAGE_GATHER4_C_LZ_V4_V2:
    case AMDGPU::IMAGE_GATHER4_C_LZ_V4_V3:
    case AMDGPU::IMAGE_GATHER4_C_LZ_V4_V4:
    case AMDGPU::IMAGE_GATHER4_C_LZ_V8_V2:
    case AMDGPU::IMAGE_GATHER4_C_LZ_V8_V3:
    case AMDGPU::IMAGE_GATHER4_C_LZ_V8_V4:
    case AMDGPU::IMAGE_GATHER4_C_L_O_V2_V3:
    case AMDGPU::IMAGE_GATHER4_C_L_O_V2_V4:
    case AMDGPU::IMAGE_GATHER4_C_L_O_V2_V8:
    case AMDGPU::IMAGE_GATHER4_C_L_O_V4_V3:
    case AMDGPU::IMAGE_GATHER4_C_L_O_V4_V4:
    case AMDGPU::IMAGE_GATHER4_C_L_O_V4_V8:
    case AMDGPU::IMAGE_GATHER4_C_L_O_V8_V3:
    case AMDGPU::IMAGE_GATHER4_C_L_O_V8_V4:
    case AMDGPU::IMAGE_GATHER4_C_L_O_V8_V8:
    case AMDGPU::IMAGE_GATHER4_C_L_V2_V2:
    case AMDGPU::IMAGE_GATHER4_C_L_V2_V3:
    case AMDGPU::IMAGE_GATHER4_C_L_V2_V4:
    case AMDGPU::IMAGE_GATHER4_C_L_V2_V8:
    case AMDGPU::IMAGE_GATHER4_C_L_V4_V2:
    case AMDGPU::IMAGE_GATHER4_C_L_V4_V3:
    case AMDGPU::IMAGE_GATHER4_C_L_V4_V4:
    case AMDGPU::IMAGE_GATHER4_C_L_V4_V8:
    case AMDGPU::IMAGE_GATHER4_C_L_V8_V2:
    case AMDGPU::IMAGE_GATHER4_C_L_V8_V3:
    case AMDGPU::IMAGE_GATHER4_C_L_V8_V4:
    case AMDGPU::IMAGE_GATHER4_C_L_V8_V8:
    case AMDGPU::IMAGE_GATHER4_C_O_V2_V3:
    case AMDGPU::IMAGE_GATHER4_C_O_V2_V4:
    case AMDGPU::IMAGE_GATHER4_C_O_V2_V8:
    case AMDGPU::IMAGE_GATHER4_C_O_V4_V3:
    case AMDGPU::IMAGE_GATHER4_C_O_V4_V4:
    case AMDGPU::IMAGE_GATHER4_C_O_V4_V8:
    case AMDGPU::IMAGE_GATHER4_C_O_V8_V3:
    case AMDGPU::IMAGE_GATHER4_C_O_V8_V4:
    case AMDGPU::IMAGE_GATHER4_C_O_V8_V8:
    case AMDGPU::IMAGE_GATHER4_C_V2_V2:
    case AMDGPU::IMAGE_GATHER4_C_V2_V3:
    case AMDGPU::IMAGE_GATHER4_C_V2_V4:
    case AMDGPU::IMAGE_GATHER4_C_V4_V2:
    case AMDGPU::IMAGE_GATHER4_C_V4_V3:
    case AMDGPU::IMAGE_GATHER4_C_V4_V4:
    case AMDGPU::IMAGE_GATHER4_C_V8_V2:
    case AMDGPU::IMAGE_GATHER4_C_V8_V3:
    case AMDGPU::IMAGE_GATHER4_C_V8_V4:
    case AMDGPU::IMAGE_GATHER4_LZ_O_V2_V2:
    case AMDGPU::IMAGE_GATHER4_LZ_O_V2_V3:
    case AMDGPU::IMAGE_GATHER4_LZ_O_V2_V4:
    case AMDGPU::IMAGE_GATHER4_LZ_O_V4_V2:
    case AMDGPU::IMAGE_GATHER4_LZ_O_V4_V3:
    case AMDGPU::IMAGE_GATHER4_LZ_O_V4_V4:
    case AMDGPU::IMAGE_GATHER4_LZ_O_V8_V2:
    case AMDGPU::IMAGE_GATHER4_LZ_O_V8_V3:
    case AMDGPU::IMAGE_GATHER4_LZ_O_V8_V4:
    case AMDGPU::IMAGE_GATHER4_LZ_V2_V1:
    case AMDGPU::IMAGE_GATHER4_LZ_V2_V2:
    case AMDGPU::IMAGE_GATHER4_LZ_V2_V3:
    case AMDGPU::IMAGE_GATHER4_LZ_V2_V4:
    case AMDGPU::IMAGE_GATHER4_LZ_V4_V1:
    case AMDGPU::IMAGE_GATHER4_LZ_V4_V2:
    case AMDGPU::IMAGE_GATHER4_LZ_V4_V3:
    case AMDGPU::IMAGE_GATHER4_LZ_V4_V4:
    case AMDGPU::IMAGE_GATHER4_LZ_V8_V1:
    case AMDGPU::IMAGE_GATHER4_LZ_V8_V2:
    case AMDGPU::IMAGE_GATHER4_LZ_V8_V3:
    case AMDGPU::IMAGE_GATHER4_LZ_V8_V4:
    case AMDGPU::IMAGE_GATHER4_L_O_V2_V2:
    case AMDGPU::IMAGE_GATHER4_L_O_V2_V3:
    case AMDGPU::IMAGE_GATHER4_L_O_V2_V4:
    case AMDGPU::IMAGE_GATHER4_L_O_V2_V8:
    case AMDGPU::IMAGE_GATHER4_L_O_V4_V2:
    case AMDGPU::IMAGE_GATHER4_L_O_V4_V3:
    case AMDGPU::IMAGE_GATHER4_L_O_V4_V4:
    case AMDGPU::IMAGE_GATHER4_L_O_V4_V8:
    case AMDGPU::IMAGE_GATHER4_L_O_V8_V2:
    case AMDGPU::IMAGE_GATHER4_L_O_V8_V3:
    case AMDGPU::IMAGE_GATHER4_L_O_V8_V4:
    case AMDGPU::IMAGE_GATHER4_L_O_V8_V8:
    case AMDGPU::IMAGE_GATHER4_L_V2_V1:
    case AMDGPU::IMAGE_GATHER4_L_V2_V2:
    case AMDGPU::IMAGE_GATHER4_L_V2_V3:
    case AMDGPU::IMAGE_GATHER4_L_V2_V4:
    case AMDGPU::IMAGE_GATHER4_L_V4_V1:
    case AMDGPU::IMAGE_GATHER4_L_V4_V2:
    case AMDGPU::IMAGE_GATHER4_L_V4_V3:
    case AMDGPU::IMAGE_GATHER4_L_V4_V4:
    case AMDGPU::IMAGE_GATHER4_L_V8_V1:
    case AMDGPU::IMAGE_GATHER4_L_V8_V2:
    case AMDGPU::IMAGE_GATHER4_L_V8_V3:
    case AMDGPU::IMAGE_GATHER4_L_V8_V4:
    case AMDGPU::IMAGE_GATHER4_O_V2_V2:
    case AMDGPU::IMAGE_GATHER4_O_V2_V3:
    case AMDGPU::IMAGE_GATHER4_O_V2_V4:
    case AMDGPU::IMAGE_GATHER4_O_V4_V2:
    case AMDGPU::IMAGE_GATHER4_O_V4_V3:
    case AMDGPU::IMAGE_GATHER4_O_V4_V4:
    case AMDGPU::IMAGE_GATHER4_O_V8_V2:
    case AMDGPU::IMAGE_GATHER4_O_V8_V3:
    case AMDGPU::IMAGE_GATHER4_O_V8_V4:
    case AMDGPU::IMAGE_GATHER4_V2_V1:
    case AMDGPU::IMAGE_GATHER4_V2_V2:
    case AMDGPU::IMAGE_GATHER4_V2_V3:
    case AMDGPU::IMAGE_GATHER4_V2_V4:
    case AMDGPU::IMAGE_GATHER4_V4_V1:
    case AMDGPU::IMAGE_GATHER4_V4_V2:
    case AMDGPU::IMAGE_GATHER4_V4_V3:
    case AMDGPU::IMAGE_GATHER4_V4_V4:
    case AMDGPU::IMAGE_GATHER4_V8_V1:
    case AMDGPU::IMAGE_GATHER4_V8_V2:
    case AMDGPU::IMAGE_GATHER4_V8_V3:
    case AMDGPU::IMAGE_GATHER4_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_B_CL_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_B_CL_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_B_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_B_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_B_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_B_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_B_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_B_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_B_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_B_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_B_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_B_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_B_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_B_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_B_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_B_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_B_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_B_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_B_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_B_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_B_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_B_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_B_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_B_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_B_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_B_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_B_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_B_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_B_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_B_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_B_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_B_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_CL_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_CD_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_CD_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_CD_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_CD_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_CD_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_CD_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_CD_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_CD_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_CD_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_CL_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_CL_V1_V1:
    case AMDGPU::IMAGE_SAMPLE_CL_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_CL_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_CL_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_CL_V2_V1:
    case AMDGPU::IMAGE_SAMPLE_CL_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_CL_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_CL_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_CL_V3_V1:
    case AMDGPU::IMAGE_SAMPLE_CL_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_CL_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_CL_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_CL_V4_V1:
    case AMDGPU::IMAGE_SAMPLE_CL_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_CL_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_CL_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_CL_V8_V1:
    case AMDGPU::IMAGE_SAMPLE_CL_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_CL_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_CL_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_CL_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_B_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_B_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_B_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_B_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_B_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_B_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_B_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_CL_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CD_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CL_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_CL_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_CL_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_D_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_D_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_D_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_D_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_D_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_C_D_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_D_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_D_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_LZ_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_L_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_L_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_C_L_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_L_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_L_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_L_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_C_L_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_L_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_L_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_L_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_C_L_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_L_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_L_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_L_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_C_L_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_L_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_L_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_L_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_C_L_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_L_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_L_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_C_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_C_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_C_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_C_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_C_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_C_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_C_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_C_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_C_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_C_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_C_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_C_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_C_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_C_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_C_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_C_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_C_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_C_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_C_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_C_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_D_CL_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_D_CL_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_D_O_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_D_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_D_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_D_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_D_O_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_D_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_D_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_D_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_D_O_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_D_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_D_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_D_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_D_O_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_D_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_D_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_D_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_D_O_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_D_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_D_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_D_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_D_V1_V16:
    case AMDGPU::IMAGE_SAMPLE_D_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_D_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_D_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_D_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_D_V2_V16:
    case AMDGPU::IMAGE_SAMPLE_D_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_D_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_D_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_D_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_D_V3_V16:
    case AMDGPU::IMAGE_SAMPLE_D_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_D_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_D_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_D_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_D_V4_V16:
    case AMDGPU::IMAGE_SAMPLE_D_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_D_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_D_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_D_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_D_V8_V16:
    case AMDGPU::IMAGE_SAMPLE_D_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_D_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_D_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_D_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_LZ_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_LZ_V1_V1:
    case AMDGPU::IMAGE_SAMPLE_LZ_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_LZ_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_LZ_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_LZ_V2_V1:
    case AMDGPU::IMAGE_SAMPLE_LZ_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_LZ_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_LZ_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_LZ_V3_V1:
    case AMDGPU::IMAGE_SAMPLE_LZ_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_LZ_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_LZ_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_LZ_V4_V1:
    case AMDGPU::IMAGE_SAMPLE_LZ_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_LZ_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_LZ_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_LZ_V8_V1:
    case AMDGPU::IMAGE_SAMPLE_LZ_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_LZ_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_LZ_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_L_O_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_L_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_L_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_L_O_V1_V8:
    case AMDGPU::IMAGE_SAMPLE_L_O_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_L_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_L_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_L_O_V2_V8:
    case AMDGPU::IMAGE_SAMPLE_L_O_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_L_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_L_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_L_O_V3_V8:
    case AMDGPU::IMAGE_SAMPLE_L_O_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_L_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_L_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_L_O_V4_V8:
    case AMDGPU::IMAGE_SAMPLE_L_O_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_L_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_L_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_L_O_V8_V8:
    case AMDGPU::IMAGE_SAMPLE_L_V1_V1:
    case AMDGPU::IMAGE_SAMPLE_L_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_L_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_L_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_L_V2_V1:
    case AMDGPU::IMAGE_SAMPLE_L_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_L_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_L_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_L_V3_V1:
    case AMDGPU::IMAGE_SAMPLE_L_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_L_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_L_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_L_V4_V1:
    case AMDGPU::IMAGE_SAMPLE_L_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_L_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_L_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_L_V8_V1:
    case AMDGPU::IMAGE_SAMPLE_L_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_L_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_L_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_O_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_O_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_O_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_O_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_O_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_O_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_O_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_O_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_O_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_O_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_O_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_O_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_O_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_O_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_O_V8_V4:
    case AMDGPU::IMAGE_SAMPLE_V1_V1:
    case AMDGPU::IMAGE_SAMPLE_V1_V2:
    case AMDGPU::IMAGE_SAMPLE_V1_V3:
    case AMDGPU::IMAGE_SAMPLE_V1_V4:
    case AMDGPU::IMAGE_SAMPLE_V2_V1:
    case AMDGPU::IMAGE_SAMPLE_V2_V2:
    case AMDGPU::IMAGE_SAMPLE_V2_V3:
    case AMDGPU::IMAGE_SAMPLE_V2_V4:
    case AMDGPU::IMAGE_SAMPLE_V3_V1:
    case AMDGPU::IMAGE_SAMPLE_V3_V2:
    case AMDGPU::IMAGE_SAMPLE_V3_V3:
    case AMDGPU::IMAGE_SAMPLE_V3_V4:
    case AMDGPU::IMAGE_SAMPLE_V4_V1:
    case AMDGPU::IMAGE_SAMPLE_V4_V2:
    case AMDGPU::IMAGE_SAMPLE_V4_V3:
    case AMDGPU::IMAGE_SAMPLE_V4_V4:
    case AMDGPU::IMAGE_SAMPLE_V8_V1:
    case AMDGPU::IMAGE_SAMPLE_V8_V2:
    case AMDGPU::IMAGE_SAMPLE_V8_V3:
    case AMDGPU::IMAGE_SAMPLE_V8_V4: {
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: dmask
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 8;
      // op: unorm
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 12;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 13;
      // op: da
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: r128
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: tfe
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: lwe
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 25;
      // op: d16
      op = getMachineOpValue(MI, MI.getOperand(12), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 63;
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: ssamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 51;
      break;
    }
    case AMDGPU::IMAGE_GET_LOD_V1_V1:
    case AMDGPU::IMAGE_GET_LOD_V1_V2:
    case AMDGPU::IMAGE_GET_LOD_V1_V3:
    case AMDGPU::IMAGE_GET_LOD_V1_V4:
    case AMDGPU::IMAGE_GET_LOD_V2_V1:
    case AMDGPU::IMAGE_GET_LOD_V2_V2:
    case AMDGPU::IMAGE_GET_LOD_V2_V3:
    case AMDGPU::IMAGE_GET_LOD_V2_V4:
    case AMDGPU::IMAGE_GET_LOD_V3_V1:
    case AMDGPU::IMAGE_GET_LOD_V3_V2:
    case AMDGPU::IMAGE_GET_LOD_V3_V3:
    case AMDGPU::IMAGE_GET_LOD_V3_V4:
    case AMDGPU::IMAGE_GET_LOD_V4_V1:
    case AMDGPU::IMAGE_GET_LOD_V4_V2:
    case AMDGPU::IMAGE_GET_LOD_V4_V3:
    case AMDGPU::IMAGE_GET_LOD_V4_V4:
    case AMDGPU::IMAGE_GET_LOD_V8_V1:
    case AMDGPU::IMAGE_GET_LOD_V8_V2:
    case AMDGPU::IMAGE_GET_LOD_V8_V3:
    case AMDGPU::IMAGE_GET_LOD_V8_V4: {
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: dmask
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 8;
      // op: unorm
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 12;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 13;
      // op: da
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: r128
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: tfe
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: lwe
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 25;
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      // op: ssamp
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 51;
      break;
    }
    case AMDGPU::SCRATCH_STORE_BYTE_D16_HI_SADDR_vi:
    case AMDGPU::SCRATCH_STORE_BYTE_SADDR_vi:
    case AMDGPU::SCRATCH_STORE_DWORDX2_SADDR_vi:
    case AMDGPU::SCRATCH_STORE_DWORDX3_SADDR_vi:
    case AMDGPU::SCRATCH_STORE_DWORDX4_SADDR_vi:
    case AMDGPU::SCRATCH_STORE_DWORD_SADDR_vi:
    case AMDGPU::SCRATCH_STORE_SHORT_D16_HI_SADDR_vi:
    case AMDGPU::SCRATCH_STORE_SHORT_SADDR_vi: {
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: saddr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 48;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(8191);
      break;
    }
    case AMDGPU::IMAGE_ATOMIC_ADD_V1_V1_si:
    case AMDGPU::IMAGE_ATOMIC_ADD_V1_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_ADD_V1_V2_si:
    case AMDGPU::IMAGE_ATOMIC_ADD_V1_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_ADD_V1_V3_si:
    case AMDGPU::IMAGE_ATOMIC_ADD_V1_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_ADD_V1_V4_si:
    case AMDGPU::IMAGE_ATOMIC_ADD_V1_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_ADD_V2_V1_si:
    case AMDGPU::IMAGE_ATOMIC_ADD_V2_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_ADD_V2_V2_si:
    case AMDGPU::IMAGE_ATOMIC_ADD_V2_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_ADD_V2_V3_si:
    case AMDGPU::IMAGE_ATOMIC_ADD_V2_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_ADD_V2_V4_si:
    case AMDGPU::IMAGE_ATOMIC_ADD_V2_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_AND_V1_V1_si:
    case AMDGPU::IMAGE_ATOMIC_AND_V1_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_AND_V1_V2_si:
    case AMDGPU::IMAGE_ATOMIC_AND_V1_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_AND_V1_V3_si:
    case AMDGPU::IMAGE_ATOMIC_AND_V1_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_AND_V1_V4_si:
    case AMDGPU::IMAGE_ATOMIC_AND_V1_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_AND_V2_V1_si:
    case AMDGPU::IMAGE_ATOMIC_AND_V2_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_AND_V2_V2_si:
    case AMDGPU::IMAGE_ATOMIC_AND_V2_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_AND_V2_V3_si:
    case AMDGPU::IMAGE_ATOMIC_AND_V2_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_AND_V2_V4_si:
    case AMDGPU::IMAGE_ATOMIC_AND_V2_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V1_si:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V2_si:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V3_si:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V4_si:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V1_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V1_si:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V2_si:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V3_si:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V4_si:
    case AMDGPU::IMAGE_ATOMIC_CMPSWAP_V2_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_DEC_V1_V1_si:
    case AMDGPU::IMAGE_ATOMIC_DEC_V1_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_DEC_V1_V2_si:
    case AMDGPU::IMAGE_ATOMIC_DEC_V1_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_DEC_V1_V3_si:
    case AMDGPU::IMAGE_ATOMIC_DEC_V1_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_DEC_V1_V4_si:
    case AMDGPU::IMAGE_ATOMIC_DEC_V1_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_DEC_V2_V1_si:
    case AMDGPU::IMAGE_ATOMIC_DEC_V2_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_DEC_V2_V2_si:
    case AMDGPU::IMAGE_ATOMIC_DEC_V2_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_DEC_V2_V3_si:
    case AMDGPU::IMAGE_ATOMIC_DEC_V2_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_DEC_V2_V4_si:
    case AMDGPU::IMAGE_ATOMIC_DEC_V2_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_INC_V1_V1_si:
    case AMDGPU::IMAGE_ATOMIC_INC_V1_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_INC_V1_V2_si:
    case AMDGPU::IMAGE_ATOMIC_INC_V1_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_INC_V1_V3_si:
    case AMDGPU::IMAGE_ATOMIC_INC_V1_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_INC_V1_V4_si:
    case AMDGPU::IMAGE_ATOMIC_INC_V1_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_INC_V2_V1_si:
    case AMDGPU::IMAGE_ATOMIC_INC_V2_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_INC_V2_V2_si:
    case AMDGPU::IMAGE_ATOMIC_INC_V2_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_INC_V2_V3_si:
    case AMDGPU::IMAGE_ATOMIC_INC_V2_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_INC_V2_V4_si:
    case AMDGPU::IMAGE_ATOMIC_INC_V2_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_OR_V1_V1_si:
    case AMDGPU::IMAGE_ATOMIC_OR_V1_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_OR_V1_V2_si:
    case AMDGPU::IMAGE_ATOMIC_OR_V1_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_OR_V1_V3_si:
    case AMDGPU::IMAGE_ATOMIC_OR_V1_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_OR_V1_V4_si:
    case AMDGPU::IMAGE_ATOMIC_OR_V1_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_OR_V2_V1_si:
    case AMDGPU::IMAGE_ATOMIC_OR_V2_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_OR_V2_V2_si:
    case AMDGPU::IMAGE_ATOMIC_OR_V2_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_OR_V2_V3_si:
    case AMDGPU::IMAGE_ATOMIC_OR_V2_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_OR_V2_V4_si:
    case AMDGPU::IMAGE_ATOMIC_OR_V2_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V1_V1_si:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V1_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V1_V2_si:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V1_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V1_V3_si:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V1_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V1_V4_si:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V1_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V2_V1_si:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V2_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V2_V2_si:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V2_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V2_V3_si:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V2_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V2_V4_si:
    case AMDGPU::IMAGE_ATOMIC_SMAX_V2_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V1_V1_si:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V1_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V1_V2_si:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V1_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V1_V3_si:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V1_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V1_V4_si:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V1_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V2_V1_si:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V2_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V2_V2_si:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V2_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V2_V3_si:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V2_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V2_V4_si:
    case AMDGPU::IMAGE_ATOMIC_SMIN_V2_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_SUB_V1_V1_si:
    case AMDGPU::IMAGE_ATOMIC_SUB_V1_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_SUB_V1_V2_si:
    case AMDGPU::IMAGE_ATOMIC_SUB_V1_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_SUB_V1_V3_si:
    case AMDGPU::IMAGE_ATOMIC_SUB_V1_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_SUB_V1_V4_si:
    case AMDGPU::IMAGE_ATOMIC_SUB_V1_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_SUB_V2_V1_si:
    case AMDGPU::IMAGE_ATOMIC_SUB_V2_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_SUB_V2_V2_si:
    case AMDGPU::IMAGE_ATOMIC_SUB_V2_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_SUB_V2_V3_si:
    case AMDGPU::IMAGE_ATOMIC_SUB_V2_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_SUB_V2_V4_si:
    case AMDGPU::IMAGE_ATOMIC_SUB_V2_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V1_V1_si:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V1_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V1_V2_si:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V1_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V1_V3_si:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V1_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V1_V4_si:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V1_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V2_V1_si:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V2_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V2_V2_si:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V2_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V2_V3_si:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V2_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V2_V4_si:
    case AMDGPU::IMAGE_ATOMIC_SWAP_V2_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V1_V1_si:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V1_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V1_V2_si:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V1_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V1_V3_si:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V1_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V1_V4_si:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V1_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V2_V1_si:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V2_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V2_V2_si:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V2_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V2_V3_si:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V2_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V2_V4_si:
    case AMDGPU::IMAGE_ATOMIC_UMAX_V2_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V1_V1_si:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V1_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V1_V2_si:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V1_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V1_V3_si:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V1_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V1_V4_si:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V1_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V2_V1_si:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V2_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V2_V2_si:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V2_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V2_V3_si:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V2_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V2_V4_si:
    case AMDGPU::IMAGE_ATOMIC_UMIN_V2_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_XOR_V1_V1_si:
    case AMDGPU::IMAGE_ATOMIC_XOR_V1_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_XOR_V1_V2_si:
    case AMDGPU::IMAGE_ATOMIC_XOR_V1_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_XOR_V1_V3_si:
    case AMDGPU::IMAGE_ATOMIC_XOR_V1_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_XOR_V1_V4_si:
    case AMDGPU::IMAGE_ATOMIC_XOR_V1_V4_vi:
    case AMDGPU::IMAGE_ATOMIC_XOR_V2_V1_si:
    case AMDGPU::IMAGE_ATOMIC_XOR_V2_V1_vi:
    case AMDGPU::IMAGE_ATOMIC_XOR_V2_V2_si:
    case AMDGPU::IMAGE_ATOMIC_XOR_V2_V2_vi:
    case AMDGPU::IMAGE_ATOMIC_XOR_V2_V3_si:
    case AMDGPU::IMAGE_ATOMIC_XOR_V2_V3_vi:
    case AMDGPU::IMAGE_ATOMIC_XOR_V2_V4_si:
    case AMDGPU::IMAGE_ATOMIC_XOR_V2_V4_vi: {
      // op: vdata
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: dmask
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(15)) << 8;
      // op: unorm
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 12;
      // op: glc
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 13;
      // op: da
      op = getMachineOpValue(MI, MI.getOperand(11), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 14;
      // op: r128
      op = getMachineOpValue(MI, MI.getOperand(8), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      // op: tfe
      op = getMachineOpValue(MI, MI.getOperand(9), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: lwe
      op = getMachineOpValue(MI, MI.getOperand(10), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: slc
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 25;
      // op: vaddr
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: srsrc
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(124)) << 46;
      break;
    }
    case AMDGPU::V_BFREV_B32_e32_si:
    case AMDGPU::V_BFREV_B32_e32_vi:
    case AMDGPU::V_CEIL_F16_e32_vi:
    case AMDGPU::V_CEIL_F32_e32_si:
    case AMDGPU::V_CEIL_F32_e32_vi:
    case AMDGPU::V_CEIL_F64_e32_ci:
    case AMDGPU::V_CEIL_F64_e32_vi:
    case AMDGPU::V_COS_F16_e32_vi:
    case AMDGPU::V_COS_F32_e32_si:
    case AMDGPU::V_COS_F32_e32_vi:
    case AMDGPU::V_CVT_F16_F32_e32_si:
    case AMDGPU::V_CVT_F16_F32_e32_vi:
    case AMDGPU::V_CVT_F16_I16_e32_vi:
    case AMDGPU::V_CVT_F16_U16_e32_vi:
    case AMDGPU::V_CVT_F32_F16_e32_si:
    case AMDGPU::V_CVT_F32_F16_e32_vi:
    case AMDGPU::V_CVT_F32_F64_e32_si:
    case AMDGPU::V_CVT_F32_F64_e32_vi:
    case AMDGPU::V_CVT_F32_I32_e32_si:
    case AMDGPU::V_CVT_F32_I32_e32_vi:
    case AMDGPU::V_CVT_F32_U32_e32_si:
    case AMDGPU::V_CVT_F32_U32_e32_vi:
    case AMDGPU::V_CVT_F32_UBYTE0_e32_si:
    case AMDGPU::V_CVT_F32_UBYTE0_e32_vi:
    case AMDGPU::V_CVT_F32_UBYTE1_e32_si:
    case AMDGPU::V_CVT_F32_UBYTE1_e32_vi:
    case AMDGPU::V_CVT_F32_UBYTE2_e32_si:
    case AMDGPU::V_CVT_F32_UBYTE2_e32_vi:
    case AMDGPU::V_CVT_F32_UBYTE3_e32_si:
    case AMDGPU::V_CVT_F32_UBYTE3_e32_vi:
    case AMDGPU::V_CVT_F64_F32_e32_si:
    case AMDGPU::V_CVT_F64_F32_e32_vi:
    case AMDGPU::V_CVT_F64_I32_e32_si:
    case AMDGPU::V_CVT_F64_I32_e32_vi:
    case AMDGPU::V_CVT_F64_U32_e32_si:
    case AMDGPU::V_CVT_F64_U32_e32_vi:
    case AMDGPU::V_CVT_FLR_I32_F32_e32_si:
    case AMDGPU::V_CVT_FLR_I32_F32_e32_vi:
    case AMDGPU::V_CVT_I16_F16_e32_vi:
    case AMDGPU::V_CVT_I32_F32_e32_si:
    case AMDGPU::V_CVT_I32_F32_e32_vi:
    case AMDGPU::V_CVT_I32_F64_e32_si:
    case AMDGPU::V_CVT_I32_F64_e32_vi:
    case AMDGPU::V_CVT_NORM_I16_F16_e32_vi:
    case AMDGPU::V_CVT_NORM_U16_F16_e32_vi:
    case AMDGPU::V_CVT_OFF_F32_I4_e32_si:
    case AMDGPU::V_CVT_OFF_F32_I4_e32_vi:
    case AMDGPU::V_CVT_RPI_I32_F32_e32_si:
    case AMDGPU::V_CVT_RPI_I32_F32_e32_vi:
    case AMDGPU::V_CVT_U16_F16_e32_vi:
    case AMDGPU::V_CVT_U32_F32_e32_si:
    case AMDGPU::V_CVT_U32_F32_e32_vi:
    case AMDGPU::V_CVT_U32_F64_e32_si:
    case AMDGPU::V_CVT_U32_F64_e32_vi:
    case AMDGPU::V_EXP_F16_e32_vi:
    case AMDGPU::V_EXP_F32_e32_si:
    case AMDGPU::V_EXP_F32_e32_vi:
    case AMDGPU::V_EXP_LEGACY_F32_e32_ci:
    case AMDGPU::V_EXP_LEGACY_F32_e32_vi:
    case AMDGPU::V_FFBH_I32_e32_si:
    case AMDGPU::V_FFBH_I32_e32_vi:
    case AMDGPU::V_FFBH_U32_e32_si:
    case AMDGPU::V_FFBH_U32_e32_vi:
    case AMDGPU::V_FFBL_B32_e32_si:
    case AMDGPU::V_FFBL_B32_e32_vi:
    case AMDGPU::V_FLOOR_F16_e32_vi:
    case AMDGPU::V_FLOOR_F32_e32_si:
    case AMDGPU::V_FLOOR_F32_e32_vi:
    case AMDGPU::V_FLOOR_F64_e32_ci:
    case AMDGPU::V_FLOOR_F64_e32_vi:
    case AMDGPU::V_FRACT_F16_e32_vi:
    case AMDGPU::V_FRACT_F32_e32_si:
    case AMDGPU::V_FRACT_F32_e32_vi:
    case AMDGPU::V_FRACT_F64_e32_si:
    case AMDGPU::V_FRACT_F64_e32_vi:
    case AMDGPU::V_FREXP_EXP_I16_F16_e32_vi:
    case AMDGPU::V_FREXP_EXP_I32_F32_e32_si:
    case AMDGPU::V_FREXP_EXP_I32_F32_e32_vi:
    case AMDGPU::V_FREXP_EXP_I32_F64_e32_si:
    case AMDGPU::V_FREXP_EXP_I32_F64_e32_vi:
    case AMDGPU::V_FREXP_MANT_F16_e32_vi:
    case AMDGPU::V_FREXP_MANT_F32_e32_si:
    case AMDGPU::V_FREXP_MANT_F32_e32_vi:
    case AMDGPU::V_FREXP_MANT_F64_e32_si:
    case AMDGPU::V_FREXP_MANT_F64_e32_vi:
    case AMDGPU::V_LOG_CLAMP_F32_e32_si:
    case AMDGPU::V_LOG_F16_e32_vi:
    case AMDGPU::V_LOG_F32_e32_si:
    case AMDGPU::V_LOG_F32_e32_vi:
    case AMDGPU::V_LOG_LEGACY_F32_e32_ci:
    case AMDGPU::V_LOG_LEGACY_F32_e32_vi:
    case AMDGPU::V_MOVRELD_B32_e32_si:
    case AMDGPU::V_MOVRELD_B32_e32_vi:
    case AMDGPU::V_MOVRELSD_B32_e32_si:
    case AMDGPU::V_MOVRELSD_B32_e32_vi:
    case AMDGPU::V_MOVRELS_B32_e32_si:
    case AMDGPU::V_MOVRELS_B32_e32_vi:
    case AMDGPU::V_MOV_B32_e32_si:
    case AMDGPU::V_MOV_B32_e32_vi:
    case AMDGPU::V_MOV_FED_B32_e32_si:
    case AMDGPU::V_MOV_FED_B32_e32_vi:
    case AMDGPU::V_NOT_B32_e32_si:
    case AMDGPU::V_NOT_B32_e32_vi:
    case AMDGPU::V_RCP_CLAMP_F32_e32_si:
    case AMDGPU::V_RCP_CLAMP_F64_e32_si:
    case AMDGPU::V_RCP_F16_e32_vi:
    case AMDGPU::V_RCP_F32_e32_si:
    case AMDGPU::V_RCP_F32_e32_vi:
    case AMDGPU::V_RCP_F64_e32_si:
    case AMDGPU::V_RCP_F64_e32_vi:
    case AMDGPU::V_RCP_IFLAG_F32_e32_si:
    case AMDGPU::V_RCP_IFLAG_F32_e32_vi:
    case AMDGPU::V_RCP_LEGACY_F32_e32_si:
    case AMDGPU::V_READFIRSTLANE_B32:
    case AMDGPU::V_RNDNE_F16_e32_vi:
    case AMDGPU::V_RNDNE_F32_e32_si:
    case AMDGPU::V_RNDNE_F32_e32_vi:
    case AMDGPU::V_RNDNE_F64_e32_ci:
    case AMDGPU::V_RNDNE_F64_e32_vi:
    case AMDGPU::V_RSQ_CLAMP_F32_e32_si:
    case AMDGPU::V_RSQ_CLAMP_F64_e32_si:
    case AMDGPU::V_RSQ_F16_e32_vi:
    case AMDGPU::V_RSQ_F32_e32_si:
    case AMDGPU::V_RSQ_F32_e32_vi:
    case AMDGPU::V_RSQ_F64_e32_si:
    case AMDGPU::V_RSQ_F64_e32_vi:
    case AMDGPU::V_RSQ_LEGACY_F32_e32_si:
    case AMDGPU::V_SAT_PK_U8_I16_e32_vi:
    case AMDGPU::V_SCREEN_PARTITION_4SE_B32_e32_vi:
    case AMDGPU::V_SIN_F16_e32_vi:
    case AMDGPU::V_SIN_F32_e32_si:
    case AMDGPU::V_SIN_F32_e32_vi:
    case AMDGPU::V_SQRT_F16_e32_vi:
    case AMDGPU::V_SQRT_F32_e32_si:
    case AMDGPU::V_SQRT_F32_e32_vi:
    case AMDGPU::V_SQRT_F64_e32_si:
    case AMDGPU::V_SQRT_F64_e32_vi:
    case AMDGPU::V_TRUNC_F16_e32_vi:
    case AMDGPU::V_TRUNC_F32_e32_si:
    case AMDGPU::V_TRUNC_F32_e32_vi:
    case AMDGPU::V_TRUNC_F64_e32_ci:
    case AMDGPU::V_TRUNC_F64_e32_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(511);
      break;
    }
    case AMDGPU::V_ADDC_CO_U32_e32_gfx9:
    case AMDGPU::V_ADDC_U32_e32_si:
    case AMDGPU::V_ADDC_U32_e32_vi:
    case AMDGPU::V_ADD_CO_U32_e32_gfx9:
    case AMDGPU::V_ADD_F16_e32_vi:
    case AMDGPU::V_ADD_F32_e32_si:
    case AMDGPU::V_ADD_F32_e32_vi:
    case AMDGPU::V_ADD_I32_e32_si:
    case AMDGPU::V_ADD_U16_e32_vi:
    case AMDGPU::V_ADD_U32_e32_gfx9:
    case AMDGPU::V_ADD_U32_e32_vi:
    case AMDGPU::V_AND_B32_e32_si:
    case AMDGPU::V_AND_B32_e32_vi:
    case AMDGPU::V_ASHRREV_I16_e32_vi:
    case AMDGPU::V_ASHRREV_I32_e32_si:
    case AMDGPU::V_ASHRREV_I32_e32_vi:
    case AMDGPU::V_ASHR_I32_e32_si:
    case AMDGPU::V_BCNT_U32_B32_e32_si:
    case AMDGPU::V_BFM_B32_e32_si:
    case AMDGPU::V_CNDMASK_B32_e32_si:
    case AMDGPU::V_CNDMASK_B32_e32_vi:
    case AMDGPU::V_CVT_PKACCUM_U8_F32_e32_si:
    case AMDGPU::V_CVT_PKNORM_I16_F32_e32_si:
    case AMDGPU::V_CVT_PKNORM_U16_F32_e32_si:
    case AMDGPU::V_CVT_PKRTZ_F16_F32_e32_si:
    case AMDGPU::V_CVT_PK_I16_I32_e32_si:
    case AMDGPU::V_CVT_PK_U16_U32_e32_si:
    case AMDGPU::V_FMAC_F32_e32_vi:
    case AMDGPU::V_LDEXP_F16_e32_vi:
    case AMDGPU::V_LDEXP_F32_e32_si:
    case AMDGPU::V_LSHLREV_B16_e32_vi:
    case AMDGPU::V_LSHLREV_B32_e32_si:
    case AMDGPU::V_LSHLREV_B32_e32_vi:
    case AMDGPU::V_LSHL_B32_e32_si:
    case AMDGPU::V_LSHRREV_B16_e32_vi:
    case AMDGPU::V_LSHRREV_B32_e32_si:
    case AMDGPU::V_LSHRREV_B32_e32_vi:
    case AMDGPU::V_LSHR_B32_e32_si:
    case AMDGPU::V_MAC_F16_e32_vi:
    case AMDGPU::V_MAC_F32_e32_si:
    case AMDGPU::V_MAC_F32_e32_vi:
    case AMDGPU::V_MAC_LEGACY_F32_e32_si:
    case AMDGPU::V_MAX_F16_e32_vi:
    case AMDGPU::V_MAX_F32_e32_si:
    case AMDGPU::V_MAX_F32_e32_vi:
    case AMDGPU::V_MAX_I16_e32_vi:
    case AMDGPU::V_MAX_I32_e32_si:
    case AMDGPU::V_MAX_I32_e32_vi:
    case AMDGPU::V_MAX_LEGACY_F32_e32_si:
    case AMDGPU::V_MAX_U16_e32_vi:
    case AMDGPU::V_MAX_U32_e32_si:
    case AMDGPU::V_MAX_U32_e32_vi:
    case AMDGPU::V_MBCNT_HI_U32_B32_e32_si:
    case AMDGPU::V_MBCNT_LO_U32_B32_e32_si:
    case AMDGPU::V_MIN_F16_e32_vi:
    case AMDGPU::V_MIN_F32_e32_si:
    case AMDGPU::V_MIN_F32_e32_vi:
    case AMDGPU::V_MIN_I16_e32_vi:
    case AMDGPU::V_MIN_I32_e32_si:
    case AMDGPU::V_MIN_I32_e32_vi:
    case AMDGPU::V_MIN_LEGACY_F32_e32_si:
    case AMDGPU::V_MIN_U16_e32_vi:
    case AMDGPU::V_MIN_U32_e32_si:
    case AMDGPU::V_MIN_U32_e32_vi:
    case AMDGPU::V_MUL_F16_e32_vi:
    case AMDGPU::V_MUL_F32_e32_si:
    case AMDGPU::V_MUL_F32_e32_vi:
    case AMDGPU::V_MUL_HI_I32_I24_e32_si:
    case AMDGPU::V_MUL_HI_I32_I24_e32_vi:
    case AMDGPU::V_MUL_HI_U32_U24_e32_si:
    case AMDGPU::V_MUL_HI_U32_U24_e32_vi:
    case AMDGPU::V_MUL_I32_I24_e32_si:
    case AMDGPU::V_MUL_I32_I24_e32_vi:
    case AMDGPU::V_MUL_LEGACY_F32_e32_si:
    case AMDGPU::V_MUL_LEGACY_F32_e32_vi:
    case AMDGPU::V_MUL_LO_U16_e32_vi:
    case AMDGPU::V_MUL_U32_U24_e32_si:
    case AMDGPU::V_MUL_U32_U24_e32_vi:
    case AMDGPU::V_OR_B32_e32_si:
    case AMDGPU::V_OR_B32_e32_vi:
    case AMDGPU::V_READLANE_B32_si:
    case AMDGPU::V_SUBBREV_CO_U32_e32_gfx9:
    case AMDGPU::V_SUBBREV_U32_e32_si:
    case AMDGPU::V_SUBBREV_U32_e32_vi:
    case AMDGPU::V_SUBB_CO_U32_e32_gfx9:
    case AMDGPU::V_SUBB_U32_e32_si:
    case AMDGPU::V_SUBB_U32_e32_vi:
    case AMDGPU::V_SUBREV_CO_U32_e32_gfx9:
    case AMDGPU::V_SUBREV_F16_e32_vi:
    case AMDGPU::V_SUBREV_F32_e32_si:
    case AMDGPU::V_SUBREV_F32_e32_vi:
    case AMDGPU::V_SUBREV_I32_e32_si:
    case AMDGPU::V_SUBREV_U16_e32_vi:
    case AMDGPU::V_SUBREV_U32_e32_gfx9:
    case AMDGPU::V_SUBREV_U32_e32_vi:
    case AMDGPU::V_SUB_CO_U32_e32_gfx9:
    case AMDGPU::V_SUB_F16_e32_vi:
    case AMDGPU::V_SUB_F32_e32_si:
    case AMDGPU::V_SUB_F32_e32_vi:
    case AMDGPU::V_SUB_I32_e32_si:
    case AMDGPU::V_SUB_U16_e32_vi:
    case AMDGPU::V_SUB_U32_e32_gfx9:
    case AMDGPU::V_SUB_U32_e32_vi:
    case AMDGPU::V_WRITELANE_B32_si:
    case AMDGPU::V_XNOR_B32_e32_vi:
    case AMDGPU::V_XOR_B32_e32_si:
    case AMDGPU::V_XOR_B32_e32_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(511);
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      break;
    }
    case AMDGPU::V_MADAK_F16_vi:
    case AMDGPU::V_MADAK_F32_si:
    case AMDGPU::V_MADAK_F32_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(511);
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      // op: imm
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(4294967295)) << 32;
      break;
    }
    case AMDGPU::V_MADMK_F16_vi:
    case AMDGPU::V_MADMK_F32_si:
    case AMDGPU::V_MADMK_F32_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(511);
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 9;
      // op: imm
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(4294967295)) << 32;
      break;
    }
    case AMDGPU::V_SWAP_B32_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 17;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(511);
      break;
    }
    case AMDGPU::V_INTERP_MOV_F32_si:
    case AMDGPU::V_INTERP_MOV_F32_vi:
    case AMDGPU::V_INTERP_P1_F32_16bank_si:
    case AMDGPU::V_INTERP_P1_F32_16bank_vi:
    case AMDGPU::V_INTERP_P1_F32_si:
    case AMDGPU::V_INTERP_P1_F32_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 18;
      // op: vsrc
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: attrchan
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 8;
      // op: attr
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(63)) << 10;
      break;
    }
    case AMDGPU::V_INTERP_P2_F32_si:
    case AMDGPU::V_INTERP_P2_F32_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 18;
      // op: vsrc
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: attrchan
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(3)) << 8;
      // op: attr
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(63)) << 10;
      break;
    }
    case AMDGPU::DS_BPERMUTE_B32_vi:
    case AMDGPU::DS_PERMUTE_B32_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_ORDERED_COUNT_si:
    case AMDGPU::DS_ORDERED_COUNT_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_APPEND_vi:
    case AMDGPU::DS_CONSUME_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_APPEND_si:
    case AMDGPU::DS_CONSUME_si: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_READ_ADDTID_B32_vi:
    case AMDGPU::DS_READ_B128_vi:
    case AMDGPU::DS_READ_B32_vi:
    case AMDGPU::DS_READ_B64_vi:
    case AMDGPU::DS_READ_B96_vi:
    case AMDGPU::DS_READ_I16_vi:
    case AMDGPU::DS_READ_I8_D16_HI_vi:
    case AMDGPU::DS_READ_I8_D16_vi:
    case AMDGPU::DS_READ_I8_vi:
    case AMDGPU::DS_READ_U16_D16_HI_vi:
    case AMDGPU::DS_READ_U16_D16_vi:
    case AMDGPU::DS_READ_U16_vi:
    case AMDGPU::DS_READ_U8_D16_HI_vi:
    case AMDGPU::DS_READ_U8_D16_vi:
    case AMDGPU::DS_READ_U8_vi:
    case AMDGPU::DS_SWIZZLE_B32_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_READ_B128_si:
    case AMDGPU::DS_READ_B32_si:
    case AMDGPU::DS_READ_B64_si:
    case AMDGPU::DS_READ_B96_si:
    case AMDGPU::DS_READ_I16_si:
    case AMDGPU::DS_READ_I8_si:
    case AMDGPU::DS_READ_U16_si:
    case AMDGPU::DS_READ_U8_si:
    case AMDGPU::DS_SWIZZLE_B32_si: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_ADD_RTN_F32_vi:
    case AMDGPU::DS_ADD_RTN_U32_vi:
    case AMDGPU::DS_ADD_RTN_U64_vi:
    case AMDGPU::DS_AND_RTN_B32_vi:
    case AMDGPU::DS_AND_RTN_B64_vi:
    case AMDGPU::DS_CONDXCHG32_RTN_B64_vi:
    case AMDGPU::DS_DEC_RTN_U32_vi:
    case AMDGPU::DS_DEC_RTN_U64_vi:
    case AMDGPU::DS_INC_RTN_U32_vi:
    case AMDGPU::DS_INC_RTN_U64_vi:
    case AMDGPU::DS_MAX_RTN_F32_vi:
    case AMDGPU::DS_MAX_RTN_F64_vi:
    case AMDGPU::DS_MAX_RTN_I32_vi:
    case AMDGPU::DS_MAX_RTN_I64_vi:
    case AMDGPU::DS_MAX_RTN_U32_vi:
    case AMDGPU::DS_MAX_RTN_U64_vi:
    case AMDGPU::DS_MIN_RTN_F32_vi:
    case AMDGPU::DS_MIN_RTN_F64_vi:
    case AMDGPU::DS_MIN_RTN_I32_vi:
    case AMDGPU::DS_MIN_RTN_I64_vi:
    case AMDGPU::DS_MIN_RTN_U32_vi:
    case AMDGPU::DS_MIN_RTN_U64_vi:
    case AMDGPU::DS_OR_RTN_B32_vi:
    case AMDGPU::DS_OR_RTN_B64_vi:
    case AMDGPU::DS_RSUB_RTN_U32_vi:
    case AMDGPU::DS_RSUB_RTN_U64_vi:
    case AMDGPU::DS_SUB_RTN_U32_vi:
    case AMDGPU::DS_SUB_RTN_U64_vi:
    case AMDGPU::DS_WRXCHG_RTN_B32_vi:
    case AMDGPU::DS_WRXCHG_RTN_B64_vi:
    case AMDGPU::DS_XOR_RTN_B32_vi:
    case AMDGPU::DS_XOR_RTN_B64_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_READ2ST64_B32_vi:
    case AMDGPU::DS_READ2ST64_B64_vi:
    case AMDGPU::DS_READ2_B32_vi:
    case AMDGPU::DS_READ2_B64_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: offset0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: offset1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 8;
      break;
    }
    case AMDGPU::DS_ADD_RTN_U32_si:
    case AMDGPU::DS_ADD_RTN_U64_si:
    case AMDGPU::DS_AND_RTN_B32_si:
    case AMDGPU::DS_AND_RTN_B64_si:
    case AMDGPU::DS_CONDXCHG32_RTN_B64_si:
    case AMDGPU::DS_DEC_RTN_U32_si:
    case AMDGPU::DS_DEC_RTN_U64_si:
    case AMDGPU::DS_INC_RTN_U32_si:
    case AMDGPU::DS_INC_RTN_U64_si:
    case AMDGPU::DS_MAX_RTN_F32_si:
    case AMDGPU::DS_MAX_RTN_F64_si:
    case AMDGPU::DS_MAX_RTN_I32_si:
    case AMDGPU::DS_MAX_RTN_I64_si:
    case AMDGPU::DS_MAX_RTN_U32_si:
    case AMDGPU::DS_MAX_RTN_U64_si:
    case AMDGPU::DS_MIN_RTN_F32_si:
    case AMDGPU::DS_MIN_RTN_F64_si:
    case AMDGPU::DS_MIN_RTN_I32_si:
    case AMDGPU::DS_MIN_RTN_I64_si:
    case AMDGPU::DS_MIN_RTN_U32_si:
    case AMDGPU::DS_MIN_RTN_U64_si:
    case AMDGPU::DS_OR_RTN_B32_si:
    case AMDGPU::DS_OR_RTN_B64_si:
    case AMDGPU::DS_RSUB_RTN_U32_si:
    case AMDGPU::DS_RSUB_RTN_U64_si:
    case AMDGPU::DS_SUB_RTN_U32_si:
    case AMDGPU::DS_SUB_RTN_U64_si:
    case AMDGPU::DS_WRXCHG_RTN_B32_si:
    case AMDGPU::DS_WRXCHG_RTN_B64_si:
    case AMDGPU::DS_XOR_RTN_B32_si:
    case AMDGPU::DS_XOR_RTN_B64_si: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_READ2ST64_B32_si:
    case AMDGPU::DS_READ2ST64_B64_si:
    case AMDGPU::DS_READ2_B32_si:
    case AMDGPU::DS_READ2_B64_si: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: offset0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: offset1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 8;
      break;
    }
    case AMDGPU::DS_CMPST_RTN_B32_vi:
    case AMDGPU::DS_CMPST_RTN_B64_vi:
    case AMDGPU::DS_CMPST_RTN_F32_vi:
    case AMDGPU::DS_CMPST_RTN_F64_vi:
    case AMDGPU::DS_MSKOR_RTN_B32_vi:
    case AMDGPU::DS_MSKOR_RTN_B64_vi:
    case AMDGPU::DS_WRAP_RTN_B32_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: data1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 48;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_CMPST_RTN_B32_si:
    case AMDGPU::DS_CMPST_RTN_B64_si:
    case AMDGPU::DS_CMPST_RTN_F32_si:
    case AMDGPU::DS_CMPST_RTN_F64_si:
    case AMDGPU::DS_MSKOR_RTN_B32_si:
    case AMDGPU::DS_MSKOR_RTN_B64_si:
    case AMDGPU::DS_WRAP_RTN_B32_si: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: data1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 48;
      // op: offset
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(65535);
      break;
    }
    case AMDGPU::DS_WRXCHG2ST64_RTN_B32_vi:
    case AMDGPU::DS_WRXCHG2ST64_RTN_B64_vi:
    case AMDGPU::DS_WRXCHG2_RTN_B32_vi:
    case AMDGPU::DS_WRXCHG2_RTN_B64_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 16;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: data1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 48;
      // op: offset0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: offset1
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 8;
      break;
    }
    case AMDGPU::DS_WRXCHG2ST64_RTN_B32_si:
    case AMDGPU::DS_WRXCHG2ST64_RTN_B64_si:
    case AMDGPU::DS_WRXCHG2_RTN_B32_si:
    case AMDGPU::DS_WRXCHG2_RTN_B64_si: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 56;
      // op: gds
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 17;
      // op: addr
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 32;
      // op: data0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 40;
      // op: data1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 48;
      // op: offset0
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: offset1
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(255)) << 8;
      break;
    }
    case AMDGPU::V_ADD_CO_U32_e64_gfx9:
    case AMDGPU::V_ADD_I32_e64_si:
    case AMDGPU::V_ADD_U32_e64_vi:
    case AMDGPU::V_SUBREV_CO_U32_e64_gfx9:
    case AMDGPU::V_SUBREV_I32_e64_si:
    case AMDGPU::V_SUBREV_U32_e64_vi:
    case AMDGPU::V_SUB_CO_U32_e64_gfx9:
    case AMDGPU::V_SUB_I32_e64_si:
    case AMDGPU::V_SUB_U32_e64_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 8;
      break;
    }
    case AMDGPU::V_ADDC_CO_U32_e64_gfx9:
    case AMDGPU::V_ADDC_U32_e64_si:
    case AMDGPU::V_ADDC_U32_e64_vi:
    case AMDGPU::V_DIV_SCALE_F32_si:
    case AMDGPU::V_DIV_SCALE_F32_vi:
    case AMDGPU::V_DIV_SCALE_F64_si:
    case AMDGPU::V_DIV_SCALE_F64_vi:
    case AMDGPU::V_MAD_I64_I32_ci:
    case AMDGPU::V_MAD_U64_U32_ci:
    case AMDGPU::V_SUBBREV_CO_U32_e64_gfx9:
    case AMDGPU::V_SUBBREV_U32_e64_si:
    case AMDGPU::V_SUBBREV_U32_e64_vi:
    case AMDGPU::V_SUBB_CO_U32_e64_gfx9:
    case AMDGPU::V_SUBB_U32_e64_si:
    case AMDGPU::V_SUBB_U32_e64_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 8;
      break;
    }
    case AMDGPU::V_MAD_I64_I32_vi:
    case AMDGPU::V_MAD_U64_U32_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: sdst
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(127)) << 8;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      break;
    }
    case AMDGPU::V_PK_ADD_F16_vi:
    case AMDGPU::V_PK_MAX_F16_vi:
    case AMDGPU::V_PK_MIN_F16_vi:
    case AMDGPU::V_PK_MUL_F16_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(8)) << 56;
      Value |= (op & UINT64_C(4)) << 9;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(8)) << 57;
      Value |= (op & UINT64_C(4)) << 10;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      break;
    }
    case AMDGPU::V_DOT2_F32_F16_vi:
    case AMDGPU::V_DOT4_I32_I8_vi:
    case AMDGPU::V_DOT4_U32_U8_vi:
    case AMDGPU::V_DOT8_I32_I4_vi:
    case AMDGPU::V_DOT8_U32_U4_vi:
    case AMDGPU::V_FMA_MIXHI_F16_vi:
    case AMDGPU::V_FMA_MIXLO_F16_vi:
    case AMDGPU::V_FMA_MIX_F32_vi:
    case AMDGPU::V_MAD_MIXHI_F16_vi:
    case AMDGPU::V_MAD_MIXLO_F16_vi:
    case AMDGPU::V_MAD_MIX_F32_vi:
    case AMDGPU::V_PK_FMA_F16_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(8)) << 56;
      Value |= (op & UINT64_C(4)) << 9;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 62;
      Value |= (op & UINT64_C(8)) << 57;
      Value |= (op & UINT64_C(4)) << 10;
      Value |= (op & UINT64_C(2)) << 8;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2_modifiers
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 63;
      Value |= (op & UINT64_C(12)) << 11;
      Value |= (op & UINT64_C(2)) << 9;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      break;
    }
    case AMDGPU::V_PK_ADD_I16_vi:
    case AMDGPU::V_PK_ADD_U16_vi:
    case AMDGPU::V_PK_ASHRREV_I16_vi:
    case AMDGPU::V_PK_LSHLREV_B16_vi:
    case AMDGPU::V_PK_LSHRREV_B16_vi:
    case AMDGPU::V_PK_MAX_I16_vi:
    case AMDGPU::V_PK_MAX_U16_vi:
    case AMDGPU::V_PK_MIN_I16_vi:
    case AMDGPU::V_PK_MIN_U16_vi:
    case AMDGPU::V_PK_MUL_LO_U16_vi:
    case AMDGPU::V_PK_SUB_I16_vi:
    case AMDGPU::V_PK_SUB_U16_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(8)) << 56;
      Value |= (op & UINT64_C(4)) << 9;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 57;
      Value |= (op & UINT64_C(4)) << 10;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      break;
    }
    case AMDGPU::V_DOT2_I32_I16_vi:
    case AMDGPU::V_DOT2_U32_U16_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(8)) << 56;
      Value |= (op & UINT64_C(4)) << 9;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 57;
      Value |= (op & UINT64_C(4)) << 10;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2_modifiers
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 63;
      Value |= (op & UINT64_C(12)) << 11;
      Value |= (op & UINT64_C(2)) << 9;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      break;
    }
    case AMDGPU::V_PK_MAD_I16_vi:
    case AMDGPU::V_PK_MAD_U16_vi: {
      // op: vdst
      op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
      Value |= op & UINT64_C(255);
      // op: src0_modifiers
      op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 61;
      Value |= (op & UINT64_C(8)) << 56;
      Value |= (op & UINT64_C(4)) << 9;
      Value |= (op & UINT64_C(2)) << 7;
      // op: src0
      op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 32;
      // op: src1_modifiers
      op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
      Value |= (op & UINT64_C(8)) << 57;
      Value |= (op & UINT64_C(4)) << 10;
      // op: src1
      op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 41;
      // op: src2_modifiers
      op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
      Value |= (op & UINT64_C(12)) << 11;
      // op: src2
      op = getMachineOpValue(MI, MI.getOperand(6), Fixups, STI);
      Value |= (op & UINT64_C(511)) << 50;
      // op: clamp
      op = getMachineOpValue(MI, MI.getOperand(7), Fixups, STI);
      Value |= (op & UINT64_C(1)) << 15;
      break;
    }
  default:
    std::string msg;
    raw_string_ostream Msg(msg);
    Msg << "Not supported instr: " << MI;
    report_fatal_error(Msg.str());
  }
  return Value;
}

#ifdef ENABLE_INSTR_PREDICATE_VERIFIER
#undef ENABLE_INSTR_PREDICATE_VERIFIER
#include <sstream>

// Flags for subtarget features that participate in instruction matching.
enum SubtargetFeatureFlag : uint64_t {
  Feature_isSICI = (1ULL << 31),
  Feature_isVI = (1ULL << 32),
  Feature_isGFX9 = (1ULL << 29),
  Feature_isCIVI = (1ULL << 27),
  Feature_HasFlatAddressSpace = (1ULL << 9),
  Feature_HasFlatGlobalInsts = (1ULL << 10),
  Feature_HasFlatScratchInsts = (1ULL << 11),
  Feature_HasD16LoadStore = (1ULL << 4),
  Feature_HasUnpackedD16VMem = (1ULL << 21),
  Feature_HasPackedD16VMem = (1ULL << 16),
  Feature_D16PreservesUnusedBits = (1ULL << 0),
  Feature_HasDSAddTid = (1ULL << 7),
  Feature_HasAddNoCarryInsts = (1ULL << 3),
  Feature_NotHasAddNoCarryInsts = (1ULL << 24),
  Feature_Has16BitInsts = (1ULL << 2),
  Feature_HasVOP3PInsts = (1ULL << 23),
  Feature_NotHasVOP3PInsts = (1ULL << 25),
  Feature_HasSDWA = (1ULL << 18),
  Feature_HasSDWA9 = (1ULL << 19),
  Feature_HasDPP = (1ULL << 6),
  Feature_HasR128A16 = (1ULL << 17),
  Feature_HasIntClamp = (1ULL << 13),
  Feature_HasMadMixInsts = (1ULL << 14),
  Feature_HasScalarAtomics = (1ULL << 20),
  Feature_HasVGPRIndexMode = (1ULL << 22),
  Feature_HasMovrel = (1ULL << 15),
  Feature_HasFmaMixInsts = (1ULL << 12),
  Feature_HasDLInsts = (1ULL << 5),
  Feature_HasDotInsts = (1ULL << 8),
  Feature_isCIOnly = (1ULL << 26),
  Feature_isVIOnly = (1ULL << 33),
  Feature_DisableInst = (1ULL << 1),
  Feature_isGCN = (1ULL << 28),
  Feature_isSI = (1ULL << 30),
  Feature_None = 0
};

#ifndef NDEBUG
static const char *SubtargetFeatureNames[] = {
  "Feature_D16PreservesUnusedBits",
  "Feature_DisableInst",
  "Feature_Has16BitInsts",
  "Feature_HasAddNoCarryInsts",
  "Feature_HasD16LoadStore",
  "Feature_HasDLInsts",
  "Feature_HasDPP",
  "Feature_HasDSAddTid",
  "Feature_HasDotInsts",
  "Feature_HasFlatAddressSpace",
  "Feature_HasFlatGlobalInsts",
  "Feature_HasFlatScratchInsts",
  "Feature_HasFmaMixInsts",
  "Feature_HasIntClamp",
  "Feature_HasMadMixInsts",
  "Feature_HasMovrel",
  "Feature_HasPackedD16VMem",
  "Feature_HasR128A16",
  "Feature_HasSDWA",
  "Feature_HasSDWA9",
  "Feature_HasScalarAtomics",
  "Feature_HasUnpackedD16VMem",
  "Feature_HasVGPRIndexMode",
  "Feature_HasVOP3PInsts",
  "Feature_NotHasAddNoCarryInsts",
  "Feature_NotHasVOP3PInsts",
  "Feature_isCIOnly",
  "Feature_isCIVI",
  "Feature_isGCN",
  "Feature_isGFX9",
  "Feature_isSI",
  "Feature_isSICI",
  "Feature_isVI",
  "Feature_isVIOnly",
  nullptr
};

#endif // NDEBUG
uint64_t AMDGPUMCCodeEmitter::
computeAvailableFeatures(const FeatureBitset& FB) const {
  uint64_t Features = 0;
  if ((!FB[AMDGPU::FeatureGCN3Encoding]))
    Features |= Feature_isSICI;
  if ((FB[AMDGPU::FeatureGCN3Encoding]))
    Features |= Feature_isVI;
  if ((FB[AMDGPU::FeatureGFX9Insts]))
    Features |= Feature_isGFX9;
  if ((FB[AMDGPU::FeatureCIInsts]))
    Features |= Feature_isCIVI;
  if ((FB[AMDGPU::FeatureFlatAddressSpace]))
    Features |= Feature_HasFlatAddressSpace;
  if ((FB[AMDGPU::FeatureFlatGlobalInsts]))
    Features |= Feature_HasFlatGlobalInsts;
  if ((FB[AMDGPU::FeatureFlatScratchInsts]))
    Features |= Feature_HasFlatScratchInsts;
  if ((FB[AMDGPU::FeatureGFX9Insts]))
    Features |= Feature_HasD16LoadStore;
  if ((FB[AMDGPU::FeatureUnpackedD16VMem]))
    Features |= Feature_HasUnpackedD16VMem;
  if ((!FB[AMDGPU::FeatureUnpackedD16VMem]))
    Features |= Feature_HasPackedD16VMem;
  if ((FB[AMDGPU::FeatureGFX9Insts]) && (!FB[AMDGPU::FeatureSRAMECC]))
    Features |= Feature_D16PreservesUnusedBits;
  if ((FB[AMDGPU::FeatureGFX9Insts]))
    Features |= Feature_HasDSAddTid;
  if ((FB[AMDGPU::FeatureAddNoCarryInsts]))
    Features |= Feature_HasAddNoCarryInsts;
  if ((!FB[AMDGPU::FeatureAddNoCarryInsts]))
    Features |= Feature_NotHasAddNoCarryInsts;
  if ((FB[AMDGPU::Feature16BitInsts]))
    Features |= Feature_Has16BitInsts;
  if ((FB[AMDGPU::FeatureVOP3P]))
    Features |= Feature_HasVOP3PInsts;
  if ((!FB[AMDGPU::FeatureVOP3P]))
    Features |= Feature_NotHasVOP3PInsts;
  if ((FB[AMDGPU::FeatureSDWA]) && (FB[AMDGPU::FeatureVolcanicIslands]))
    Features |= Feature_HasSDWA;
  if ((FB[AMDGPU::FeatureSDWA]) && (FB[AMDGPU::FeatureGFX9]))
    Features |= Feature_HasSDWA9;
  if ((FB[AMDGPU::FeatureDPP]))
    Features |= Feature_HasDPP;
  if ((FB[AMDGPU::FeatureR128A16]))
    Features |= Feature_HasR128A16;
  if ((FB[AMDGPU::FeatureIntClamp]))
    Features |= Feature_HasIntClamp;
  if ((FB[AMDGPU::FeatureMadMixInsts]))
    Features |= Feature_HasMadMixInsts;
  if ((FB[AMDGPU::FeatureScalarAtomics]))
    Features |= Feature_HasScalarAtomics;
  if ((FB[AMDGPU::FeatureVGPRIndexMode]))
    Features |= Feature_HasVGPRIndexMode;
  if ((FB[AMDGPU::FeatureMovrel]))
    Features |= Feature_HasMovrel;
  if ((FB[AMDGPU::FeatureFmaMixInsts]))
    Features |= Feature_HasFmaMixInsts;
  if ((FB[AMDGPU::FeatureDLInsts]))
    Features |= Feature_HasDLInsts;
  if ((FB[AMDGPU::FeatureDotInsts]))
    Features |= Feature_HasDotInsts;
  if ((FB[AMDGPU::FeatureSeaIslands]))
    Features |= Feature_isCIOnly;
  if ((FB[AMDGPU::FeatureVolcanicIslands]))
    Features |= Feature_isVIOnly;
  if ((FB[AMDGPU::FeatureDisable]))
    Features |= Feature_DisableInst;
  if ((FB[AMDGPU::FeatureGCN]))
    Features |= Feature_isGCN;
  if ((FB[AMDGPU::FeatureSouthernIslands]))
    Features |= Feature_isSI;
  return Features;
}

void AMDGPUMCCodeEmitter::verifyInstructionPredicates(
    const MCInst &Inst, uint64_t AvailableFeatures) const {
#ifndef NDEBUG
  static uint64_t RequiredFeatures[] = {
    0, // PHI = 0
    0, // INLINEASM = 1
    0, // CFI_INSTRUCTION = 2
    0, // EH_LABEL = 3
    0, // GC_LABEL = 4
    0, // ANNOTATION_LABEL = 5
    0, // KILL = 6
    0, // EXTRACT_SUBREG = 7
    0, // INSERT_SUBREG = 8
    0, // IMPLICIT_DEF = 9
    0, // SUBREG_TO_REG = 10
    0, // COPY_TO_REGCLASS = 11
    0, // DBG_VALUE = 12
    0, // DBG_LABEL = 13
    0, // REG_SEQUENCE = 14
    0, // COPY = 15
    0, // BUNDLE = 16
    0, // LIFETIME_START = 17
    0, // LIFETIME_END = 18
    0, // STACKMAP = 19
    0, // FENTRY_CALL = 20
    0, // PATCHPOINT = 21
    0, // LOAD_STACK_GUARD = 22
    0, // STATEPOINT = 23
    0, // LOCAL_ESCAPE = 24
    0, // FAULTING_OP = 25
    0, // PATCHABLE_OP = 26
    0, // PATCHABLE_FUNCTION_ENTER = 27
    0, // PATCHABLE_RET = 28
    0, // PATCHABLE_FUNCTION_EXIT = 29
    0, // PATCHABLE_TAIL_CALL = 30
    0, // PATCHABLE_EVENT_CALL = 31
    0, // PATCHABLE_TYPED_EVENT_CALL = 32
    0, // ICALL_BRANCH_FUNNEL = 33
    0, // G_ADD = 34
    0, // G_SUB = 35
    0, // G_MUL = 36
    0, // G_SDIV = 37
    0, // G_UDIV = 38
    0, // G_SREM = 39
    0, // G_UREM = 40
    0, // G_AND = 41
    0, // G_OR = 42
    0, // G_XOR = 43
    0, // G_IMPLICIT_DEF = 44
    0, // G_PHI = 45
    0, // G_FRAME_INDEX = 46
    0, // G_GLOBAL_VALUE = 47
    0, // G_EXTRACT = 48
    0, // G_UNMERGE_VALUES = 49
    0, // G_INSERT = 50
    0, // G_MERGE_VALUES = 51
    0, // G_BUILD_VECTOR = 52
    0, // G_BUILD_VECTOR_TRUNC = 53
    0, // G_CONCAT_VECTORS = 54
    0, // G_PTRTOINT = 55
    0, // G_INTTOPTR = 56
    0, // G_BITCAST = 57
    0, // G_INTRINSIC_TRUNC = 58
    0, // G_INTRINSIC_ROUND = 59
    0, // G_LOAD = 60
    0, // G_SEXTLOAD = 61
    0, // G_ZEXTLOAD = 62
    0, // G_STORE = 63
    0, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 64
    0, // G_ATOMIC_CMPXCHG = 65
    0, // G_ATOMICRMW_XCHG = 66
    0, // G_ATOMICRMW_ADD = 67
    0, // G_ATOMICRMW_SUB = 68
    0, // G_ATOMICRMW_AND = 69
    0, // G_ATOMICRMW_NAND = 70
    0, // G_ATOMICRMW_OR = 71
    0, // G_ATOMICRMW_XOR = 72
    0, // G_ATOMICRMW_MAX = 73
    0, // G_ATOMICRMW_MIN = 74
    0, // G_ATOMICRMW_UMAX = 75
    0, // G_ATOMICRMW_UMIN = 76
    0, // G_BRCOND = 77
    0, // G_BRINDIRECT = 78
    0, // G_INTRINSIC = 79
    0, // G_INTRINSIC_W_SIDE_EFFECTS = 80
    0, // G_ANYEXT = 81
    0, // G_TRUNC = 82
    0, // G_CONSTANT = 83
    0, // G_FCONSTANT = 84
    0, // G_VASTART = 85
    0, // G_VAARG = 86
    0, // G_SEXT = 87
    0, // G_ZEXT = 88
    0, // G_SHL = 89
    0, // G_LSHR = 90
    0, // G_ASHR = 91
    0, // G_ICMP = 92
    0, // G_FCMP = 93
    0, // G_SELECT = 94
    0, // G_UADDO = 95
    0, // G_UADDE = 96
    0, // G_USUBO = 97
    0, // G_USUBE = 98
    0, // G_SADDO = 99
    0, // G_SADDE = 100
    0, // G_SSUBO = 101
    0, // G_SSUBE = 102
    0, // G_UMULO = 103
    0, // G_SMULO = 104
    0, // G_UMULH = 105
    0, // G_SMULH = 106
    0, // G_FADD = 107
    0, // G_FSUB = 108
    0, // G_FMUL = 109
    0, // G_FMA = 110
    0, // G_FDIV = 111
    0, // G_FREM = 112
    0, // G_FPOW = 113
    0, // G_FEXP = 114
    0, // G_FEXP2 = 115
    0, // G_FLOG = 116
    0, // G_FLOG2 = 117
    0, // G_FLOG10 = 118
    0, // G_FNEG = 119
    0, // G_FPEXT = 120
    0, // G_FPTRUNC = 121
    0, // G_FPTOSI = 122
    0, // G_FPTOUI = 123
    0, // G_SITOFP = 124
    0, // G_UITOFP = 125
    0, // G_FABS = 126
    0, // G_GEP = 127
    0, // G_PTR_MASK = 128
    0, // G_BR = 129
    0, // G_INSERT_VECTOR_ELT = 130
    0, // G_EXTRACT_VECTOR_ELT = 131
    0, // G_SHUFFLE_VECTOR = 132
    0, // G_CTTZ = 133
    0, // G_CTTZ_ZERO_UNDEF = 134
    0, // G_CTLZ = 135
    0, // G_CTLZ_ZERO_UNDEF = 136
    0, // G_CTPOP = 137
    0, // G_BSWAP = 138
    0, // G_FCEIL = 139
    0, // G_ADDRSPACE_CAST = 140
    0, // G_BLOCK_ADDR = 141
    Feature_isGCN | 0, // ADJCALLSTACKDOWN = 142
    Feature_isGCN | 0, // ADJCALLSTACKUP = 143
    Feature_isGCN | 0, // ATOMIC_FENCE = 144
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_ADDR64 = 145
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_ADDR64_RTN = 146
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_BOTHEN = 147
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_BOTHEN_RTN = 148
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_IDXEN = 149
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_IDXEN_RTN = 150
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_OFFEN = 151
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_OFFEN_RTN = 152
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_OFFSET = 153
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_OFFSET_RTN = 154
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_X2_ADDR64 = 155
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_X2_ADDR64_RTN = 156
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_X2_BOTHEN = 157
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_X2_BOTHEN_RTN = 158
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_X2_IDXEN = 159
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_X2_IDXEN_RTN = 160
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_X2_OFFEN = 161
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_X2_OFFEN_RTN = 162
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_X2_OFFSET = 163
    Feature_isGCN | 0, // BUFFER_ATOMIC_ADD_X2_OFFSET_RTN = 164
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_ADDR64 = 165
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_ADDR64_RTN = 166
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_BOTHEN = 167
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_BOTHEN_RTN = 168
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_IDXEN = 169
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_IDXEN_RTN = 170
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_OFFEN = 171
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_OFFEN_RTN = 172
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_OFFSET = 173
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_OFFSET_RTN = 174
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_X2_ADDR64 = 175
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_X2_ADDR64_RTN = 176
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_X2_BOTHEN = 177
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_X2_BOTHEN_RTN = 178
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_X2_IDXEN = 179
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_X2_IDXEN_RTN = 180
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_X2_OFFEN = 181
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_X2_OFFEN_RTN = 182
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_X2_OFFSET = 183
    Feature_isGCN | 0, // BUFFER_ATOMIC_AND_X2_OFFSET_RTN = 184
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_ADDR64 = 185
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_ADDR64_RTN = 186
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_BOTHEN = 187
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_BOTHEN_RTN = 188
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_IDXEN = 189
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_IDXEN_RTN = 190
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_OFFEN = 191
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_OFFEN_RTN = 192
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_OFFSET = 193
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_OFFSET_RTN = 194
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_X2_ADDR64 = 195
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_X2_ADDR64_RTN = 196
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN = 197
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN_RTN = 198
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_X2_IDXEN = 199
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_RTN = 200
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_X2_OFFEN = 201
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_RTN = 202
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_X2_OFFSET = 203
    Feature_isGCN | 0, // BUFFER_ATOMIC_CMPSWAP_X2_OFFSET_RTN = 204
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_ADDR64 = 205
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_ADDR64_RTN = 206
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_BOTHEN = 207
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_BOTHEN_RTN = 208
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_IDXEN = 209
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_IDXEN_RTN = 210
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_OFFEN = 211
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_OFFEN_RTN = 212
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_OFFSET = 213
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_OFFSET_RTN = 214
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_X2_ADDR64 = 215
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_X2_ADDR64_RTN = 216
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_X2_BOTHEN = 217
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_X2_BOTHEN_RTN = 218
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_X2_IDXEN = 219
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_X2_IDXEN_RTN = 220
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_X2_OFFEN = 221
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_X2_OFFEN_RTN = 222
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_X2_OFFSET = 223
    Feature_isGCN | 0, // BUFFER_ATOMIC_DEC_X2_OFFSET_RTN = 224
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_ADDR64 = 225
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_ADDR64_RTN = 226
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_BOTHEN = 227
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_BOTHEN_RTN = 228
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_IDXEN = 229
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_IDXEN_RTN = 230
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_OFFEN = 231
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_OFFEN_RTN = 232
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_OFFSET = 233
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_OFFSET_RTN = 234
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_X2_ADDR64 = 235
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_X2_ADDR64_RTN = 236
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_X2_BOTHEN = 237
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_X2_BOTHEN_RTN = 238
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_X2_IDXEN = 239
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_X2_IDXEN_RTN = 240
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_X2_OFFEN = 241
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_X2_OFFEN_RTN = 242
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_X2_OFFSET = 243
    Feature_isGCN | 0, // BUFFER_ATOMIC_INC_X2_OFFSET_RTN = 244
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_ADDR64 = 245
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_ADDR64_RTN = 246
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_BOTHEN = 247
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_BOTHEN_RTN = 248
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_IDXEN = 249
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_IDXEN_RTN = 250
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_OFFEN = 251
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_OFFEN_RTN = 252
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_OFFSET = 253
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_OFFSET_RTN = 254
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_X2_ADDR64 = 255
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_X2_ADDR64_RTN = 256
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_X2_BOTHEN = 257
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_X2_BOTHEN_RTN = 258
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_X2_IDXEN = 259
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_X2_IDXEN_RTN = 260
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_X2_OFFEN = 261
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_X2_OFFEN_RTN = 262
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_X2_OFFSET = 263
    Feature_isGCN | 0, // BUFFER_ATOMIC_OR_X2_OFFSET_RTN = 264
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_ADDR64 = 265
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_ADDR64_RTN = 266
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_BOTHEN = 267
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_BOTHEN_RTN = 268
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_IDXEN = 269
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_IDXEN_RTN = 270
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_OFFEN = 271
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_OFFEN_RTN = 272
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_OFFSET = 273
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_OFFSET_RTN = 274
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_X2_ADDR64 = 275
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_X2_ADDR64_RTN = 276
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_X2_BOTHEN = 277
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_X2_BOTHEN_RTN = 278
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_X2_IDXEN = 279
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_X2_IDXEN_RTN = 280
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_X2_OFFEN = 281
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_X2_OFFEN_RTN = 282
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_X2_OFFSET = 283
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMAX_X2_OFFSET_RTN = 284
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_ADDR64 = 285
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_ADDR64_RTN = 286
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_BOTHEN = 287
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_BOTHEN_RTN = 288
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_IDXEN = 289
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_IDXEN_RTN = 290
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_OFFEN = 291
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_OFFEN_RTN = 292
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_OFFSET = 293
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_OFFSET_RTN = 294
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_X2_ADDR64 = 295
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_X2_ADDR64_RTN = 296
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_X2_BOTHEN = 297
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_X2_BOTHEN_RTN = 298
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_X2_IDXEN = 299
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_X2_IDXEN_RTN = 300
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_X2_OFFEN = 301
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_X2_OFFEN_RTN = 302
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_X2_OFFSET = 303
    Feature_isGCN | 0, // BUFFER_ATOMIC_SMIN_X2_OFFSET_RTN = 304
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_ADDR64 = 305
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_ADDR64_RTN = 306
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_BOTHEN = 307
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_BOTHEN_RTN = 308
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_IDXEN = 309
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_IDXEN_RTN = 310
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_OFFEN = 311
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_OFFEN_RTN = 312
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_OFFSET = 313
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_OFFSET_RTN = 314
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_X2_ADDR64 = 315
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_X2_ADDR64_RTN = 316
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_X2_BOTHEN = 317
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_X2_BOTHEN_RTN = 318
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_X2_IDXEN = 319
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_X2_IDXEN_RTN = 320
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_X2_OFFEN = 321
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_X2_OFFEN_RTN = 322
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_X2_OFFSET = 323
    Feature_isGCN | 0, // BUFFER_ATOMIC_SUB_X2_OFFSET_RTN = 324
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_ADDR64 = 325
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_ADDR64_RTN = 326
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_BOTHEN = 327
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_BOTHEN_RTN = 328
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_IDXEN = 329
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_IDXEN_RTN = 330
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_OFFEN = 331
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_OFFEN_RTN = 332
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_OFFSET = 333
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_OFFSET_RTN = 334
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_X2_ADDR64 = 335
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_X2_ADDR64_RTN = 336
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_X2_BOTHEN = 337
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_X2_BOTHEN_RTN = 338
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_X2_IDXEN = 339
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_X2_IDXEN_RTN = 340
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_X2_OFFEN = 341
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_X2_OFFEN_RTN = 342
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_X2_OFFSET = 343
    Feature_isGCN | 0, // BUFFER_ATOMIC_SWAP_X2_OFFSET_RTN = 344
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_ADDR64 = 345
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_ADDR64_RTN = 346
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_BOTHEN = 347
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_BOTHEN_RTN = 348
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_IDXEN = 349
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_IDXEN_RTN = 350
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_OFFEN = 351
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_OFFEN_RTN = 352
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_OFFSET = 353
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_OFFSET_RTN = 354
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_X2_ADDR64 = 355
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_X2_ADDR64_RTN = 356
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_X2_BOTHEN = 357
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_X2_BOTHEN_RTN = 358
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_X2_IDXEN = 359
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_X2_IDXEN_RTN = 360
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_X2_OFFEN = 361
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_X2_OFFEN_RTN = 362
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_X2_OFFSET = 363
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMAX_X2_OFFSET_RTN = 364
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_ADDR64 = 365
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_ADDR64_RTN = 366
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_BOTHEN = 367
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_BOTHEN_RTN = 368
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_IDXEN = 369
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_IDXEN_RTN = 370
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_OFFEN = 371
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_OFFEN_RTN = 372
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_OFFSET = 373
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_OFFSET_RTN = 374
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_X2_ADDR64 = 375
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_X2_ADDR64_RTN = 376
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_X2_BOTHEN = 377
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_X2_BOTHEN_RTN = 378
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_X2_IDXEN = 379
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_X2_IDXEN_RTN = 380
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_X2_OFFEN = 381
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_X2_OFFEN_RTN = 382
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_X2_OFFSET = 383
    Feature_isGCN | 0, // BUFFER_ATOMIC_UMIN_X2_OFFSET_RTN = 384
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_ADDR64 = 385
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_ADDR64_RTN = 386
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_BOTHEN = 387
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_BOTHEN_RTN = 388
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_IDXEN = 389
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_IDXEN_RTN = 390
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_OFFEN = 391
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_OFFEN_RTN = 392
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_OFFSET = 393
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_OFFSET_RTN = 394
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_X2_ADDR64 = 395
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_X2_ADDR64_RTN = 396
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_X2_BOTHEN = 397
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_X2_BOTHEN_RTN = 398
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_X2_IDXEN = 399
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_X2_IDXEN_RTN = 400
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_X2_OFFEN = 401
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_X2_OFFEN_RTN = 402
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_X2_OFFSET = 403
    Feature_isGCN | 0, // BUFFER_ATOMIC_XOR_X2_OFFSET_RTN = 404
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX2_ADDR64 = 405
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX2_BOTHEN = 406
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX2_BOTHEN_exact = 407
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX2_IDXEN = 408
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX2_IDXEN_exact = 409
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_LDS_ADDR64 = 410
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_LDS_BOTHEN = 411
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_LDS_BOTHEN_exact = 412
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_LDS_IDXEN = 413
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_LDS_IDXEN_exact = 414
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_LDS_OFFEN = 415
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_LDS_OFFEN_exact = 416
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_LDS_OFFSET = 417
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_LDS_OFFSET_exact = 418
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX2_OFFEN = 419
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX2_OFFEN_exact = 420
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX2_OFFSET = 421
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX2_OFFSET_exact = 422
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX3_ADDR64 = 423
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX3_BOTHEN = 424
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX3_BOTHEN_exact = 425
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX3_IDXEN = 426
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX3_IDXEN_exact = 427
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_LDS_ADDR64 = 428
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_LDS_BOTHEN = 429
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_LDS_BOTHEN_exact = 430
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_LDS_IDXEN = 431
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_LDS_IDXEN_exact = 432
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_LDS_OFFEN = 433
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_LDS_OFFEN_exact = 434
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_LDS_OFFSET = 435
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_LDS_OFFSET_exact = 436
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX3_OFFEN = 437
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX3_OFFEN_exact = 438
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX3_OFFSET = 439
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX3_OFFSET_exact = 440
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX4_ADDR64 = 441
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX4_BOTHEN = 442
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX4_BOTHEN_exact = 443
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX4_IDXEN = 444
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX4_IDXEN_exact = 445
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_LDS_ADDR64 = 446
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_LDS_BOTHEN = 447
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_LDS_BOTHEN_exact = 448
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_LDS_IDXEN = 449
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_LDS_IDXEN_exact = 450
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_LDS_OFFEN = 451
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_LDS_OFFEN_exact = 452
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_LDS_OFFSET = 453
    Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_LDS_OFFSET_exact = 454
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX4_OFFEN = 455
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX4_OFFEN_exact = 456
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX4_OFFSET = 457
    Feature_isGCN | 0, // BUFFER_LOAD_DWORDX4_OFFSET_exact = 458
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_ADDR64 = 459
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_BOTHEN = 460
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_BOTHEN_exact = 461
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_IDXEN = 462
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_IDXEN_exact = 463
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_LDS_ADDR64 = 464
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_LDS_BOTHEN = 465
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_LDS_BOTHEN_exact = 466
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_LDS_IDXEN = 467
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_LDS_IDXEN_exact = 468
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_LDS_OFFEN = 469
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_LDS_OFFEN_exact = 470
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_LDS_OFFSET = 471
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_LDS_OFFSET_exact = 472
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_OFFEN = 473
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_OFFEN_exact = 474
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_OFFSET = 475
    Feature_isGCN | 0, // BUFFER_LOAD_DWORD_OFFSET_exact = 476
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_FORMAT_D16_HI_X_ADDR64 = 477
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_FORMAT_D16_HI_X_BOTHEN = 478
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_FORMAT_D16_HI_X_BOTHEN_exact = 479
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_FORMAT_D16_HI_X_IDXEN = 480
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_FORMAT_D16_HI_X_IDXEN_exact = 481
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_FORMAT_D16_HI_X_OFFEN = 482
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_FORMAT_D16_HI_X_OFFEN_exact = 483
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_FORMAT_D16_HI_X_OFFSET = 484
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_FORMAT_D16_HI_X_OFFSET_exact = 485
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_ADDR64 = 486
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN = 487
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN_exact = 488
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_IDXEN = 489
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_IDXEN_exact = 490
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_OFFEN = 491
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_OFFEN_exact = 492
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_OFFSET = 493
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_OFFSET_exact = 494
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_ADDR64 = 495
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_BOTHEN = 496
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_BOTHEN_exact = 497
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_IDXEN = 498
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_IDXEN_exact = 499
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFEN = 500
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFEN_exact = 501
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFSET = 502
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFSET_exact = 503
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_ADDR64 = 504
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN = 505
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN_exact = 506
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_IDXEN = 507
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_IDXEN_exact = 508
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_OFFEN = 509
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_OFFEN_exact = 510
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_OFFSET = 511
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_OFFSET_exact = 512
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_ADDR64 = 513
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_BOTHEN = 514
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_BOTHEN_exact = 515
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_IDXEN = 516
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_IDXEN_exact = 517
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFEN = 518
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFEN_exact = 519
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFSET = 520
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFSET_exact = 521
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_ADDR64 = 522
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_BOTHEN = 523
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_BOTHEN_exact = 524
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_IDXEN = 525
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_IDXEN_exact = 526
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_OFFEN = 527
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_OFFEN_exact = 528
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_OFFSET = 529
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_OFFSET_exact = 530
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_gfx80_ADDR64 = 531
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_gfx80_BOTHEN = 532
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_gfx80_BOTHEN_exact = 533
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_gfx80_IDXEN = 534
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_gfx80_IDXEN_exact = 535
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFEN = 536
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFEN_exact = 537
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFSET = 538
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFSET_exact = 539
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_ADDR64 = 540
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_BOTHEN = 541
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_BOTHEN_exact = 542
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_IDXEN = 543
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_IDXEN_exact = 544
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_OFFEN = 545
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_OFFEN_exact = 546
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_OFFSET = 547
    Feature_HasPackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_OFFSET_exact = 548
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_gfx80_ADDR64 = 549
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_gfx80_BOTHEN = 550
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_gfx80_BOTHEN_exact = 551
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_gfx80_IDXEN = 552
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_gfx80_IDXEN_exact = 553
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_gfx80_OFFEN = 554
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_gfx80_OFFEN_exact = 555
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_gfx80_OFFSET = 556
    Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_gfx80_OFFSET_exact = 557
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZW_ADDR64 = 558
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZW_BOTHEN = 559
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZW_BOTHEN_exact = 560
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZW_IDXEN = 561
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZW_IDXEN_exact = 562
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZW_OFFEN = 563
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZW_OFFEN_exact = 564
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZW_OFFSET = 565
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZW_OFFSET_exact = 566
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZ_ADDR64 = 567
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZ_BOTHEN = 568
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZ_BOTHEN_exact = 569
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZ_IDXEN = 570
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZ_IDXEN_exact = 571
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZ_OFFEN = 572
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZ_OFFEN_exact = 573
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZ_OFFSET = 574
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XYZ_OFFSET_exact = 575
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XY_ADDR64 = 576
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XY_BOTHEN = 577
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XY_BOTHEN_exact = 578
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XY_IDXEN = 579
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XY_IDXEN_exact = 580
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XY_OFFEN = 581
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XY_OFFEN_exact = 582
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XY_OFFSET = 583
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_XY_OFFSET_exact = 584
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_ADDR64 = 585
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_BOTHEN = 586
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_BOTHEN_exact = 587
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_IDXEN = 588
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_IDXEN_exact = 589
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_LDS_ADDR64 = 590
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_LDS_BOTHEN = 591
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_LDS_BOTHEN_exact = 592
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_LDS_IDXEN = 593
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_LDS_IDXEN_exact = 594
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_LDS_OFFEN = 595
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_LDS_OFFEN_exact = 596
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_LDS_OFFSET = 597
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_LDS_OFFSET_exact = 598
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_OFFEN = 599
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_OFFEN_exact = 600
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_OFFSET = 601
    Feature_isGCN | 0, // BUFFER_LOAD_FORMAT_X_OFFSET_exact = 602
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_ADDR64 = 603
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_BOTHEN = 604
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_BOTHEN_exact = 605
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_ADDR64 = 606
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_BOTHEN = 607
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_BOTHEN_exact = 608
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_HI_ADDR64 = 609
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_HI_BOTHEN = 610
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_HI_BOTHEN_exact = 611
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_HI_IDXEN = 612
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_HI_IDXEN_exact = 613
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_HI_OFFEN = 614
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_HI_OFFEN_exact = 615
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_HI_OFFSET = 616
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_HI_OFFSET_exact = 617
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_IDXEN = 618
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_IDXEN_exact = 619
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_OFFEN = 620
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_OFFEN_exact = 621
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_OFFSET = 622
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SBYTE_D16_OFFSET_exact = 623
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_IDXEN = 624
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_IDXEN_exact = 625
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_LDS_ADDR64 = 626
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_LDS_BOTHEN = 627
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_LDS_BOTHEN_exact = 628
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_LDS_IDXEN = 629
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_LDS_IDXEN_exact = 630
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_LDS_OFFEN = 631
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_LDS_OFFEN_exact = 632
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_LDS_OFFSET = 633
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_LDS_OFFSET_exact = 634
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_OFFEN = 635
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_OFFEN_exact = 636
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_OFFSET = 637
    Feature_isGCN | 0, // BUFFER_LOAD_SBYTE_OFFSET_exact = 638
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_ADDR64 = 639
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_BOTHEN = 640
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_BOTHEN_exact = 641
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_HI_ADDR64 = 642
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_HI_BOTHEN = 643
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_HI_BOTHEN_exact = 644
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_HI_IDXEN = 645
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_HI_IDXEN_exact = 646
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_HI_OFFEN = 647
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_HI_OFFEN_exact = 648
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_HI_OFFSET = 649
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_HI_OFFSET_exact = 650
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_IDXEN = 651
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_IDXEN_exact = 652
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_OFFEN = 653
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_OFFEN_exact = 654
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_OFFSET = 655
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_SHORT_D16_OFFSET_exact = 656
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_ADDR64 = 657
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_BOTHEN = 658
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_BOTHEN_exact = 659
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_IDXEN = 660
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_IDXEN_exact = 661
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_LDS_ADDR64 = 662
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_LDS_BOTHEN = 663
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_LDS_BOTHEN_exact = 664
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_LDS_IDXEN = 665
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_LDS_IDXEN_exact = 666
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_LDS_OFFEN = 667
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_LDS_OFFEN_exact = 668
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_LDS_OFFSET = 669
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_LDS_OFFSET_exact = 670
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_OFFEN = 671
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_OFFEN_exact = 672
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_OFFSET = 673
    Feature_isGCN | 0, // BUFFER_LOAD_SSHORT_OFFSET_exact = 674
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_ADDR64 = 675
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_BOTHEN = 676
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_BOTHEN_exact = 677
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_ADDR64 = 678
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_BOTHEN = 679
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_BOTHEN_exact = 680
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_HI_ADDR64 = 681
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_HI_BOTHEN = 682
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_HI_BOTHEN_exact = 683
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_HI_IDXEN = 684
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_HI_IDXEN_exact = 685
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_HI_OFFEN = 686
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_HI_OFFEN_exact = 687
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_HI_OFFSET = 688
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_HI_OFFSET_exact = 689
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_IDXEN = 690
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_IDXEN_exact = 691
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_OFFEN = 692
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_OFFEN_exact = 693
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_OFFSET = 694
    Feature_HasD16LoadStore | 0, // BUFFER_LOAD_UBYTE_D16_OFFSET_exact = 695
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_IDXEN = 696
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_IDXEN_exact = 697
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_LDS_ADDR64 = 698
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_LDS_BOTHEN = 699
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_LDS_BOTHEN_exact = 700
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_LDS_IDXEN = 701
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_LDS_IDXEN_exact = 702
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_LDS_OFFEN = 703
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_LDS_OFFEN_exact = 704
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_LDS_OFFSET = 705
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_LDS_OFFSET_exact = 706
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_OFFEN = 707
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_OFFEN_exact = 708
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_OFFSET = 709
    Feature_isGCN | 0, // BUFFER_LOAD_UBYTE_OFFSET_exact = 710
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_ADDR64 = 711
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_BOTHEN = 712
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_BOTHEN_exact = 713
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_IDXEN = 714
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_IDXEN_exact = 715
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_LDS_ADDR64 = 716
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_LDS_BOTHEN = 717
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_LDS_BOTHEN_exact = 718
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_LDS_IDXEN = 719
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_LDS_IDXEN_exact = 720
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_LDS_OFFEN = 721
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_LDS_OFFEN_exact = 722
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_LDS_OFFSET = 723
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_LDS_OFFSET_exact = 724
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_OFFEN = 725
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_OFFEN_exact = 726
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_OFFSET = 727
    Feature_isGCN | 0, // BUFFER_LOAD_USHORT_OFFSET_exact = 728
    Feature_isGCN | 0, // BUFFER_STORE_BYTE_ADDR64 = 729
    Feature_isGCN | 0, // BUFFER_STORE_BYTE_BOTHEN = 730
    Feature_isGCN | 0, // BUFFER_STORE_BYTE_BOTHEN_exact = 731
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_BYTE_D16_HI_ADDR64 = 732
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_BYTE_D16_HI_BOTHEN = 733
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_BYTE_D16_HI_BOTHEN_exact = 734
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_BYTE_D16_HI_IDXEN = 735
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_BYTE_D16_HI_IDXEN_exact = 736
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_BYTE_D16_HI_OFFEN = 737
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_BYTE_D16_HI_OFFEN_exact = 738
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_BYTE_D16_HI_OFFSET = 739
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_BYTE_D16_HI_OFFSET_exact = 740
    Feature_isGCN | 0, // BUFFER_STORE_BYTE_IDXEN = 741
    Feature_isGCN | 0, // BUFFER_STORE_BYTE_IDXEN_exact = 742
    Feature_isGCN | 0, // BUFFER_STORE_BYTE_OFFEN = 743
    Feature_isGCN | 0, // BUFFER_STORE_BYTE_OFFEN_exact = 744
    Feature_isGCN | 0, // BUFFER_STORE_BYTE_OFFSET = 745
    Feature_isGCN | 0, // BUFFER_STORE_BYTE_OFFSET_exact = 746
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX2_ADDR64 = 747
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX2_BOTHEN = 748
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX2_BOTHEN_exact = 749
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX2_IDXEN = 750
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX2_IDXEN_exact = 751
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX2_OFFEN = 752
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX2_OFFEN_exact = 753
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX2_OFFSET = 754
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX2_OFFSET_exact = 755
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX3_ADDR64 = 756
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX3_BOTHEN = 757
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX3_BOTHEN_exact = 758
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX3_IDXEN = 759
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX3_IDXEN_exact = 760
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX3_OFFEN = 761
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX3_OFFEN_exact = 762
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX3_OFFSET = 763
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX3_OFFSET_exact = 764
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX4_ADDR64 = 765
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX4_BOTHEN = 766
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX4_BOTHEN_exact = 767
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX4_IDXEN = 768
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX4_IDXEN_exact = 769
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX4_OFFEN = 770
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX4_OFFEN_exact = 771
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX4_OFFSET = 772
    Feature_isGCN | 0, // BUFFER_STORE_DWORDX4_OFFSET_exact = 773
    Feature_isGCN | 0, // BUFFER_STORE_DWORD_ADDR64 = 774
    Feature_isGCN | 0, // BUFFER_STORE_DWORD_BOTHEN = 775
    Feature_isGCN | 0, // BUFFER_STORE_DWORD_BOTHEN_exact = 776
    Feature_isGCN | 0, // BUFFER_STORE_DWORD_IDXEN = 777
    Feature_isGCN | 0, // BUFFER_STORE_DWORD_IDXEN_exact = 778
    Feature_isGCN | 0, // BUFFER_STORE_DWORD_OFFEN = 779
    Feature_isGCN | 0, // BUFFER_STORE_DWORD_OFFEN_exact = 780
    Feature_isGCN | 0, // BUFFER_STORE_DWORD_OFFSET = 781
    Feature_isGCN | 0, // BUFFER_STORE_DWORD_OFFSET_exact = 782
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_FORMAT_D16_HI_X_ADDR64 = 783
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_FORMAT_D16_HI_X_BOTHEN = 784
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_FORMAT_D16_HI_X_BOTHEN_exact = 785
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_FORMAT_D16_HI_X_IDXEN = 786
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_FORMAT_D16_HI_X_IDXEN_exact = 787
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_FORMAT_D16_HI_X_OFFEN = 788
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_FORMAT_D16_HI_X_OFFEN_exact = 789
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_FORMAT_D16_HI_X_OFFSET = 790
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_FORMAT_D16_HI_X_OFFSET_exact = 791
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_ADDR64 = 792
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_BOTHEN = 793
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_BOTHEN_exact = 794
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_IDXEN = 795
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_IDXEN_exact = 796
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_OFFEN = 797
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_OFFEN_exact = 798
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_OFFSET = 799
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_OFFSET_exact = 800
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_gfx80_ADDR64 = 801
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_gfx80_BOTHEN = 802
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_gfx80_BOTHEN_exact = 803
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_gfx80_IDXEN = 804
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_gfx80_IDXEN_exact = 805
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFEN = 806
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFEN_exact = 807
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFSET = 808
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFSET_exact = 809
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_ADDR64 = 810
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_BOTHEN = 811
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_BOTHEN_exact = 812
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_IDXEN = 813
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_IDXEN_exact = 814
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_OFFEN = 815
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_OFFEN_exact = 816
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_OFFSET = 817
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_OFFSET_exact = 818
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_gfx80_ADDR64 = 819
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_gfx80_BOTHEN = 820
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_gfx80_BOTHEN_exact = 821
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_gfx80_IDXEN = 822
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_gfx80_IDXEN_exact = 823
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFEN = 824
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFEN_exact = 825
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFSET = 826
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFSET_exact = 827
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_ADDR64 = 828
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_BOTHEN = 829
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_BOTHEN_exact = 830
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_IDXEN = 831
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_IDXEN_exact = 832
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_OFFEN = 833
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_OFFEN_exact = 834
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_OFFSET = 835
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_OFFSET_exact = 836
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_gfx80_ADDR64 = 837
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_gfx80_BOTHEN = 838
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_gfx80_BOTHEN_exact = 839
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_gfx80_IDXEN = 840
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_gfx80_IDXEN_exact = 841
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_gfx80_OFFEN = 842
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_gfx80_OFFEN_exact = 843
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_gfx80_OFFSET = 844
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_gfx80_OFFSET_exact = 845
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_ADDR64 = 846
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_BOTHEN = 847
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_BOTHEN_exact = 848
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_IDXEN = 849
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_IDXEN_exact = 850
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_OFFEN = 851
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_OFFEN_exact = 852
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_OFFSET = 853
    Feature_HasPackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_OFFSET_exact = 854
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_gfx80_ADDR64 = 855
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_gfx80_BOTHEN = 856
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_gfx80_BOTHEN_exact = 857
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_gfx80_IDXEN = 858
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_gfx80_IDXEN_exact = 859
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_gfx80_OFFEN = 860
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_gfx80_OFFEN_exact = 861
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_gfx80_OFFSET = 862
    Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_gfx80_OFFSET_exact = 863
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZW_ADDR64 = 864
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZW_BOTHEN = 865
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZW_BOTHEN_exact = 866
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZW_IDXEN = 867
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZW_IDXEN_exact = 868
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZW_OFFEN = 869
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZW_OFFEN_exact = 870
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZW_OFFSET = 871
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZW_OFFSET_exact = 872
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZ_ADDR64 = 873
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZ_BOTHEN = 874
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZ_BOTHEN_exact = 875
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZ_IDXEN = 876
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZ_IDXEN_exact = 877
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZ_OFFEN = 878
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZ_OFFEN_exact = 879
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZ_OFFSET = 880
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XYZ_OFFSET_exact = 881
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XY_ADDR64 = 882
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XY_BOTHEN = 883
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XY_BOTHEN_exact = 884
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XY_IDXEN = 885
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XY_IDXEN_exact = 886
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XY_OFFEN = 887
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XY_OFFEN_exact = 888
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XY_OFFSET = 889
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_XY_OFFSET_exact = 890
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_X_ADDR64 = 891
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_X_BOTHEN = 892
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_X_BOTHEN_exact = 893
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_X_IDXEN = 894
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_X_IDXEN_exact = 895
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_X_OFFEN = 896
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_X_OFFEN_exact = 897
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_X_OFFSET = 898
    Feature_isGCN | 0, // BUFFER_STORE_FORMAT_X_OFFSET_exact = 899
    Feature_isVI | 0, // BUFFER_STORE_LDS_DWORD = 900
    Feature_isGCN | 0, // BUFFER_STORE_SHORT_ADDR64 = 901
    Feature_isGCN | 0, // BUFFER_STORE_SHORT_BOTHEN = 902
    Feature_isGCN | 0, // BUFFER_STORE_SHORT_BOTHEN_exact = 903
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_SHORT_D16_HI_ADDR64 = 904
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_SHORT_D16_HI_BOTHEN = 905
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_SHORT_D16_HI_BOTHEN_exact = 906
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_SHORT_D16_HI_IDXEN = 907
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_SHORT_D16_HI_IDXEN_exact = 908
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_SHORT_D16_HI_OFFEN = 909
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_SHORT_D16_HI_OFFEN_exact = 910
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_SHORT_D16_HI_OFFSET = 911
    Feature_HasD16LoadStore | 0, // BUFFER_STORE_SHORT_D16_HI_OFFSET_exact = 912
    Feature_isGCN | 0, // BUFFER_STORE_SHORT_IDXEN = 913
    Feature_isGCN | 0, // BUFFER_STORE_SHORT_IDXEN_exact = 914
    Feature_isGCN | 0, // BUFFER_STORE_SHORT_OFFEN = 915
    Feature_isGCN | 0, // BUFFER_STORE_SHORT_OFFEN_exact = 916
    Feature_isGCN | 0, // BUFFER_STORE_SHORT_OFFSET = 917
    Feature_isGCN | 0, // BUFFER_STORE_SHORT_OFFSET_exact = 918
    Feature_isGCN | 0, // BUFFER_WBINVL1 = 919
    Feature_isSI | 0, // BUFFER_WBINVL1_SC = 920
    Feature_isCIVI | 0, // BUFFER_WBINVL1_VOL = 921
    Feature_isGCN | 0, // DS_ADD_F32 = 922
    Feature_isGCN | 0, // DS_ADD_F32_gfx9 = 923
    Feature_isGCN | 0, // DS_ADD_RTN_F32 = 924
    Feature_isGCN | 0, // DS_ADD_RTN_F32_gfx9 = 925
    Feature_isGCN | 0, // DS_ADD_RTN_U32 = 926
    Feature_isGCN | 0, // DS_ADD_RTN_U32_gfx9 = 927
    Feature_isGCN | 0, // DS_ADD_RTN_U64 = 928
    Feature_isGCN | 0, // DS_ADD_RTN_U64_gfx9 = 929
    Feature_isVI | 0, // DS_ADD_SRC2_F32 = 930
    Feature_isGCN | 0, // DS_ADD_SRC2_U32 = 931
    Feature_isGCN | 0, // DS_ADD_SRC2_U64 = 932
    Feature_isGCN | 0, // DS_ADD_U32 = 933
    Feature_isGCN | 0, // DS_ADD_U32_gfx9 = 934
    Feature_isGCN | 0, // DS_ADD_U64 = 935
    Feature_isGCN | 0, // DS_ADD_U64_gfx9 = 936
    Feature_isGCN | 0, // DS_AND_B32 = 937
    Feature_isGCN | 0, // DS_AND_B32_gfx9 = 938
    Feature_isGCN | 0, // DS_AND_B64 = 939
    Feature_isGCN | 0, // DS_AND_B64_gfx9 = 940
    Feature_isGCN | 0, // DS_AND_RTN_B32 = 941
    Feature_isGCN | 0, // DS_AND_RTN_B32_gfx9 = 942
    Feature_isGCN | 0, // DS_AND_RTN_B64 = 943
    Feature_isGCN | 0, // DS_AND_RTN_B64_gfx9 = 944
    Feature_isGCN | 0, // DS_AND_SRC2_B32 = 945
    Feature_isGCN | 0, // DS_AND_SRC2_B64 = 946
    Feature_isGCN | 0, // DS_APPEND = 947
    Feature_isVI | 0, // DS_BPERMUTE_B32 = 948
    Feature_isGCN | 0, // DS_CMPST_B32 = 949
    Feature_isGCN | 0, // DS_CMPST_B32_gfx9 = 950
    Feature_isGCN | 0, // DS_CMPST_B64 = 951
    Feature_isGCN | 0, // DS_CMPST_B64_gfx9 = 952
    Feature_isGCN | 0, // DS_CMPST_F32 = 953
    Feature_isGCN | 0, // DS_CMPST_F32_gfx9 = 954
    Feature_isGCN | 0, // DS_CMPST_F64 = 955
    Feature_isGCN | 0, // DS_CMPST_F64_gfx9 = 956
    Feature_isGCN | 0, // DS_CMPST_RTN_B32 = 957
    Feature_isGCN | 0, // DS_CMPST_RTN_B32_gfx9 = 958
    Feature_isGCN | 0, // DS_CMPST_RTN_B64 = 959
    Feature_isGCN | 0, // DS_CMPST_RTN_B64_gfx9 = 960
    Feature_isGCN | 0, // DS_CMPST_RTN_F32 = 961
    Feature_isGCN | 0, // DS_CMPST_RTN_F32_gfx9 = 962
    Feature_isGCN | 0, // DS_CMPST_RTN_F64 = 963
    Feature_isGCN | 0, // DS_CMPST_RTN_F64_gfx9 = 964
    Feature_isCIVI | 0, // DS_CONDXCHG32_RTN_B64 = 965
    Feature_isCIVI | 0, // DS_CONDXCHG32_RTN_B64_gfx9 = 966
    Feature_isGCN | 0, // DS_CONSUME = 967
    Feature_isGCN | 0, // DS_DEC_RTN_U32 = 968
    Feature_isGCN | 0, // DS_DEC_RTN_U32_gfx9 = 969
    Feature_isGCN | 0, // DS_DEC_RTN_U64 = 970
    Feature_isGCN | 0, // DS_DEC_RTN_U64_gfx9 = 971
    Feature_isGCN | 0, // DS_DEC_SRC2_U32 = 972
    Feature_isGCN | 0, // DS_DEC_SRC2_U64 = 973
    Feature_isGCN | 0, // DS_DEC_U32 = 974
    Feature_isGCN | 0, // DS_DEC_U32_gfx9 = 975
    Feature_isGCN | 0, // DS_DEC_U64 = 976
    Feature_isGCN | 0, // DS_DEC_U64_gfx9 = 977
    Feature_isGCN | 0, // DS_GWS_BARRIER = 978
    Feature_isGCN | 0, // DS_GWS_INIT = 979
    Feature_isGCN | 0, // DS_GWS_SEMA_BR = 980
    Feature_isGCN | 0, // DS_GWS_SEMA_P = 981
    Feature_isCIVI | 0, // DS_GWS_SEMA_RELEASE_ALL = 982
    Feature_isGCN | 0, // DS_GWS_SEMA_V = 983
    Feature_isGCN | 0, // DS_INC_RTN_U32 = 984
    Feature_isGCN | 0, // DS_INC_RTN_U32_gfx9 = 985
    Feature_isGCN | 0, // DS_INC_RTN_U64 = 986
    Feature_isGCN | 0, // DS_INC_RTN_U64_gfx9 = 987
    Feature_isGCN | 0, // DS_INC_SRC2_U32 = 988
    Feature_isGCN | 0, // DS_INC_SRC2_U64 = 989
    Feature_isGCN | 0, // DS_INC_U32 = 990
    Feature_isGCN | 0, // DS_INC_U32_gfx9 = 991
    Feature_isGCN | 0, // DS_INC_U64 = 992
    Feature_isGCN | 0, // DS_INC_U64_gfx9 = 993
    Feature_isGCN | 0, // DS_MAX_F32 = 994
    Feature_isGCN | 0, // DS_MAX_F32_gfx9 = 995
    Feature_isGCN | 0, // DS_MAX_F64 = 996
    Feature_isGCN | 0, // DS_MAX_F64_gfx9 = 997
    Feature_isGCN | 0, // DS_MAX_I32 = 998
    Feature_isGCN | 0, // DS_MAX_I32_gfx9 = 999
    Feature_isGCN | 0, // DS_MAX_I64 = 1000
    Feature_isGCN | 0, // DS_MAX_I64_gfx9 = 1001
    Feature_isGCN | 0, // DS_MAX_RTN_F32 = 1002
    Feature_isGCN | 0, // DS_MAX_RTN_F32_gfx9 = 1003
    Feature_isGCN | 0, // DS_MAX_RTN_F64 = 1004
    Feature_isGCN | 0, // DS_MAX_RTN_F64_gfx9 = 1005
    Feature_isGCN | 0, // DS_MAX_RTN_I32 = 1006
    Feature_isGCN | 0, // DS_MAX_RTN_I32_gfx9 = 1007
    Feature_isGCN | 0, // DS_MAX_RTN_I64 = 1008
    Feature_isGCN | 0, // DS_MAX_RTN_I64_gfx9 = 1009
    Feature_isGCN | 0, // DS_MAX_RTN_U32 = 1010
    Feature_isGCN | 0, // DS_MAX_RTN_U32_gfx9 = 1011
    Feature_isGCN | 0, // DS_MAX_RTN_U64 = 1012
    Feature_isGCN | 0, // DS_MAX_RTN_U64_gfx9 = 1013
    Feature_isGCN | 0, // DS_MAX_SRC2_F32 = 1014
    Feature_isGCN | 0, // DS_MAX_SRC2_F64 = 1015
    Feature_isGCN | 0, // DS_MAX_SRC2_I32 = 1016
    Feature_isGCN | 0, // DS_MAX_SRC2_I64 = 1017
    Feature_isGCN | 0, // DS_MAX_SRC2_U32 = 1018
    Feature_isGCN | 0, // DS_MAX_SRC2_U64 = 1019
    Feature_isGCN | 0, // DS_MAX_U32 = 1020
    Feature_isGCN | 0, // DS_MAX_U32_gfx9 = 1021
    Feature_isGCN | 0, // DS_MAX_U64 = 1022
    Feature_isGCN | 0, // DS_MAX_U64_gfx9 = 1023
    Feature_isGCN | 0, // DS_MIN_F32 = 1024
    Feature_isGCN | 0, // DS_MIN_F32_gfx9 = 1025
    Feature_isGCN | 0, // DS_MIN_F64 = 1026
    Feature_isGCN | 0, // DS_MIN_F64_gfx9 = 1027
    Feature_isGCN | 0, // DS_MIN_I32 = 1028
    Feature_isGCN | 0, // DS_MIN_I32_gfx9 = 1029
    Feature_isGCN | 0, // DS_MIN_I64 = 1030
    Feature_isGCN | 0, // DS_MIN_I64_gfx9 = 1031
    Feature_isGCN | 0, // DS_MIN_RTN_F32 = 1032
    Feature_isGCN | 0, // DS_MIN_RTN_F32_gfx9 = 1033
    Feature_isGCN | 0, // DS_MIN_RTN_F64 = 1034
    Feature_isGCN | 0, // DS_MIN_RTN_F64_gfx9 = 1035
    Feature_isGCN | 0, // DS_MIN_RTN_I32 = 1036
    Feature_isGCN | 0, // DS_MIN_RTN_I32_gfx9 = 1037
    Feature_isGCN | 0, // DS_MIN_RTN_I64 = 1038
    Feature_isGCN | 0, // DS_MIN_RTN_I64_gfx9 = 1039
    Feature_isGCN | 0, // DS_MIN_RTN_U32 = 1040
    Feature_isGCN | 0, // DS_MIN_RTN_U32_gfx9 = 1041
    Feature_isGCN | 0, // DS_MIN_RTN_U64 = 1042
    Feature_isGCN | 0, // DS_MIN_RTN_U64_gfx9 = 1043
    Feature_isGCN | 0, // DS_MIN_SRC2_F32 = 1044
    Feature_isGCN | 0, // DS_MIN_SRC2_F64 = 1045
    Feature_isGCN | 0, // DS_MIN_SRC2_I32 = 1046
    Feature_isGCN | 0, // DS_MIN_SRC2_I64 = 1047
    Feature_isGCN | 0, // DS_MIN_SRC2_U32 = 1048
    Feature_isGCN | 0, // DS_MIN_SRC2_U64 = 1049
    Feature_isGCN | 0, // DS_MIN_U32 = 1050
    Feature_isGCN | 0, // DS_MIN_U32_gfx9 = 1051
    Feature_isGCN | 0, // DS_MIN_U64 = 1052
    Feature_isGCN | 0, // DS_MIN_U64_gfx9 = 1053
    Feature_isGCN | 0, // DS_MSKOR_B32 = 1054
    Feature_isGCN | 0, // DS_MSKOR_B32_gfx9 = 1055
    Feature_isGCN | 0, // DS_MSKOR_B64 = 1056
    Feature_isGCN | 0, // DS_MSKOR_B64_gfx9 = 1057
    Feature_isGCN | 0, // DS_MSKOR_RTN_B32 = 1058
    Feature_isGCN | 0, // DS_MSKOR_RTN_B32_gfx9 = 1059
    Feature_isGCN | 0, // DS_MSKOR_RTN_B64 = 1060
    Feature_isGCN | 0, // DS_MSKOR_RTN_B64_gfx9 = 1061
    Feature_isCIVI | 0, // DS_NOP = 1062
    Feature_isGCN | 0, // DS_ORDERED_COUNT = 1063
    Feature_isGCN | 0, // DS_OR_B32 = 1064
    Feature_isGCN | 0, // DS_OR_B32_gfx9 = 1065
    Feature_isGCN | 0, // DS_OR_B64 = 1066
    Feature_isGCN | 0, // DS_OR_B64_gfx9 = 1067
    Feature_isGCN | 0, // DS_OR_RTN_B32 = 1068
    Feature_isGCN | 0, // DS_OR_RTN_B32_gfx9 = 1069
    Feature_isGCN | 0, // DS_OR_RTN_B64 = 1070
    Feature_isGCN | 0, // DS_OR_RTN_B64_gfx9 = 1071
    Feature_isGCN | 0, // DS_OR_SRC2_B32 = 1072
    Feature_isGCN | 0, // DS_OR_SRC2_B64 = 1073
    Feature_isVI | 0, // DS_PERMUTE_B32 = 1074
    Feature_isGCN | 0, // DS_READ2ST64_B32 = 1075
    Feature_isGCN | 0, // DS_READ2ST64_B32_gfx9 = 1076
    Feature_isGCN | 0, // DS_READ2ST64_B64 = 1077
    Feature_isGCN | 0, // DS_READ2ST64_B64_gfx9 = 1078
    Feature_isGCN | 0, // DS_READ2_B32 = 1079
    Feature_isGCN | 0, // DS_READ2_B32_gfx9 = 1080
    Feature_isGCN | 0, // DS_READ2_B64 = 1081
    Feature_isGCN | 0, // DS_READ2_B64_gfx9 = 1082
    Feature_HasDSAddTid | 0, // DS_READ_ADDTID_B32 = 1083
    Feature_isCIVI | 0, // DS_READ_B128 = 1084
    Feature_isCIVI | 0, // DS_READ_B128_gfx9 = 1085
    Feature_isGCN | 0, // DS_READ_B32 = 1086
    Feature_isGCN | 0, // DS_READ_B32_gfx9 = 1087
    Feature_isGCN | 0, // DS_READ_B64 = 1088
    Feature_isGCN | 0, // DS_READ_B64_gfx9 = 1089
    Feature_isCIVI | 0, // DS_READ_B96 = 1090
    Feature_isCIVI | 0, // DS_READ_B96_gfx9 = 1091
    Feature_isGCN | 0, // DS_READ_I16 = 1092
    Feature_isGCN | 0, // DS_READ_I16_gfx9 = 1093
    Feature_isGCN | 0, // DS_READ_I8 = 1094
    Feature_HasD16LoadStore | 0, // DS_READ_I8_D16 = 1095
    Feature_HasD16LoadStore | 0, // DS_READ_I8_D16_HI = 1096
    Feature_isGCN | 0, // DS_READ_I8_gfx9 = 1097
    Feature_isGCN | 0, // DS_READ_U16 = 1098
    Feature_HasD16LoadStore | 0, // DS_READ_U16_D16 = 1099
    Feature_HasD16LoadStore | 0, // DS_READ_U16_D16_HI = 1100
    Feature_isGCN | 0, // DS_READ_U16_gfx9 = 1101
    Feature_isGCN | 0, // DS_READ_U8 = 1102
    Feature_HasD16LoadStore | 0, // DS_READ_U8_D16 = 1103
    Feature_HasD16LoadStore | 0, // DS_READ_U8_D16_HI = 1104
    Feature_isGCN | 0, // DS_READ_U8_gfx9 = 1105
    Feature_isGCN | 0, // DS_RSUB_RTN_U32 = 1106
    Feature_isGCN | 0, // DS_RSUB_RTN_U32_gfx9 = 1107
    Feature_isGCN | 0, // DS_RSUB_RTN_U64 = 1108
    Feature_isGCN | 0, // DS_RSUB_RTN_U64_gfx9 = 1109
    Feature_isGCN | 0, // DS_RSUB_SRC2_U32 = 1110
    Feature_isGCN | 0, // DS_RSUB_SRC2_U64 = 1111
    Feature_isGCN | 0, // DS_RSUB_U32 = 1112
    Feature_isGCN | 0, // DS_RSUB_U32_gfx9 = 1113
    Feature_isGCN | 0, // DS_RSUB_U64 = 1114
    Feature_isGCN | 0, // DS_RSUB_U64_gfx9 = 1115
    Feature_isGCN | 0, // DS_SUB_RTN_U32 = 1116
    Feature_isGCN | 0, // DS_SUB_RTN_U32_gfx9 = 1117
    Feature_isGCN | 0, // DS_SUB_RTN_U64 = 1118
    Feature_isGCN | 0, // DS_SUB_RTN_U64_gfx9 = 1119
    Feature_isGCN | 0, // DS_SUB_SRC2_U32 = 1120
    Feature_isGCN | 0, // DS_SUB_SRC2_U64 = 1121
    Feature_isGCN | 0, // DS_SUB_U32 = 1122
    Feature_isGCN | 0, // DS_SUB_U32_gfx9 = 1123
    Feature_isGCN | 0, // DS_SUB_U64 = 1124
    Feature_isGCN | 0, // DS_SUB_U64_gfx9 = 1125
    Feature_isGCN | 0, // DS_SWIZZLE_B32 = 1126
    Feature_isCIVI | 0, // DS_WRAP_RTN_B32 = 1127
    Feature_isCIVI | 0, // DS_WRAP_RTN_B32_gfx9 = 1128
    Feature_isGCN | 0, // DS_WRITE2ST64_B32 = 1129
    Feature_isGCN | 0, // DS_WRITE2ST64_B32_gfx9 = 1130
    Feature_isGCN | 0, // DS_WRITE2ST64_B64 = 1131
    Feature_isGCN | 0, // DS_WRITE2ST64_B64_gfx9 = 1132
    Feature_isGCN | 0, // DS_WRITE2_B32 = 1133
    Feature_isGCN | 0, // DS_WRITE2_B32_gfx9 = 1134
    Feature_isGCN | 0, // DS_WRITE2_B64 = 1135
    Feature_isGCN | 0, // DS_WRITE2_B64_gfx9 = 1136
    Feature_HasDSAddTid | 0, // DS_WRITE_ADDTID_B32 = 1137
    Feature_isCIVI | 0, // DS_WRITE_B128 = 1138
    Feature_isCIVI | 0, // DS_WRITE_B128_gfx9 = 1139
    Feature_isGCN | 0, // DS_WRITE_B16 = 1140
    Feature_HasD16LoadStore | 0, // DS_WRITE_B16_D16_HI = 1141
    Feature_isGCN | 0, // DS_WRITE_B16_gfx9 = 1142
    Feature_isGCN | 0, // DS_WRITE_B32 = 1143
    Feature_isGCN | 0, // DS_WRITE_B32_gfx9 = 1144
    Feature_isGCN | 0, // DS_WRITE_B64 = 1145
    Feature_isGCN | 0, // DS_WRITE_B64_gfx9 = 1146
    Feature_isGCN | 0, // DS_WRITE_B8 = 1147
    Feature_HasD16LoadStore | 0, // DS_WRITE_B8_D16_HI = 1148
    Feature_isGCN | 0, // DS_WRITE_B8_gfx9 = 1149
    Feature_isCIVI | 0, // DS_WRITE_B96 = 1150
    Feature_isCIVI | 0, // DS_WRITE_B96_gfx9 = 1151
    Feature_isGCN | 0, // DS_WRITE_SRC2_B32 = 1152
    Feature_isGCN | 0, // DS_WRITE_SRC2_B64 = 1153
    Feature_isGCN | 0, // DS_WRXCHG2ST64_RTN_B32 = 1154
    Feature_isGCN | 0, // DS_WRXCHG2ST64_RTN_B32_gfx9 = 1155
    Feature_isGCN | 0, // DS_WRXCHG2ST64_RTN_B64 = 1156
    Feature_isGCN | 0, // DS_WRXCHG2ST64_RTN_B64_gfx9 = 1157
    Feature_isGCN | 0, // DS_WRXCHG2_RTN_B32 = 1158
    Feature_isGCN | 0, // DS_WRXCHG2_RTN_B32_gfx9 = 1159
    Feature_isGCN | 0, // DS_WRXCHG2_RTN_B64 = 1160
    Feature_isGCN | 0, // DS_WRXCHG2_RTN_B64_gfx9 = 1161
    Feature_isGCN | 0, // DS_WRXCHG_RTN_B32 = 1162
    Feature_isGCN | 0, // DS_WRXCHG_RTN_B32_gfx9 = 1163
    Feature_isGCN | 0, // DS_WRXCHG_RTN_B64 = 1164
    Feature_isGCN | 0, // DS_WRXCHG_RTN_B64_gfx9 = 1165
    Feature_isGCN | 0, // DS_XOR_B32 = 1166
    Feature_isGCN | 0, // DS_XOR_B32_gfx9 = 1167
    Feature_isGCN | 0, // DS_XOR_B64 = 1168
    Feature_isGCN | 0, // DS_XOR_B64_gfx9 = 1169
    Feature_isGCN | 0, // DS_XOR_RTN_B32 = 1170
    Feature_isGCN | 0, // DS_XOR_RTN_B32_gfx9 = 1171
    Feature_isGCN | 0, // DS_XOR_RTN_B64 = 1172
    Feature_isGCN | 0, // DS_XOR_RTN_B64_gfx9 = 1173
    Feature_isGCN | 0, // DS_XOR_SRC2_B32 = 1174
    Feature_isGCN | 0, // DS_XOR_SRC2_B64 = 1175
    Feature_isGCN | 0, // EXIT_WWM = 1176
    Feature_isGCN | 0, // EXP = 1177
    Feature_isGCN | 0, // EXP_DONE = 1178
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_ADD = 1179
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_ADD_RTN = 1180
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_ADD_X2 = 1181
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_ADD_X2_RTN = 1182
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_AND = 1183
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_AND_RTN = 1184
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_AND_X2 = 1185
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_AND_X2_RTN = 1186
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_CMPSWAP = 1187
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_CMPSWAP_RTN = 1188
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_CMPSWAP_X2 = 1189
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_CMPSWAP_X2_RTN = 1190
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_DEC = 1191
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_DEC_RTN = 1192
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_DEC_X2 = 1193
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_DEC_X2_RTN = 1194
    0, // FLAT_ATOMIC_FCMPSWAP = 1195
    0, // FLAT_ATOMIC_FCMPSWAP_RTN = 1196
    0, // FLAT_ATOMIC_FCMPSWAP_X2 = 1197
    0, // FLAT_ATOMIC_FCMPSWAP_X2_RTN = 1198
    0, // FLAT_ATOMIC_FMAX = 1199
    0, // FLAT_ATOMIC_FMAX_RTN = 1200
    0, // FLAT_ATOMIC_FMAX_X2 = 1201
    0, // FLAT_ATOMIC_FMAX_X2_RTN = 1202
    0, // FLAT_ATOMIC_FMIN = 1203
    0, // FLAT_ATOMIC_FMIN_RTN = 1204
    0, // FLAT_ATOMIC_FMIN_X2 = 1205
    0, // FLAT_ATOMIC_FMIN_X2_RTN = 1206
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_INC = 1207
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_INC_RTN = 1208
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_INC_X2 = 1209
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_INC_X2_RTN = 1210
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_OR = 1211
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_OR_RTN = 1212
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_OR_X2 = 1213
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_OR_X2_RTN = 1214
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SMAX = 1215
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SMAX_RTN = 1216
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SMAX_X2 = 1217
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SMAX_X2_RTN = 1218
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SMIN = 1219
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SMIN_RTN = 1220
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SMIN_X2 = 1221
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SMIN_X2_RTN = 1222
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SUB = 1223
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SUB_RTN = 1224
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SUB_X2 = 1225
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SUB_X2_RTN = 1226
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SWAP = 1227
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SWAP_RTN = 1228
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SWAP_X2 = 1229
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_SWAP_X2_RTN = 1230
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_UMAX = 1231
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_UMAX_RTN = 1232
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_UMAX_X2 = 1233
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_UMAX_X2_RTN = 1234
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_UMIN = 1235
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_UMIN_RTN = 1236
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_UMIN_X2 = 1237
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_UMIN_X2_RTN = 1238
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_XOR = 1239
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_XOR_RTN = 1240
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_XOR_X2 = 1241
    Feature_HasFlatAddressSpace | 0, // FLAT_ATOMIC_XOR_X2_RTN = 1242
    Feature_HasFlatAddressSpace | 0, // FLAT_LOAD_DWORD = 1243
    Feature_HasFlatAddressSpace | 0, // FLAT_LOAD_DWORDX2 = 1244
    Feature_HasFlatAddressSpace | 0, // FLAT_LOAD_DWORDX3 = 1245
    Feature_HasFlatAddressSpace | 0, // FLAT_LOAD_DWORDX4 = 1246
    Feature_HasFlatAddressSpace | 0, // FLAT_LOAD_SBYTE = 1247
    Feature_HasD16LoadStore | 0, // FLAT_LOAD_SBYTE_D16 = 1248
    Feature_HasD16LoadStore | 0, // FLAT_LOAD_SBYTE_D16_HI = 1249
    Feature_HasD16LoadStore | 0, // FLAT_LOAD_SHORT_D16 = 1250
    Feature_HasD16LoadStore | 0, // FLAT_LOAD_SHORT_D16_HI = 1251
    Feature_HasFlatAddressSpace | 0, // FLAT_LOAD_SSHORT = 1252
    Feature_HasFlatAddressSpace | 0, // FLAT_LOAD_UBYTE = 1253
    Feature_HasD16LoadStore | 0, // FLAT_LOAD_UBYTE_D16 = 1254
    Feature_HasD16LoadStore | 0, // FLAT_LOAD_UBYTE_D16_HI = 1255
    Feature_HasFlatAddressSpace | 0, // FLAT_LOAD_USHORT = 1256
    Feature_HasFlatAddressSpace | 0, // FLAT_STORE_BYTE = 1257
    Feature_HasD16LoadStore | 0, // FLAT_STORE_BYTE_D16_HI = 1258
    Feature_HasFlatAddressSpace | 0, // FLAT_STORE_DWORD = 1259
    Feature_HasFlatAddressSpace | 0, // FLAT_STORE_DWORDX2 = 1260
    Feature_HasFlatAddressSpace | 0, // FLAT_STORE_DWORDX3 = 1261
    Feature_HasFlatAddressSpace | 0, // FLAT_STORE_DWORDX4 = 1262
    Feature_HasFlatAddressSpace | 0, // FLAT_STORE_SHORT = 1263
    Feature_HasD16LoadStore | 0, // FLAT_STORE_SHORT_D16_HI = 1264
    Feature_isGCN | 0, // GET_GROUPSTATICSIZE = 1265
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_ADD = 1266
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_ADD_RTN = 1267
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_ADD_SADDR = 1268
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_ADD_SADDR_RTN = 1269
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_ADD_X2 = 1270
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_ADD_X2_RTN = 1271
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_ADD_X2_SADDR = 1272
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_ADD_X2_SADDR_RTN = 1273
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_AND = 1274
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_AND_RTN = 1275
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_AND_SADDR = 1276
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_AND_SADDR_RTN = 1277
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_AND_X2 = 1278
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_AND_X2_RTN = 1279
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_AND_X2_SADDR = 1280
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_AND_X2_SADDR_RTN = 1281
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_CMPSWAP = 1282
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_CMPSWAP_RTN = 1283
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_CMPSWAP_SADDR = 1284
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_CMPSWAP_SADDR_RTN = 1285
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_CMPSWAP_X2 = 1286
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_CMPSWAP_X2_RTN = 1287
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_CMPSWAP_X2_SADDR = 1288
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_CMPSWAP_X2_SADDR_RTN = 1289
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_DEC = 1290
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_DEC_RTN = 1291
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_DEC_SADDR = 1292
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_DEC_SADDR_RTN = 1293
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_DEC_X2 = 1294
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_DEC_X2_RTN = 1295
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_DEC_X2_SADDR = 1296
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_DEC_X2_SADDR_RTN = 1297
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_INC = 1298
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_INC_RTN = 1299
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_INC_SADDR = 1300
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_INC_SADDR_RTN = 1301
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_INC_X2 = 1302
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_INC_X2_RTN = 1303
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_INC_X2_SADDR = 1304
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_INC_X2_SADDR_RTN = 1305
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_OR = 1306
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_OR_RTN = 1307
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_OR_SADDR = 1308
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_OR_SADDR_RTN = 1309
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_OR_X2 = 1310
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_OR_X2_RTN = 1311
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_OR_X2_SADDR = 1312
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_OR_X2_SADDR_RTN = 1313
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMAX = 1314
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMAX_RTN = 1315
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMAX_SADDR = 1316
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMAX_SADDR_RTN = 1317
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMAX_X2 = 1318
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMAX_X2_RTN = 1319
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMAX_X2_SADDR = 1320
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMAX_X2_SADDR_RTN = 1321
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMIN = 1322
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMIN_RTN = 1323
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMIN_SADDR = 1324
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMIN_SADDR_RTN = 1325
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMIN_X2 = 1326
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMIN_X2_RTN = 1327
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMIN_X2_SADDR = 1328
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SMIN_X2_SADDR_RTN = 1329
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SUB = 1330
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SUB_RTN = 1331
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SUB_SADDR = 1332
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SUB_SADDR_RTN = 1333
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SUB_X2 = 1334
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SUB_X2_RTN = 1335
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SUB_X2_SADDR = 1336
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SUB_X2_SADDR_RTN = 1337
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SWAP = 1338
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SWAP_RTN = 1339
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SWAP_SADDR = 1340
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SWAP_SADDR_RTN = 1341
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SWAP_X2 = 1342
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SWAP_X2_RTN = 1343
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SWAP_X2_SADDR = 1344
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_SWAP_X2_SADDR_RTN = 1345
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMAX = 1346
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMAX_RTN = 1347
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMAX_SADDR = 1348
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMAX_SADDR_RTN = 1349
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMAX_X2 = 1350
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMAX_X2_RTN = 1351
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMAX_X2_SADDR = 1352
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMAX_X2_SADDR_RTN = 1353
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMIN = 1354
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMIN_RTN = 1355
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMIN_SADDR = 1356
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMIN_SADDR_RTN = 1357
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMIN_X2 = 1358
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMIN_X2_RTN = 1359
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMIN_X2_SADDR = 1360
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_UMIN_X2_SADDR_RTN = 1361
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_XOR = 1362
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_XOR_RTN = 1363
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_XOR_SADDR = 1364
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_XOR_SADDR_RTN = 1365
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_XOR_X2 = 1366
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_XOR_X2_RTN = 1367
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_XOR_X2_SADDR = 1368
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_ATOMIC_XOR_X2_SADDR_RTN = 1369
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_DWORD = 1370
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_DWORDX2 = 1371
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_DWORDX2_SADDR = 1372
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_DWORDX3 = 1373
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_DWORDX3_SADDR = 1374
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_DWORDX4 = 1375
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_DWORDX4_SADDR = 1376
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_DWORD_SADDR = 1377
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_SBYTE = 1378
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_SBYTE_D16 = 1379
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_SBYTE_D16_HI = 1380
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_SBYTE_D16_HI_SADDR = 1381
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_SBYTE_D16_SADDR = 1382
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_SBYTE_SADDR = 1383
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_SHORT_D16 = 1384
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_SHORT_D16_HI = 1385
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_SHORT_D16_HI_SADDR = 1386
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_SHORT_D16_SADDR = 1387
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_SSHORT = 1388
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_SSHORT_SADDR = 1389
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_UBYTE = 1390
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_UBYTE_D16 = 1391
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_UBYTE_D16_HI = 1392
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_UBYTE_D16_HI_SADDR = 1393
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_UBYTE_D16_SADDR = 1394
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_UBYTE_SADDR = 1395
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_USHORT = 1396
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_LOAD_USHORT_SADDR = 1397
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_BYTE = 1398
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_BYTE_D16_HI = 1399
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_BYTE_D16_HI_SADDR = 1400
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_BYTE_SADDR = 1401
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_DWORD = 1402
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_DWORDX2 = 1403
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_DWORDX2_SADDR = 1404
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_DWORDX3 = 1405
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_DWORDX3_SADDR = 1406
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_DWORDX4 = 1407
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_DWORDX4_SADDR = 1408
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_DWORD_SADDR = 1409
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_SHORT = 1410
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_SHORT_D16_HI = 1411
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_SHORT_D16_HI_SADDR = 1412
    Feature_HasFlatGlobalInsts | 0, // GLOBAL_STORE_SHORT_SADDR = 1413
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_DWORD = 1414
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_DWORDX2 = 1415
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_DWORDX2_SADDR = 1416
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_DWORDX3 = 1417
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_DWORDX3_SADDR = 1418
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_DWORDX4 = 1419
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_DWORDX4_SADDR = 1420
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_DWORD_SADDR = 1421
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_SBYTE = 1422
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_SBYTE_D16 = 1423
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_SBYTE_D16_HI = 1424
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_SBYTE_D16_HI_SADDR = 1425
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_SBYTE_D16_SADDR = 1426
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_SBYTE_SADDR = 1427
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_SHORT_D16 = 1428
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_SHORT_D16_HI = 1429
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_SHORT_D16_HI_SADDR = 1430
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_SHORT_D16_SADDR = 1431
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_SSHORT = 1432
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_SSHORT_SADDR = 1433
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_UBYTE = 1434
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_UBYTE_D16 = 1435
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_UBYTE_D16_HI = 1436
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_UBYTE_D16_HI_SADDR = 1437
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_UBYTE_D16_SADDR = 1438
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_UBYTE_SADDR = 1439
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_USHORT = 1440
    Feature_HasFlatScratchInsts | 0, // SCRATCH_LOAD_USHORT_SADDR = 1441
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_BYTE = 1442
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_BYTE_D16_HI = 1443
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_BYTE_D16_HI_SADDR = 1444
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_BYTE_SADDR = 1445
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_DWORD = 1446
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_DWORDX2 = 1447
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_DWORDX2_SADDR = 1448
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_DWORDX3 = 1449
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_DWORDX3_SADDR = 1450
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_DWORDX4 = 1451
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_DWORDX4_SADDR = 1452
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_DWORD_SADDR = 1453
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_SHORT = 1454
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_SHORT_D16_HI = 1455
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_SHORT_D16_HI_SADDR = 1456
    Feature_HasFlatScratchInsts | 0, // SCRATCH_STORE_SHORT_SADDR = 1457
    Feature_isGCN | 0, // SI_BR_UNDEF = 1458
    Feature_isGCN | 0, // SI_CALL = 1459
    Feature_isGCN | 0, // SI_CALL_ISEL = 1460
    Feature_isGCN | 0, // SI_ELSE = 1461
    Feature_isGCN | 0, // SI_END_CF = 1462
    Feature_isGCN | 0, // SI_IF = 1463
    Feature_isGCN | 0, // SI_IF_BREAK = 1464
    Feature_isGCN | 0, // SI_ILLEGAL_COPY = 1465
    Feature_isGCN | 0, // SI_INDIRECT_DST_V1 = 1466
    Feature_isGCN | 0, // SI_INDIRECT_DST_V16 = 1467
    Feature_isGCN | 0, // SI_INDIRECT_DST_V2 = 1468
    Feature_isGCN | 0, // SI_INDIRECT_DST_V4 = 1469
    Feature_isGCN | 0, // SI_INDIRECT_DST_V8 = 1470
    Feature_isGCN | 0, // SI_INDIRECT_SRC_V1 = 1471
    Feature_isGCN | 0, // SI_INDIRECT_SRC_V16 = 1472
    Feature_isGCN | 0, // SI_INDIRECT_SRC_V2 = 1473
    Feature_isGCN | 0, // SI_INDIRECT_SRC_V4 = 1474
    Feature_isGCN | 0, // SI_INDIRECT_SRC_V8 = 1475
    Feature_isGCN | 0, // SI_INIT_EXEC = 1476
    Feature_isGCN | 0, // SI_INIT_EXEC_FROM_INPUT = 1477
    Feature_isGCN | 0, // SI_INIT_M0 = 1478
    Feature_isGCN | 0, // SI_KILL_F32_COND_IMM_PSEUDO = 1479
    Feature_isGCN | 0, // SI_KILL_F32_COND_IMM_TERMINATOR = 1480
    Feature_isGCN | 0, // SI_KILL_I1_PSEUDO = 1481
    Feature_isGCN | 0, // SI_KILL_I1_TERMINATOR = 1482
    Feature_isGCN | 0, // SI_LOOP = 1483
    Feature_isGCN | 0, // SI_MASKED_UNREACHABLE = 1484
    Feature_isGCN | 0, // SI_MASK_BRANCH = 1485
    Feature_isGCN | 0, // SI_NON_UNIFORM_BRCOND_PSEUDO = 1486
    Feature_isGCN | 0, // SI_PC_ADD_REL_OFFSET = 1487
    Feature_isGCN | 0, // SI_PS_LIVE = 1488
    Feature_isGCN | 0, // SI_RETURN = 1489
    Feature_isGCN | 0, // SI_RETURN_TO_EPILOG = 1490
    Feature_isGCN | 0, // SI_SPILL_S128_RESTORE = 1491
    Feature_isGCN | 0, // SI_SPILL_S128_SAVE = 1492
    Feature_isGCN | 0, // SI_SPILL_S256_RESTORE = 1493
    Feature_isGCN | 0, // SI_SPILL_S256_SAVE = 1494
    Feature_isGCN | 0, // SI_SPILL_S32_RESTORE = 1495
    Feature_isGCN | 0, // SI_SPILL_S32_SAVE = 1496
    Feature_isGCN | 0, // SI_SPILL_S512_RESTORE = 1497
    Feature_isGCN | 0, // SI_SPILL_S512_SAVE = 1498
    Feature_isGCN | 0, // SI_SPILL_S64_RESTORE = 1499
    Feature_isGCN | 0, // SI_SPILL_S64_SAVE = 1500
    Feature_isGCN | 0, // SI_SPILL_V128_RESTORE = 1501
    Feature_isGCN | 0, // SI_SPILL_V128_SAVE = 1502
    Feature_isGCN | 0, // SI_SPILL_V256_RESTORE = 1503
    Feature_isGCN | 0, // SI_SPILL_V256_SAVE = 1504
    Feature_isGCN | 0, // SI_SPILL_V32_RESTORE = 1505
    Feature_isGCN | 0, // SI_SPILL_V32_SAVE = 1506
    Feature_isGCN | 0, // SI_SPILL_V512_RESTORE = 1507
    Feature_isGCN | 0, // SI_SPILL_V512_SAVE = 1508
    Feature_isGCN | 0, // SI_SPILL_V64_RESTORE = 1509
    Feature_isGCN | 0, // SI_SPILL_V64_SAVE = 1510
    Feature_isGCN | 0, // SI_SPILL_V96_RESTORE = 1511
    Feature_isGCN | 0, // SI_SPILL_V96_SAVE = 1512
    Feature_isGCN | 0, // SI_TCRETURN = 1513
    Feature_isGCN | 0, // SI_TCRETURN_ISEL = 1514
    Feature_isGCN | 0, // S_ABSDIFF_I32 = 1515
    Feature_isGCN | 0, // S_ABS_I32 = 1516
    Feature_isGCN | 0, // S_ADDC_U32 = 1517
    Feature_isGCN | 0, // S_ADDK_I32 = 1518
    Feature_isGCN | 0, // S_ADD_I32 = 1519
    Feature_isGCN | 0, // S_ADD_U32 = 1520
    Feature_isGCN | 0, // S_ADD_U64_CO_PSEUDO = 1521
    Feature_isGCN | 0, // S_ADD_U64_PSEUDO = 1522
    Feature_isGFX9 | 0, // S_ANDN1_SAVEEXEC_B64 = 1523
    Feature_isGFX9 | 0, // S_ANDN1_WREXEC_B64 = 1524
    Feature_isGCN | 0, // S_ANDN2_B32 = 1525
    Feature_isGCN | 0, // S_ANDN2_B64 = 1526
    Feature_isGCN | 0, // S_ANDN2_B64_term = 1527
    Feature_isGCN | 0, // S_ANDN2_SAVEEXEC_B64 = 1528
    Feature_isGFX9 | 0, // S_ANDN2_WREXEC_B64 = 1529
    Feature_isGCN | 0, // S_AND_B32 = 1530
    Feature_isGCN | 0, // S_AND_B64 = 1531
    Feature_isGCN | 0, // S_AND_SAVEEXEC_B64 = 1532
    Feature_isGCN | 0, // S_ASHR_I32 = 1533
    Feature_isGCN | 0, // S_ASHR_I64 = 1534
    Feature_isVI | 0, // S_ATC_PROBE_BUFFER_IMM = 1535
    Feature_isVI | 0, // S_ATC_PROBE_BUFFER_SGPR = 1536
    Feature_isVI | 0, // S_ATC_PROBE_IMM = 1537
    Feature_isVI | 0, // S_ATC_PROBE_SGPR = 1538
    Feature_HasScalarAtomics | 0, // S_ATOMIC_ADD_IMM = 1539
    Feature_HasScalarAtomics | 0, // S_ATOMIC_ADD_IMM_RTN = 1540
    Feature_HasScalarAtomics | 0, // S_ATOMIC_ADD_SGPR = 1541
    Feature_HasScalarAtomics | 0, // S_ATOMIC_ADD_SGPR_RTN = 1542
    Feature_HasScalarAtomics | 0, // S_ATOMIC_ADD_X2_IMM = 1543
    Feature_HasScalarAtomics | 0, // S_ATOMIC_ADD_X2_IMM_RTN = 1544
    Feature_HasScalarAtomics | 0, // S_ATOMIC_ADD_X2_SGPR = 1545
    Feature_HasScalarAtomics | 0, // S_ATOMIC_ADD_X2_SGPR_RTN = 1546
    Feature_HasScalarAtomics | 0, // S_ATOMIC_AND_IMM = 1547
    Feature_HasScalarAtomics | 0, // S_ATOMIC_AND_IMM_RTN = 1548
    Feature_HasScalarAtomics | 0, // S_ATOMIC_AND_SGPR = 1549
    Feature_HasScalarAtomics | 0, // S_ATOMIC_AND_SGPR_RTN = 1550
    Feature_HasScalarAtomics | 0, // S_ATOMIC_AND_X2_IMM = 1551
    Feature_HasScalarAtomics | 0, // S_ATOMIC_AND_X2_IMM_RTN = 1552
    Feature_HasScalarAtomics | 0, // S_ATOMIC_AND_X2_SGPR = 1553
    Feature_HasScalarAtomics | 0, // S_ATOMIC_AND_X2_SGPR_RTN = 1554
    Feature_HasScalarAtomics | 0, // S_ATOMIC_CMPSWAP_IMM = 1555
    Feature_HasScalarAtomics | 0, // S_ATOMIC_CMPSWAP_IMM_RTN = 1556
    Feature_HasScalarAtomics | 0, // S_ATOMIC_CMPSWAP_SGPR = 1557
    Feature_HasScalarAtomics | 0, // S_ATOMIC_CMPSWAP_SGPR_RTN = 1558
    Feature_HasScalarAtomics | 0, // S_ATOMIC_CMPSWAP_X2_IMM = 1559
    Feature_HasScalarAtomics | 0, // S_ATOMIC_CMPSWAP_X2_IMM_RTN = 1560
    Feature_HasScalarAtomics | 0, // S_ATOMIC_CMPSWAP_X2_SGPR = 1561
    Feature_HasScalarAtomics | 0, // S_ATOMIC_CMPSWAP_X2_SGPR_RTN = 1562
    Feature_HasScalarAtomics | 0, // S_ATOMIC_DEC_IMM = 1563
    Feature_HasScalarAtomics | 0, // S_ATOMIC_DEC_IMM_RTN = 1564
    Feature_HasScalarAtomics | 0, // S_ATOMIC_DEC_SGPR = 1565
    Feature_HasScalarAtomics | 0, // S_ATOMIC_DEC_SGPR_RTN = 1566
    Feature_HasScalarAtomics | 0, // S_ATOMIC_DEC_X2_IMM = 1567
    Feature_HasScalarAtomics | 0, // S_ATOMIC_DEC_X2_IMM_RTN = 1568
    Feature_HasScalarAtomics | 0, // S_ATOMIC_DEC_X2_SGPR = 1569
    Feature_HasScalarAtomics | 0, // S_ATOMIC_DEC_X2_SGPR_RTN = 1570
    Feature_HasScalarAtomics | 0, // S_ATOMIC_INC_IMM = 1571
    Feature_HasScalarAtomics | 0, // S_ATOMIC_INC_IMM_RTN = 1572
    Feature_HasScalarAtomics | 0, // S_ATOMIC_INC_SGPR = 1573
    Feature_HasScalarAtomics | 0, // S_ATOMIC_INC_SGPR_RTN = 1574
    Feature_HasScalarAtomics | 0, // S_ATOMIC_INC_X2_IMM = 1575
    Feature_HasScalarAtomics | 0, // S_ATOMIC_INC_X2_IMM_RTN = 1576
    Feature_HasScalarAtomics | 0, // S_ATOMIC_INC_X2_SGPR = 1577
    Feature_HasScalarAtomics | 0, // S_ATOMIC_INC_X2_SGPR_RTN = 1578
    Feature_HasScalarAtomics | 0, // S_ATOMIC_OR_IMM = 1579
    Feature_HasScalarAtomics | 0, // S_ATOMIC_OR_IMM_RTN = 1580
    Feature_HasScalarAtomics | 0, // S_ATOMIC_OR_SGPR = 1581
    Feature_HasScalarAtomics | 0, // S_ATOMIC_OR_SGPR_RTN = 1582
    Feature_HasScalarAtomics | 0, // S_ATOMIC_OR_X2_IMM = 1583
    Feature_HasScalarAtomics | 0, // S_ATOMIC_OR_X2_IMM_RTN = 1584
    Feature_HasScalarAtomics | 0, // S_ATOMIC_OR_X2_SGPR = 1585
    Feature_HasScalarAtomics | 0, // S_ATOMIC_OR_X2_SGPR_RTN = 1586
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMAX_IMM = 1587
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMAX_IMM_RTN = 1588
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMAX_SGPR = 1589
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMAX_SGPR_RTN = 1590
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMAX_X2_IMM = 1591
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMAX_X2_IMM_RTN = 1592
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMAX_X2_SGPR = 1593
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMAX_X2_SGPR_RTN = 1594
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMIN_IMM = 1595
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMIN_IMM_RTN = 1596
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMIN_SGPR = 1597
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMIN_SGPR_RTN = 1598
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMIN_X2_IMM = 1599
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMIN_X2_IMM_RTN = 1600
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMIN_X2_SGPR = 1601
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SMIN_X2_SGPR_RTN = 1602
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SUB_IMM = 1603
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SUB_IMM_RTN = 1604
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SUB_SGPR = 1605
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SUB_SGPR_RTN = 1606
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SUB_X2_IMM = 1607
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SUB_X2_IMM_RTN = 1608
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SUB_X2_SGPR = 1609
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SUB_X2_SGPR_RTN = 1610
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SWAP_IMM = 1611
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SWAP_IMM_RTN = 1612
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SWAP_SGPR = 1613
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SWAP_SGPR_RTN = 1614
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SWAP_X2_IMM = 1615
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SWAP_X2_IMM_RTN = 1616
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SWAP_X2_SGPR = 1617
    Feature_HasScalarAtomics | 0, // S_ATOMIC_SWAP_X2_SGPR_RTN = 1618
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMAX_IMM = 1619
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMAX_IMM_RTN = 1620
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMAX_SGPR = 1621
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMAX_SGPR_RTN = 1622
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMAX_X2_IMM = 1623
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMAX_X2_IMM_RTN = 1624
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMAX_X2_SGPR = 1625
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMAX_X2_SGPR_RTN = 1626
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMIN_IMM = 1627
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMIN_IMM_RTN = 1628
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMIN_SGPR = 1629
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMIN_SGPR_RTN = 1630
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMIN_X2_IMM = 1631
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMIN_X2_IMM_RTN = 1632
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMIN_X2_SGPR = 1633
    Feature_HasScalarAtomics | 0, // S_ATOMIC_UMIN_X2_SGPR_RTN = 1634
    Feature_HasScalarAtomics | 0, // S_ATOMIC_XOR_IMM = 1635
    Feature_HasScalarAtomics | 0, // S_ATOMIC_XOR_IMM_RTN = 1636
    Feature_HasScalarAtomics | 0, // S_ATOMIC_XOR_SGPR = 1637
    Feature_HasScalarAtomics | 0, // S_ATOMIC_XOR_SGPR_RTN = 1638
    Feature_HasScalarAtomics | 0, // S_ATOMIC_XOR_X2_IMM = 1639
    Feature_HasScalarAtomics | 0, // S_ATOMIC_XOR_X2_IMM_RTN = 1640
    Feature_HasScalarAtomics | 0, // S_ATOMIC_XOR_X2_SGPR = 1641
    Feature_HasScalarAtomics | 0, // S_ATOMIC_XOR_X2_SGPR_RTN = 1642
    Feature_isGCN | 0, // S_BCNT0_I32_B32 = 1643
    Feature_isGCN | 0, // S_BCNT0_I32_B64 = 1644
    Feature_isGCN | 0, // S_BCNT1_I32_B32 = 1645
    Feature_isGCN | 0, // S_BCNT1_I32_B64 = 1646
    Feature_isGCN | 0, // S_BFE_I32 = 1647
    Feature_isGCN | 0, // S_BFE_I64 = 1648
    Feature_isGCN | 0, // S_BFE_U32 = 1649
    Feature_isGCN | 0, // S_BFE_U64 = 1650
    Feature_isGCN | 0, // S_BFM_B32 = 1651
    Feature_isGCN | 0, // S_BFM_B64 = 1652
    Feature_isGFX9 | 0, // S_BITREPLICATE_B64_B32 = 1653
    Feature_isGCN | 0, // S_BITSET0_B32 = 1654
    Feature_isGCN | 0, // S_BITSET0_B64 = 1655
    Feature_isGCN | 0, // S_BITSET1_B32 = 1656
    Feature_isGCN | 0, // S_BITSET1_B64 = 1657
    Feature_isGCN | 0, // S_BREV_B32 = 1658
    Feature_isGCN | 0, // S_BREV_B64 = 1659
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_ADD_IMM = 1660
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_ADD_IMM_RTN = 1661
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_ADD_SGPR = 1662
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_ADD_SGPR_RTN = 1663
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_ADD_X2_IMM = 1664
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_ADD_X2_IMM_RTN = 1665
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_ADD_X2_SGPR = 1666
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_ADD_X2_SGPR_RTN = 1667
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_AND_IMM = 1668
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_AND_IMM_RTN = 1669
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_AND_SGPR = 1670
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_AND_SGPR_RTN = 1671
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_AND_X2_IMM = 1672
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_AND_X2_IMM_RTN = 1673
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_AND_X2_SGPR = 1674
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_AND_X2_SGPR_RTN = 1675
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_CMPSWAP_IMM = 1676
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_CMPSWAP_IMM_RTN = 1677
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_CMPSWAP_SGPR = 1678
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_CMPSWAP_SGPR_RTN = 1679
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_CMPSWAP_X2_IMM = 1680
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_CMPSWAP_X2_IMM_RTN = 1681
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_CMPSWAP_X2_SGPR = 1682
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_CMPSWAP_X2_SGPR_RTN = 1683
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_DEC_IMM = 1684
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_DEC_IMM_RTN = 1685
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_DEC_SGPR = 1686
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_DEC_SGPR_RTN = 1687
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_DEC_X2_IMM = 1688
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_DEC_X2_IMM_RTN = 1689
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_DEC_X2_SGPR = 1690
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_DEC_X2_SGPR_RTN = 1691
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_INC_IMM = 1692
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_INC_IMM_RTN = 1693
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_INC_SGPR = 1694
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_INC_SGPR_RTN = 1695
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_INC_X2_IMM = 1696
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_INC_X2_IMM_RTN = 1697
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_INC_X2_SGPR = 1698
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_INC_X2_SGPR_RTN = 1699
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_OR_IMM = 1700
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_OR_IMM_RTN = 1701
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_OR_SGPR = 1702
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_OR_SGPR_RTN = 1703
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_OR_X2_IMM = 1704
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_OR_X2_IMM_RTN = 1705
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_OR_X2_SGPR = 1706
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_OR_X2_SGPR_RTN = 1707
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMAX_IMM = 1708
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMAX_IMM_RTN = 1709
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMAX_SGPR = 1710
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMAX_SGPR_RTN = 1711
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMAX_X2_IMM = 1712
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMAX_X2_IMM_RTN = 1713
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMAX_X2_SGPR = 1714
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMAX_X2_SGPR_RTN = 1715
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMIN_IMM = 1716
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMIN_IMM_RTN = 1717
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMIN_SGPR = 1718
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMIN_SGPR_RTN = 1719
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMIN_X2_IMM = 1720
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMIN_X2_IMM_RTN = 1721
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMIN_X2_SGPR = 1722
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SMIN_X2_SGPR_RTN = 1723
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SUB_IMM = 1724
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SUB_IMM_RTN = 1725
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SUB_SGPR = 1726
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SUB_SGPR_RTN = 1727
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SUB_X2_IMM = 1728
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SUB_X2_IMM_RTN = 1729
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SUB_X2_SGPR = 1730
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SUB_X2_SGPR_RTN = 1731
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SWAP_IMM = 1732
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SWAP_IMM_RTN = 1733
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SWAP_SGPR = 1734
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SWAP_SGPR_RTN = 1735
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SWAP_X2_IMM = 1736
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SWAP_X2_IMM_RTN = 1737
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SWAP_X2_SGPR = 1738
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_SWAP_X2_SGPR_RTN = 1739
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMAX_IMM = 1740
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMAX_IMM_RTN = 1741
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMAX_SGPR = 1742
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMAX_SGPR_RTN = 1743
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMAX_X2_IMM = 1744
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMAX_X2_IMM_RTN = 1745
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMAX_X2_SGPR = 1746
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMAX_X2_SGPR_RTN = 1747
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMIN_IMM = 1748
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMIN_IMM_RTN = 1749
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMIN_SGPR = 1750
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMIN_SGPR_RTN = 1751
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMIN_X2_IMM = 1752
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMIN_X2_IMM_RTN = 1753
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMIN_X2_SGPR = 1754
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_UMIN_X2_SGPR_RTN = 1755
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_XOR_IMM = 1756
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_XOR_IMM_RTN = 1757
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_XOR_SGPR = 1758
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_XOR_SGPR_RTN = 1759
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_XOR_X2_IMM = 1760
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_XOR_X2_IMM_RTN = 1761
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_XOR_X2_SGPR = 1762
    Feature_HasScalarAtomics | 0, // S_BUFFER_ATOMIC_XOR_X2_SGPR_RTN = 1763
    Feature_isGCN | 0, // S_BUFFER_LOAD_DWORDX16_IMM = 1764
    Feature_isGCN | 0, // S_BUFFER_LOAD_DWORDX16_SGPR = 1765
    Feature_isGCN | 0, // S_BUFFER_LOAD_DWORDX2_IMM = 1766
    Feature_isGCN | 0, // S_BUFFER_LOAD_DWORDX2_SGPR = 1767
    Feature_isGCN | 0, // S_BUFFER_LOAD_DWORDX4_IMM = 1768
    Feature_isGCN | 0, // S_BUFFER_LOAD_DWORDX4_SGPR = 1769
    Feature_isGCN | 0, // S_BUFFER_LOAD_DWORDX8_IMM = 1770
    Feature_isGCN | 0, // S_BUFFER_LOAD_DWORDX8_SGPR = 1771
    Feature_isGCN | 0, // S_BUFFER_LOAD_DWORD_IMM = 1772
    Feature_isGCN | 0, // S_BUFFER_LOAD_DWORD_SGPR = 1773
    Feature_isGCN | 0, // S_BUFFER_STORE_DWORDX2_IMM = 1774
    Feature_isGCN | 0, // S_BUFFER_STORE_DWORDX2_SGPR = 1775
    Feature_isGCN | 0, // S_BUFFER_STORE_DWORDX4_IMM = 1776
    Feature_isGCN | 0, // S_BUFFER_STORE_DWORDX4_SGPR = 1777
    Feature_isGCN | 0, // S_BUFFER_STORE_DWORD_IMM = 1778
    Feature_isGCN | 0, // S_BUFFER_STORE_DWORD_SGPR = 1779
    Feature_isGFX9 | 0, // S_CALL_B64 = 1780
    Feature_isGCN | 0, // S_CBRANCH_G_FORK = 1781
    Feature_isGCN | 0, // S_CBRANCH_I_FORK = 1782
    Feature_isGCN | 0, // S_CBRANCH_JOIN = 1783
    Feature_isGCN | 0, // S_CMOVK_I32 = 1784
    Feature_isGCN | 0, // S_CMOV_B32 = 1785
    Feature_isGCN | 0, // S_CMOV_B64 = 1786
    Feature_isGCN | 0, // S_CMPK_EQ_I32 = 1787
    Feature_isGCN | 0, // S_CMPK_EQ_U32 = 1788
    Feature_isGCN | 0, // S_CMPK_GE_I32 = 1789
    Feature_isGCN | 0, // S_CMPK_GE_U32 = 1790
    Feature_isGCN | 0, // S_CMPK_GT_I32 = 1791
    Feature_isGCN | 0, // S_CMPK_GT_U32 = 1792
    Feature_isGCN | 0, // S_CMPK_LE_I32 = 1793
    Feature_isGCN | 0, // S_CMPK_LE_U32 = 1794
    Feature_isGCN | 0, // S_CMPK_LG_I32 = 1795
    Feature_isGCN | 0, // S_CMPK_LG_U32 = 1796
    Feature_isGCN | 0, // S_CMPK_LT_I32 = 1797
    Feature_isGCN | 0, // S_CMPK_LT_U32 = 1798
    Feature_isGCN | 0, // S_CSELECT_B32 = 1799
    Feature_isGCN | 0, // S_CSELECT_B64 = 1800
    Feature_isGFX9 | 0, // S_DCACHE_DISCARD_IMM = 1801
    Feature_isGFX9 | 0, // S_DCACHE_DISCARD_SGPR = 1802
    Feature_isGFX9 | 0, // S_DCACHE_DISCARD_X2_IMM = 1803
    Feature_isGFX9 | 0, // S_DCACHE_DISCARD_X2_SGPR = 1804
    Feature_isGCN | 0, // S_DCACHE_INV = 1805
    Feature_isCIVI | 0, // S_DCACHE_INV_VOL = 1806
    Feature_isVI | 0, // S_DCACHE_WB = 1807
    Feature_isVI | 0, // S_DCACHE_WB_VOL = 1808
    Feature_isGCN | 0, // S_FF0_I32_B32 = 1809
    Feature_isGCN | 0, // S_FF0_I32_B64 = 1810
    Feature_isGCN | 0, // S_FF1_I32_B32 = 1811
    Feature_isGCN | 0, // S_FF1_I32_B64 = 1812
    Feature_isGCN | 0, // S_FLBIT_I32 = 1813
    Feature_isGCN | 0, // S_FLBIT_I32_B32 = 1814
    Feature_isGCN | 0, // S_FLBIT_I32_B64 = 1815
    Feature_isGCN | 0, // S_FLBIT_I32_I64 = 1816
    Feature_isGCN | 0, // S_GETPC_B64 = 1817
    Feature_isGCN | 0, // S_GETREG_B32 = 1818
    Feature_isGCN | 0, // S_LOAD_DWORDX16_IMM = 1819
    Feature_isGCN | 0, // S_LOAD_DWORDX16_SGPR = 1820
    Feature_isGCN | 0, // S_LOAD_DWORDX2_IMM = 1821
    Feature_isGCN | 0, // S_LOAD_DWORDX2_SGPR = 1822
    Feature_isGCN | 0, // S_LOAD_DWORDX4_IMM = 1823
    Feature_isGCN | 0, // S_LOAD_DWORDX4_SGPR = 1824
    Feature_isGCN | 0, // S_LOAD_DWORDX8_IMM = 1825
    Feature_isGCN | 0, // S_LOAD_DWORDX8_SGPR = 1826
    Feature_isGCN | 0, // S_LOAD_DWORD_IMM = 1827
    Feature_isGCN | 0, // S_LOAD_DWORD_SGPR = 1828
    Feature_isGFX9 | 0, // S_LSHL1_ADD_U32 = 1829
    Feature_isGFX9 | 0, // S_LSHL2_ADD_U32 = 1830
    Feature_isGFX9 | 0, // S_LSHL3_ADD_U32 = 1831
    Feature_isGFX9 | 0, // S_LSHL4_ADD_U32 = 1832
    Feature_isGCN | 0, // S_LSHL_B32 = 1833
    Feature_isGCN | 0, // S_LSHL_B64 = 1834
    Feature_isGCN | 0, // S_LSHR_B32 = 1835
    Feature_isGCN | 0, // S_LSHR_B64 = 1836
    Feature_isGCN | 0, // S_MAX_I32 = 1837
    Feature_isGCN | 0, // S_MAX_U32 = 1838
    Feature_isVI | 0, // S_MEMREALTIME = 1839
    Feature_isGCN | 0, // S_MEMTIME = 1840
    Feature_isGCN | 0, // S_MIN_I32 = 1841
    Feature_isGCN | 0, // S_MIN_U32 = 1842
    Feature_isGCN | 0, // S_MOVK_I32 = 1843
    Feature_isGCN | 0, // S_MOVRELD_B32 = 1844
    Feature_isGCN | 0, // S_MOVRELD_B64 = 1845
    Feature_isGCN | 0, // S_MOVRELS_B32 = 1846
    Feature_isGCN | 0, // S_MOVRELS_B64 = 1847
    Feature_isGCN | 0, // S_MOV_B32 = 1848
    Feature_isGCN | 0, // S_MOV_B64 = 1849
    Feature_isGCN | 0, // S_MOV_B64_term = 1850
    Feature_isGCN | 0, // S_MOV_FED_B32 = 1851
    Feature_isGCN | 0, // S_MOV_REGRD_B32 = 1852
    Feature_isGCN | 0, // S_MULK_I32 = 1853
    Feature_isGFX9 | 0, // S_MUL_HI_I32 = 1854
    Feature_isGFX9 | 0, // S_MUL_HI_U32 = 1855
    Feature_isGCN | 0, // S_MUL_I32 = 1856
    Feature_isGCN | 0, // S_NAND_B32 = 1857
    Feature_isGCN | 0, // S_NAND_B64 = 1858
    Feature_isGCN | 0, // S_NAND_SAVEEXEC_B64 = 1859
    Feature_isGCN | 0, // S_NOR_B32 = 1860
    Feature_isGCN | 0, // S_NOR_B64 = 1861
    Feature_isGCN | 0, // S_NOR_SAVEEXEC_B64 = 1862
    Feature_isGCN | 0, // S_NOT_B32 = 1863
    Feature_isGCN | 0, // S_NOT_B64 = 1864
    Feature_isGFX9 | 0, // S_ORN1_SAVEEXEC_B64 = 1865
    Feature_isGCN | 0, // S_ORN2_B32 = 1866
    Feature_isGCN | 0, // S_ORN2_B64 = 1867
    Feature_isGCN | 0, // S_ORN2_SAVEEXEC_B64 = 1868
    Feature_isGCN | 0, // S_OR_B32 = 1869
    Feature_isGCN | 0, // S_OR_B64 = 1870
    Feature_isGCN | 0, // S_OR_SAVEEXEC_B64 = 1871
    Feature_isGFX9 | 0, // S_PACK_HH_B32_B16 = 1872
    Feature_isGFX9 | 0, // S_PACK_LH_B32_B16 = 1873
    Feature_isGFX9 | 0, // S_PACK_LL_B32_B16 = 1874
    Feature_isGCN | 0, // S_QUADMASK_B32 = 1875
    Feature_isGCN | 0, // S_QUADMASK_B64 = 1876
    Feature_isGCN | 0, // S_RFE_B64 = 1877
    Feature_isVI | 0, // S_RFE_RESTORE_B64 = 1878
    Feature_HasFlatScratchInsts | 0, // S_SCRATCH_LOAD_DWORDX2_IMM = 1879
    Feature_HasFlatScratchInsts | 0, // S_SCRATCH_LOAD_DWORDX2_SGPR = 1880
    Feature_HasFlatScratchInsts | 0, // S_SCRATCH_LOAD_DWORDX4_IMM = 1881
    Feature_HasFlatScratchInsts | 0, // S_SCRATCH_LOAD_DWORDX4_SGPR = 1882
    Feature_HasFlatScratchInsts | 0, // S_SCRATCH_LOAD_DWORD_IMM = 1883
    Feature_HasFlatScratchInsts | 0, // S_SCRATCH_LOAD_DWORD_SGPR = 1884
    Feature_HasFlatScratchInsts | 0, // S_SCRATCH_STORE_DWORDX2_IMM = 1885
    Feature_HasFlatScratchInsts | 0, // S_SCRATCH_STORE_DWORDX2_SGPR = 1886
    Feature_HasFlatScratchInsts | 0, // S_SCRATCH_STORE_DWORDX4_IMM = 1887
    Feature_HasFlatScratchInsts | 0, // S_SCRATCH_STORE_DWORDX4_SGPR = 1888
    Feature_HasFlatScratchInsts | 0, // S_SCRATCH_STORE_DWORD_IMM = 1889
    Feature_HasFlatScratchInsts | 0, // S_SCRATCH_STORE_DWORD_SGPR = 1890
    Feature_isGCN | 0, // S_SETPC_B64 = 1891
    Feature_isGCN | 0, // S_SETPC_B64_return = 1892
    Feature_isGCN | 0, // S_SETREG_B32 = 1893
    Feature_isGCN | 0, // S_SETREG_IMM32_B32 = 1894
    Feature_HasVGPRIndexMode | 0, // S_SET_GPR_IDX_IDX = 1895
    Feature_isGCN | 0, // S_SEXT_I32_I16 = 1896
    Feature_isGCN | 0, // S_SEXT_I32_I8 = 1897
    Feature_isGCN | 0, // S_STORE_DWORDX2_IMM = 1898
    Feature_isGCN | 0, // S_STORE_DWORDX2_SGPR = 1899
    Feature_isGCN | 0, // S_STORE_DWORDX4_IMM = 1900
    Feature_isGCN | 0, // S_STORE_DWORDX4_SGPR = 1901
    Feature_isGCN | 0, // S_STORE_DWORD_IMM = 1902
    Feature_isGCN | 0, // S_STORE_DWORD_SGPR = 1903
    Feature_isGCN | 0, // S_SUBB_U32 = 1904
    Feature_isGCN | 0, // S_SUB_I32 = 1905
    Feature_isGCN | 0, // S_SUB_U32 = 1906
    Feature_isGCN | 0, // S_SUB_U64_CO_PSEUDO = 1907
    Feature_isGCN | 0, // S_SUB_U64_PSEUDO = 1908
    Feature_isGCN | 0, // S_SWAPPC_B64 = 1909
    Feature_isGCN | 0, // S_WQM_B32 = 1910
    Feature_isGCN | 0, // S_WQM_B64 = 1911
    Feature_isGCN | 0, // S_XNOR_B32 = 1912
    Feature_isGCN | 0, // S_XNOR_B64 = 1913
    Feature_isGCN | 0, // S_XNOR_SAVEEXEC_B64 = 1914
    Feature_isGCN | 0, // S_XOR_B32 = 1915
    Feature_isGCN | 0, // S_XOR_B64 = 1916
    Feature_isGCN | 0, // S_XOR_B64_term = 1917
    Feature_isGCN | 0, // S_XOR_SAVEEXEC_B64 = 1918
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_ADDR64 = 1919
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN = 1920
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN_exact = 1921
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_IDXEN = 1922
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_IDXEN_exact = 1923
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_OFFEN = 1924
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_OFFEN_exact = 1925
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_OFFSET = 1926
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_OFFSET_exact = 1927
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_ADDR64 = 1928
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_BOTHEN = 1929
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_BOTHEN_exact = 1930
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_IDXEN = 1931
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_IDXEN_exact = 1932
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFEN = 1933
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFEN_exact = 1934
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFSET = 1935
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFSET_exact = 1936
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_ADDR64 = 1937
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN = 1938
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN_exact = 1939
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_IDXEN = 1940
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_IDXEN_exact = 1941
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_OFFEN = 1942
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_OFFEN_exact = 1943
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_OFFSET = 1944
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_OFFSET_exact = 1945
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_ADDR64 = 1946
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_BOTHEN = 1947
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_BOTHEN_exact = 1948
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_IDXEN = 1949
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_IDXEN_exact = 1950
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFEN = 1951
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFEN_exact = 1952
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFSET = 1953
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFSET_exact = 1954
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_ADDR64 = 1955
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_BOTHEN = 1956
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_BOTHEN_exact = 1957
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_IDXEN = 1958
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_IDXEN_exact = 1959
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_OFFEN = 1960
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_OFFEN_exact = 1961
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_OFFSET = 1962
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_OFFSET_exact = 1963
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_gfx80_ADDR64 = 1964
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_gfx80_BOTHEN = 1965
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_gfx80_BOTHEN_exact = 1966
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_gfx80_IDXEN = 1967
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_gfx80_IDXEN_exact = 1968
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFEN = 1969
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFEN_exact = 1970
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFSET = 1971
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFSET_exact = 1972
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_ADDR64 = 1973
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_BOTHEN = 1974
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_BOTHEN_exact = 1975
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_IDXEN = 1976
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_IDXEN_exact = 1977
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_OFFEN = 1978
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_OFFEN_exact = 1979
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_OFFSET = 1980
    Feature_HasPackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_OFFSET_exact = 1981
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_gfx80_ADDR64 = 1982
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_gfx80_BOTHEN = 1983
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_gfx80_BOTHEN_exact = 1984
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_gfx80_IDXEN = 1985
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_gfx80_IDXEN_exact = 1986
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_gfx80_OFFEN = 1987
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_gfx80_OFFEN_exact = 1988
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_gfx80_OFFSET = 1989
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_gfx80_OFFSET_exact = 1990
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZW_ADDR64 = 1991
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZW_BOTHEN = 1992
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZW_BOTHEN_exact = 1993
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZW_IDXEN = 1994
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZW_IDXEN_exact = 1995
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZW_OFFEN = 1996
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZW_OFFEN_exact = 1997
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZW_OFFSET = 1998
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZW_OFFSET_exact = 1999
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZ_ADDR64 = 2000
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZ_BOTHEN = 2001
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZ_BOTHEN_exact = 2002
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZ_IDXEN = 2003
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZ_IDXEN_exact = 2004
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZ_OFFEN = 2005
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZ_OFFEN_exact = 2006
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZ_OFFSET = 2007
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XYZ_OFFSET_exact = 2008
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XY_ADDR64 = 2009
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XY_BOTHEN = 2010
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XY_BOTHEN_exact = 2011
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XY_IDXEN = 2012
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XY_IDXEN_exact = 2013
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XY_OFFEN = 2014
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XY_OFFEN_exact = 2015
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XY_OFFSET = 2016
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_XY_OFFSET_exact = 2017
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_X_ADDR64 = 2018
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_X_BOTHEN = 2019
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_X_BOTHEN_exact = 2020
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_X_IDXEN = 2021
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_X_IDXEN_exact = 2022
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_X_OFFEN = 2023
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_X_OFFEN_exact = 2024
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_X_OFFSET = 2025
    Feature_isGCN | 0, // TBUFFER_LOAD_FORMAT_X_OFFSET_exact = 2026
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_ADDR64 = 2027
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_BOTHEN = 2028
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_BOTHEN_exact = 2029
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_IDXEN = 2030
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_IDXEN_exact = 2031
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_OFFEN = 2032
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_OFFEN_exact = 2033
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_OFFSET = 2034
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_OFFSET_exact = 2035
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_ADDR64 = 2036
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_BOTHEN = 2037
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_BOTHEN_exact = 2038
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_IDXEN = 2039
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_IDXEN_exact = 2040
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFEN = 2041
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFEN_exact = 2042
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFSET = 2043
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFSET_exact = 2044
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_ADDR64 = 2045
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_BOTHEN = 2046
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_BOTHEN_exact = 2047
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_IDXEN = 2048
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_IDXEN_exact = 2049
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_OFFEN = 2050
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_OFFEN_exact = 2051
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_OFFSET = 2052
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_OFFSET_exact = 2053
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_ADDR64 = 2054
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_BOTHEN = 2055
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_BOTHEN_exact = 2056
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_IDXEN = 2057
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_IDXEN_exact = 2058
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFEN = 2059
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFEN_exact = 2060
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFSET = 2061
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFSET_exact = 2062
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_ADDR64 = 2063
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_BOTHEN = 2064
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_BOTHEN_exact = 2065
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_IDXEN = 2066
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_IDXEN_exact = 2067
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_OFFEN = 2068
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_OFFEN_exact = 2069
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_OFFSET = 2070
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_OFFSET_exact = 2071
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_gfx80_ADDR64 = 2072
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_gfx80_BOTHEN = 2073
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_gfx80_BOTHEN_exact = 2074
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_gfx80_IDXEN = 2075
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_gfx80_IDXEN_exact = 2076
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_gfx80_OFFEN = 2077
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_gfx80_OFFEN_exact = 2078
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_gfx80_OFFSET = 2079
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_gfx80_OFFSET_exact = 2080
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_ADDR64 = 2081
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_BOTHEN = 2082
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_BOTHEN_exact = 2083
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_IDXEN = 2084
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_IDXEN_exact = 2085
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_OFFEN = 2086
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_OFFEN_exact = 2087
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_OFFSET = 2088
    Feature_HasPackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_OFFSET_exact = 2089
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_gfx80_ADDR64 = 2090
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_gfx80_BOTHEN = 2091
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_gfx80_BOTHEN_exact = 2092
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_gfx80_IDXEN = 2093
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_gfx80_IDXEN_exact = 2094
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_gfx80_OFFEN = 2095
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_gfx80_OFFEN_exact = 2096
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_gfx80_OFFSET = 2097
    Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_gfx80_OFFSET_exact = 2098
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZW_ADDR64 = 2099
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZW_BOTHEN = 2100
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZW_BOTHEN_exact = 2101
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZW_IDXEN = 2102
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZW_IDXEN_exact = 2103
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZW_OFFEN = 2104
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZW_OFFEN_exact = 2105
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZW_OFFSET = 2106
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZW_OFFSET_exact = 2107
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZ_ADDR64 = 2108
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZ_BOTHEN = 2109
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZ_BOTHEN_exact = 2110
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZ_IDXEN = 2111
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZ_IDXEN_exact = 2112
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZ_OFFEN = 2113
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZ_OFFEN_exact = 2114
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZ_OFFSET = 2115
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XYZ_OFFSET_exact = 2116
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XY_ADDR64 = 2117
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XY_BOTHEN = 2118
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XY_BOTHEN_exact = 2119
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XY_IDXEN = 2120
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XY_IDXEN_exact = 2121
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XY_OFFEN = 2122
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XY_OFFEN_exact = 2123
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XY_OFFSET = 2124
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_XY_OFFSET_exact = 2125
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_X_ADDR64 = 2126
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_X_BOTHEN = 2127
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_X_BOTHEN_exact = 2128
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_X_IDXEN = 2129
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_X_IDXEN_exact = 2130
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_X_OFFEN = 2131
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_X_OFFEN_exact = 2132
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_X_OFFSET = 2133
    Feature_isGCN | 0, // TBUFFER_STORE_FORMAT_X_OFFSET_exact = 2134
    0, // V_ADD3_U32 = 2135
    Feature_isGCN | 0, // V_ADDC_U32_dpp = 2136
    Feature_isGCN | 0, // V_ADDC_U32_e32 = 2137
    Feature_isGCN | 0, // V_ADDC_U32_e64 = 2138
    Feature_isGCN | 0, // V_ADDC_U32_sdwa = 2139
    0, // V_ADD_F16_dpp = 2140
    0, // V_ADD_F16_e32 = 2141
    0, // V_ADD_F16_e64 = 2142
    0, // V_ADD_F16_sdwa = 2143
    Feature_isGCN | 0, // V_ADD_F32_dpp = 2144
    Feature_isGCN | 0, // V_ADD_F32_e32 = 2145
    Feature_isGCN | 0, // V_ADD_F32_e64 = 2146
    Feature_isGCN | 0, // V_ADD_F32_sdwa = 2147
    0, // V_ADD_F64 = 2148
    0, // V_ADD_I16 = 2149
    Feature_isGCN | 0, // V_ADD_I32_dpp = 2150
    Feature_isGCN | 0, // V_ADD_I32_e32 = 2151
    Feature_isGCN | 0, // V_ADD_I32_e64 = 2152
    0, // V_ADD_I32_gfx9 = 2153
    Feature_isGCN | 0, // V_ADD_I32_sdwa = 2154
    0, // V_ADD_LSHL_U32 = 2155
    0, // V_ADD_U16_dpp = 2156
    0, // V_ADD_U16_e32 = 2157
    0, // V_ADD_U16_e64 = 2158
    0, // V_ADD_U16_sdwa = 2159
    Feature_isGCN | 0, // V_ADD_U32_dpp = 2160
    Feature_isGCN | 0, // V_ADD_U32_e32 = 2161
    Feature_isGCN | 0, // V_ADD_U32_e64 = 2162
    Feature_isGCN | 0, // V_ADD_U32_sdwa = 2163
    0, // V_ALIGNBIT_B32 = 2164
    0, // V_ALIGNBYTE_B32 = 2165
    Feature_isGCN | 0, // V_AND_B32_dpp = 2166
    Feature_isGCN | 0, // V_AND_B32_e32 = 2167
    Feature_isGCN | 0, // V_AND_B32_e64 = 2168
    Feature_isGCN | 0, // V_AND_B32_sdwa = 2169
    0, // V_AND_OR_B32 = 2170
    0, // V_ASHRREV_I16_dpp = 2171
    0, // V_ASHRREV_I16_e32 = 2172
    0, // V_ASHRREV_I16_e64 = 2173
    0, // V_ASHRREV_I16_sdwa = 2174
    Feature_isGCN | 0, // V_ASHRREV_I32_dpp = 2175
    Feature_isGCN | 0, // V_ASHRREV_I32_e32 = 2176
    Feature_isGCN | 0, // V_ASHRREV_I32_e64 = 2177
    Feature_isGCN | 0, // V_ASHRREV_I32_sdwa = 2178
    0, // V_ASHRREV_I64 = 2179
    Feature_isSICI | 0, // V_ASHR_I32_dpp = 2180
    Feature_isSICI | 0, // V_ASHR_I32_e32 = 2181
    Feature_isSICI | 0, // V_ASHR_I32_e64 = 2182
    Feature_isSICI | 0, // V_ASHR_I32_sdwa = 2183
    Feature_isSICI | 0, // V_ASHR_I64 = 2184
    Feature_isGCN | 0, // V_BCNT_U32_B32_e32 = 2185
    Feature_isGCN | 0, // V_BCNT_U32_B32_e64 = 2186
    Feature_isGCN | 0, // V_BCNT_U32_B32_sdwa = 2187
    0, // V_BFE_I32 = 2188
    0, // V_BFE_U32 = 2189
    0, // V_BFI_B32 = 2190
    Feature_isGCN | 0, // V_BFM_B32_e32 = 2191
    Feature_isGCN | 0, // V_BFM_B32_e64 = 2192
    Feature_isGCN | 0, // V_BFM_B32_sdwa = 2193
    0, // V_BFREV_B32_dpp = 2194
    0, // V_BFREV_B32_e32 = 2195
    0, // V_BFREV_B32_e64 = 2196
    0, // V_BFREV_B32_sdwa = 2197
    0, // V_CEIL_F16_dpp = 2198
    0, // V_CEIL_F16_e32 = 2199
    0, // V_CEIL_F16_e64 = 2200
    0, // V_CEIL_F16_sdwa = 2201
    0, // V_CEIL_F32_dpp = 2202
    0, // V_CEIL_F32_e32 = 2203
    0, // V_CEIL_F32_e64 = 2204
    0, // V_CEIL_F32_sdwa = 2205
    0, // V_CEIL_F64_e32 = 2206
    0, // V_CEIL_F64_e64 = 2207
    0, // V_CEIL_F64_sdwa = 2208
    0, // V_CLREXCP_e32 = 2209
    0, // V_CLREXCP_e64 = 2210
    0, // V_CLREXCP_sdwa = 2211
    Feature_isSICI | 0, // V_CMPSX_EQ_F32_e32 = 2212
    0, // V_CMPSX_EQ_F32_e64 = 2213
    0, // V_CMPSX_EQ_F32_sdwa = 2214
    Feature_isSICI | 0, // V_CMPSX_EQ_F64_e32 = 2215
    0, // V_CMPSX_EQ_F64_e64 = 2216
    0, // V_CMPSX_EQ_F64_sdwa = 2217
    Feature_isSICI | 0, // V_CMPSX_F_F32_e32 = 2218
    0, // V_CMPSX_F_F32_e64 = 2219
    0, // V_CMPSX_F_F32_sdwa = 2220
    Feature_isSICI | 0, // V_CMPSX_F_F64_e32 = 2221
    0, // V_CMPSX_F_F64_e64 = 2222
    0, // V_CMPSX_F_F64_sdwa = 2223
    Feature_isSICI | 0, // V_CMPSX_GE_F32_e32 = 2224
    0, // V_CMPSX_GE_F32_e64 = 2225
    0, // V_CMPSX_GE_F32_sdwa = 2226
    Feature_isSICI | 0, // V_CMPSX_GE_F64_e32 = 2227
    0, // V_CMPSX_GE_F64_e64 = 2228
    0, // V_CMPSX_GE_F64_sdwa = 2229
    Feature_isSICI | 0, // V_CMPSX_GT_F32_e32 = 2230
    0, // V_CMPSX_GT_F32_e64 = 2231
    0, // V_CMPSX_GT_F32_sdwa = 2232
    Feature_isSICI | 0, // V_CMPSX_GT_F64_e32 = 2233
    0, // V_CMPSX_GT_F64_e64 = 2234
    0, // V_CMPSX_GT_F64_sdwa = 2235
    Feature_isSICI | 0, // V_CMPSX_LE_F32_e32 = 2236
    0, // V_CMPSX_LE_F32_e64 = 2237
    0, // V_CMPSX_LE_F32_sdwa = 2238
    Feature_isSICI | 0, // V_CMPSX_LE_F64_e32 = 2239
    0, // V_CMPSX_LE_F64_e64 = 2240
    0, // V_CMPSX_LE_F64_sdwa = 2241
    Feature_isSICI | 0, // V_CMPSX_LG_F32_e32 = 2242
    0, // V_CMPSX_LG_F32_e64 = 2243
    0, // V_CMPSX_LG_F32_sdwa = 2244
    Feature_isSICI | 0, // V_CMPSX_LG_F64_e32 = 2245
    0, // V_CMPSX_LG_F64_e64 = 2246
    0, // V_CMPSX_LG_F64_sdwa = 2247
    Feature_isSICI | 0, // V_CMPSX_LT_F32_e32 = 2248
    0, // V_CMPSX_LT_F32_e64 = 2249
    0, // V_CMPSX_LT_F32_sdwa = 2250
    Feature_isSICI | 0, // V_CMPSX_LT_F64_e32 = 2251
    0, // V_CMPSX_LT_F64_e64 = 2252
    0, // V_CMPSX_LT_F64_sdwa = 2253
    Feature_isSICI | 0, // V_CMPSX_NEQ_F32_e32 = 2254
    0, // V_CMPSX_NEQ_F32_e64 = 2255
    0, // V_CMPSX_NEQ_F32_sdwa = 2256
    Feature_isSICI | 0, // V_CMPSX_NEQ_F64_e32 = 2257
    0, // V_CMPSX_NEQ_F64_e64 = 2258
    0, // V_CMPSX_NEQ_F64_sdwa = 2259
    Feature_isSICI | 0, // V_CMPSX_NGE_F32_e32 = 2260
    0, // V_CMPSX_NGE_F32_e64 = 2261
    0, // V_CMPSX_NGE_F32_sdwa = 2262
    Feature_isSICI | 0, // V_CMPSX_NGE_F64_e32 = 2263
    0, // V_CMPSX_NGE_F64_e64 = 2264
    0, // V_CMPSX_NGE_F64_sdwa = 2265
    Feature_isSICI | 0, // V_CMPSX_NGT_F32_e32 = 2266
    0, // V_CMPSX_NGT_F32_e64 = 2267
    0, // V_CMPSX_NGT_F32_sdwa = 2268
    Feature_isSICI | 0, // V_CMPSX_NGT_F64_e32 = 2269
    0, // V_CMPSX_NGT_F64_e64 = 2270
    0, // V_CMPSX_NGT_F64_sdwa = 2271
    Feature_isSICI | 0, // V_CMPSX_NLE_F32_e32 = 2272
    0, // V_CMPSX_NLE_F32_e64 = 2273
    0, // V_CMPSX_NLE_F32_sdwa = 2274
    Feature_isSICI | 0, // V_CMPSX_NLE_F64_e32 = 2275
    0, // V_CMPSX_NLE_F64_e64 = 2276
    0, // V_CMPSX_NLE_F64_sdwa = 2277
    Feature_isSICI | 0, // V_CMPSX_NLG_F32_e32 = 2278
    0, // V_CMPSX_NLG_F32_e64 = 2279
    0, // V_CMPSX_NLG_F32_sdwa = 2280
    Feature_isSICI | 0, // V_CMPSX_NLG_F64_e32 = 2281
    0, // V_CMPSX_NLG_F64_e64 = 2282
    0, // V_CMPSX_NLG_F64_sdwa = 2283
    Feature_isSICI | 0, // V_CMPSX_NLT_F32_e32 = 2284
    0, // V_CMPSX_NLT_F32_e64 = 2285
    0, // V_CMPSX_NLT_F32_sdwa = 2286
    Feature_isSICI | 0, // V_CMPSX_NLT_F64_e32 = 2287
    0, // V_CMPSX_NLT_F64_e64 = 2288
    0, // V_CMPSX_NLT_F64_sdwa = 2289
    Feature_isSICI | 0, // V_CMPSX_O_F32_e32 = 2290
    0, // V_CMPSX_O_F32_e64 = 2291
    0, // V_CMPSX_O_F32_sdwa = 2292
    Feature_isSICI | 0, // V_CMPSX_O_F64_e32 = 2293
    0, // V_CMPSX_O_F64_e64 = 2294
    0, // V_CMPSX_O_F64_sdwa = 2295
    Feature_isSICI | 0, // V_CMPSX_TRU_F32_e32 = 2296
    0, // V_CMPSX_TRU_F32_e64 = 2297
    0, // V_CMPSX_TRU_F32_sdwa = 2298
    Feature_isSICI | 0, // V_CMPSX_TRU_F64_e32 = 2299
    0, // V_CMPSX_TRU_F64_e64 = 2300
    0, // V_CMPSX_TRU_F64_sdwa = 2301
    Feature_isSICI | 0, // V_CMPSX_U_F32_e32 = 2302
    0, // V_CMPSX_U_F32_e64 = 2303
    0, // V_CMPSX_U_F32_sdwa = 2304
    Feature_isSICI | 0, // V_CMPSX_U_F64_e32 = 2305
    0, // V_CMPSX_U_F64_e64 = 2306
    0, // V_CMPSX_U_F64_sdwa = 2307
    Feature_isSICI | 0, // V_CMPS_EQ_F32_e32 = 2308
    0, // V_CMPS_EQ_F32_e64 = 2309
    0, // V_CMPS_EQ_F32_sdwa = 2310
    Feature_isSICI | 0, // V_CMPS_EQ_F64_e32 = 2311
    0, // V_CMPS_EQ_F64_e64 = 2312
    0, // V_CMPS_EQ_F64_sdwa = 2313
    Feature_isSICI | 0, // V_CMPS_F_F32_e32 = 2314
    0, // V_CMPS_F_F32_e64 = 2315
    0, // V_CMPS_F_F32_sdwa = 2316
    Feature_isSICI | 0, // V_CMPS_F_F64_e32 = 2317
    0, // V_CMPS_F_F64_e64 = 2318
    0, // V_CMPS_F_F64_sdwa = 2319
    Feature_isSICI | 0, // V_CMPS_GE_F32_e32 = 2320
    0, // V_CMPS_GE_F32_e64 = 2321
    0, // V_CMPS_GE_F32_sdwa = 2322
    Feature_isSICI | 0, // V_CMPS_GE_F64_e32 = 2323
    0, // V_CMPS_GE_F64_e64 = 2324
    0, // V_CMPS_GE_F64_sdwa = 2325
    Feature_isSICI | 0, // V_CMPS_GT_F32_e32 = 2326
    0, // V_CMPS_GT_F32_e64 = 2327
    0, // V_CMPS_GT_F32_sdwa = 2328
    Feature_isSICI | 0, // V_CMPS_GT_F64_e32 = 2329
    0, // V_CMPS_GT_F64_e64 = 2330
    0, // V_CMPS_GT_F64_sdwa = 2331
    Feature_isSICI | 0, // V_CMPS_LE_F32_e32 = 2332
    0, // V_CMPS_LE_F32_e64 = 2333
    0, // V_CMPS_LE_F32_sdwa = 2334
    Feature_isSICI | 0, // V_CMPS_LE_F64_e32 = 2335
    0, // V_CMPS_LE_F64_e64 = 2336
    0, // V_CMPS_LE_F64_sdwa = 2337
    Feature_isSICI | 0, // V_CMPS_LG_F32_e32 = 2338
    0, // V_CMPS_LG_F32_e64 = 2339
    0, // V_CMPS_LG_F32_sdwa = 2340
    Feature_isSICI | 0, // V_CMPS_LG_F64_e32 = 2341
    0, // V_CMPS_LG_F64_e64 = 2342
    0, // V_CMPS_LG_F64_sdwa = 2343
    Feature_isSICI | 0, // V_CMPS_LT_F32_e32 = 2344
    0, // V_CMPS_LT_F32_e64 = 2345
    0, // V_CMPS_LT_F32_sdwa = 2346
    Feature_isSICI | 0, // V_CMPS_LT_F64_e32 = 2347
    0, // V_CMPS_LT_F64_e64 = 2348
    0, // V_CMPS_LT_F64_sdwa = 2349
    Feature_isSICI | 0, // V_CMPS_NEQ_F32_e32 = 2350
    0, // V_CMPS_NEQ_F32_e64 = 2351
    0, // V_CMPS_NEQ_F32_sdwa = 2352
    Feature_isSICI | 0, // V_CMPS_NEQ_F64_e32 = 2353
    0, // V_CMPS_NEQ_F64_e64 = 2354
    0, // V_CMPS_NEQ_F64_sdwa = 2355
    Feature_isSICI | 0, // V_CMPS_NGE_F32_e32 = 2356
    0, // V_CMPS_NGE_F32_e64 = 2357
    0, // V_CMPS_NGE_F32_sdwa = 2358
    Feature_isSICI | 0, // V_CMPS_NGE_F64_e32 = 2359
    0, // V_CMPS_NGE_F64_e64 = 2360
    0, // V_CMPS_NGE_F64_sdwa = 2361
    Feature_isSICI | 0, // V_CMPS_NGT_F32_e32 = 2362
    0, // V_CMPS_NGT_F32_e64 = 2363
    0, // V_CMPS_NGT_F32_sdwa = 2364
    Feature_isSICI | 0, // V_CMPS_NGT_F64_e32 = 2365
    0, // V_CMPS_NGT_F64_e64 = 2366
    0, // V_CMPS_NGT_F64_sdwa = 2367
    Feature_isSICI | 0, // V_CMPS_NLE_F32_e32 = 2368
    0, // V_CMPS_NLE_F32_e64 = 2369
    0, // V_CMPS_NLE_F32_sdwa = 2370
    Feature_isSICI | 0, // V_CMPS_NLE_F64_e32 = 2371
    0, // V_CMPS_NLE_F64_e64 = 2372
    0, // V_CMPS_NLE_F64_sdwa = 2373
    Feature_isSICI | 0, // V_CMPS_NLG_F32_e32 = 2374
    0, // V_CMPS_NLG_F32_e64 = 2375
    0, // V_CMPS_NLG_F32_sdwa = 2376
    Feature_isSICI | 0, // V_CMPS_NLG_F64_e32 = 2377
    0, // V_CMPS_NLG_F64_e64 = 2378
    0, // V_CMPS_NLG_F64_sdwa = 2379
    Feature_isSICI | 0, // V_CMPS_NLT_F32_e32 = 2380
    0, // V_CMPS_NLT_F32_e64 = 2381
    0, // V_CMPS_NLT_F32_sdwa = 2382
    Feature_isSICI | 0, // V_CMPS_NLT_F64_e32 = 2383
    0, // V_CMPS_NLT_F64_e64 = 2384
    0, // V_CMPS_NLT_F64_sdwa = 2385
    Feature_isSICI | 0, // V_CMPS_O_F32_e32 = 2386
    0, // V_CMPS_O_F32_e64 = 2387
    0, // V_CMPS_O_F32_sdwa = 2388
    Feature_isSICI | 0, // V_CMPS_O_F64_e32 = 2389
    0, // V_CMPS_O_F64_e64 = 2390
    0, // V_CMPS_O_F64_sdwa = 2391
    Feature_isSICI | 0, // V_CMPS_TRU_F32_e32 = 2392
    0, // V_CMPS_TRU_F32_e64 = 2393
    0, // V_CMPS_TRU_F32_sdwa = 2394
    Feature_isSICI | 0, // V_CMPS_TRU_F64_e32 = 2395
    0, // V_CMPS_TRU_F64_e64 = 2396
    0, // V_CMPS_TRU_F64_sdwa = 2397
    Feature_isSICI | 0, // V_CMPS_U_F32_e32 = 2398
    0, // V_CMPS_U_F32_e64 = 2399
    0, // V_CMPS_U_F32_sdwa = 2400
    Feature_isSICI | 0, // V_CMPS_U_F64_e32 = 2401
    0, // V_CMPS_U_F64_e64 = 2402
    0, // V_CMPS_U_F64_sdwa = 2403
    Feature_isGCN | 0, // V_CMPX_CLASS_F16_e32 = 2404
    0, // V_CMPX_CLASS_F16_e64 = 2405
    0, // V_CMPX_CLASS_F16_sdwa = 2406
    Feature_isGCN | 0, // V_CMPX_CLASS_F32_e32 = 2407
    0, // V_CMPX_CLASS_F32_e64 = 2408
    0, // V_CMPX_CLASS_F32_sdwa = 2409
    Feature_isGCN | 0, // V_CMPX_CLASS_F64_e32 = 2410
    0, // V_CMPX_CLASS_F64_e64 = 2411
    0, // V_CMPX_CLASS_F64_sdwa = 2412
    Feature_Has16BitInsts | 0, // V_CMPX_EQ_F16_e32 = 2413
    0, // V_CMPX_EQ_F16_e64 = 2414
    0, // V_CMPX_EQ_F16_sdwa = 2415
    Feature_isGCN | 0, // V_CMPX_EQ_F32_e32 = 2416
    0, // V_CMPX_EQ_F32_e64 = 2417
    0, // V_CMPX_EQ_F32_sdwa = 2418
    Feature_isGCN | 0, // V_CMPX_EQ_F64_e32 = 2419
    0, // V_CMPX_EQ_F64_e64 = 2420
    0, // V_CMPX_EQ_F64_sdwa = 2421
    Feature_Has16BitInsts | 0, // V_CMPX_EQ_I16_e32 = 2422
    0, // V_CMPX_EQ_I16_e64 = 2423
    0, // V_CMPX_EQ_I16_sdwa = 2424
    Feature_isGCN | 0, // V_CMPX_EQ_I32_e32 = 2425
    0, // V_CMPX_EQ_I32_e64 = 2426
    0, // V_CMPX_EQ_I32_sdwa = 2427
    Feature_isGCN | 0, // V_CMPX_EQ_I64_e32 = 2428
    0, // V_CMPX_EQ_I64_e64 = 2429
    0, // V_CMPX_EQ_I64_sdwa = 2430
    Feature_Has16BitInsts | 0, // V_CMPX_EQ_U16_e32 = 2431
    0, // V_CMPX_EQ_U16_e64 = 2432
    0, // V_CMPX_EQ_U16_sdwa = 2433
    Feature_isGCN | 0, // V_CMPX_EQ_U32_e32 = 2434
    0, // V_CMPX_EQ_U32_e64 = 2435
    0, // V_CMPX_EQ_U32_sdwa = 2436
    Feature_isGCN | 0, // V_CMPX_EQ_U64_e32 = 2437
    0, // V_CMPX_EQ_U64_e64 = 2438
    0, // V_CMPX_EQ_U64_sdwa = 2439
    Feature_Has16BitInsts | 0, // V_CMPX_F_F16_e32 = 2440
    0, // V_CMPX_F_F16_e64 = 2441
    0, // V_CMPX_F_F16_sdwa = 2442
    Feature_isGCN | 0, // V_CMPX_F_F32_e32 = 2443
    0, // V_CMPX_F_F32_e64 = 2444
    0, // V_CMPX_F_F32_sdwa = 2445
    Feature_isGCN | 0, // V_CMPX_F_F64_e32 = 2446
    0, // V_CMPX_F_F64_e64 = 2447
    0, // V_CMPX_F_F64_sdwa = 2448
    Feature_Has16BitInsts | 0, // V_CMPX_F_I16_e32 = 2449
    0, // V_CMPX_F_I16_e64 = 2450
    0, // V_CMPX_F_I16_sdwa = 2451
    Feature_isGCN | 0, // V_CMPX_F_I32_e32 = 2452
    0, // V_CMPX_F_I32_e64 = 2453
    0, // V_CMPX_F_I32_sdwa = 2454
    Feature_isGCN | 0, // V_CMPX_F_I64_e32 = 2455
    0, // V_CMPX_F_I64_e64 = 2456
    0, // V_CMPX_F_I64_sdwa = 2457
    Feature_Has16BitInsts | 0, // V_CMPX_F_U16_e32 = 2458
    0, // V_CMPX_F_U16_e64 = 2459
    0, // V_CMPX_F_U16_sdwa = 2460
    Feature_isGCN | 0, // V_CMPX_F_U32_e32 = 2461
    0, // V_CMPX_F_U32_e64 = 2462
    0, // V_CMPX_F_U32_sdwa = 2463
    Feature_isGCN | 0, // V_CMPX_F_U64_e32 = 2464
    0, // V_CMPX_F_U64_e64 = 2465
    0, // V_CMPX_F_U64_sdwa = 2466
    Feature_Has16BitInsts | 0, // V_CMPX_GE_F16_e32 = 2467
    0, // V_CMPX_GE_F16_e64 = 2468
    0, // V_CMPX_GE_F16_sdwa = 2469
    Feature_isGCN | 0, // V_CMPX_GE_F32_e32 = 2470
    0, // V_CMPX_GE_F32_e64 = 2471
    0, // V_CMPX_GE_F32_sdwa = 2472
    Feature_isGCN | 0, // V_CMPX_GE_F64_e32 = 2473
    0, // V_CMPX_GE_F64_e64 = 2474
    0, // V_CMPX_GE_F64_sdwa = 2475
    Feature_Has16BitInsts | 0, // V_CMPX_GE_I16_e32 = 2476
    0, // V_CMPX_GE_I16_e64 = 2477
    0, // V_CMPX_GE_I16_sdwa = 2478
    Feature_isGCN | 0, // V_CMPX_GE_I32_e32 = 2479
    0, // V_CMPX_GE_I32_e64 = 2480
    0, // V_CMPX_GE_I32_sdwa = 2481
    Feature_isGCN | 0, // V_CMPX_GE_I64_e32 = 2482
    0, // V_CMPX_GE_I64_e64 = 2483
    0, // V_CMPX_GE_I64_sdwa = 2484
    Feature_Has16BitInsts | 0, // V_CMPX_GE_U16_e32 = 2485
    0, // V_CMPX_GE_U16_e64 = 2486
    0, // V_CMPX_GE_U16_sdwa = 2487
    Feature_isGCN | 0, // V_CMPX_GE_U32_e32 = 2488
    0, // V_CMPX_GE_U32_e64 = 2489
    0, // V_CMPX_GE_U32_sdwa = 2490
    Feature_isGCN | 0, // V_CMPX_GE_U64_e32 = 2491
    0, // V_CMPX_GE_U64_e64 = 2492
    0, // V_CMPX_GE_U64_sdwa = 2493
    Feature_Has16BitInsts | 0, // V_CMPX_GT_F16_e32 = 2494
    0, // V_CMPX_GT_F16_e64 = 2495
    0, // V_CMPX_GT_F16_sdwa = 2496
    Feature_isGCN | 0, // V_CMPX_GT_F32_e32 = 2497
    0, // V_CMPX_GT_F32_e64 = 2498
    0, // V_CMPX_GT_F32_sdwa = 2499
    Feature_isGCN | 0, // V_CMPX_GT_F64_e32 = 2500
    0, // V_CMPX_GT_F64_e64 = 2501
    0, // V_CMPX_GT_F64_sdwa = 2502
    Feature_Has16BitInsts | 0, // V_CMPX_GT_I16_e32 = 2503
    0, // V_CMPX_GT_I16_e64 = 2504
    0, // V_CMPX_GT_I16_sdwa = 2505
    Feature_isGCN | 0, // V_CMPX_GT_I32_e32 = 2506
    0, // V_CMPX_GT_I32_e64 = 2507
    0, // V_CMPX_GT_I32_sdwa = 2508
    Feature_isGCN | 0, // V_CMPX_GT_I64_e32 = 2509
    0, // V_CMPX_GT_I64_e64 = 2510
    0, // V_CMPX_GT_I64_sdwa = 2511
    Feature_Has16BitInsts | 0, // V_CMPX_GT_U16_e32 = 2512
    0, // V_CMPX_GT_U16_e64 = 2513
    0, // V_CMPX_GT_U16_sdwa = 2514
    Feature_isGCN | 0, // V_CMPX_GT_U32_e32 = 2515
    0, // V_CMPX_GT_U32_e64 = 2516
    0, // V_CMPX_GT_U32_sdwa = 2517
    Feature_isGCN | 0, // V_CMPX_GT_U64_e32 = 2518
    0, // V_CMPX_GT_U64_e64 = 2519
    0, // V_CMPX_GT_U64_sdwa = 2520
    Feature_Has16BitInsts | 0, // V_CMPX_LE_F16_e32 = 2521
    0, // V_CMPX_LE_F16_e64 = 2522
    0, // V_CMPX_LE_F16_sdwa = 2523
    Feature_isGCN | 0, // V_CMPX_LE_F32_e32 = 2524
    0, // V_CMPX_LE_F32_e64 = 2525
    0, // V_CMPX_LE_F32_sdwa = 2526
    Feature_isGCN | 0, // V_CMPX_LE_F64_e32 = 2527
    0, // V_CMPX_LE_F64_e64 = 2528
    0, // V_CMPX_LE_F64_sdwa = 2529
    Feature_Has16BitInsts | 0, // V_CMPX_LE_I16_e32 = 2530
    0, // V_CMPX_LE_I16_e64 = 2531
    0, // V_CMPX_LE_I16_sdwa = 2532
    Feature_isGCN | 0, // V_CMPX_LE_I32_e32 = 2533
    0, // V_CMPX_LE_I32_e64 = 2534
    0, // V_CMPX_LE_I32_sdwa = 2535
    Feature_isGCN | 0, // V_CMPX_LE_I64_e32 = 2536
    0, // V_CMPX_LE_I64_e64 = 2537
    0, // V_CMPX_LE_I64_sdwa = 2538
    Feature_Has16BitInsts | 0, // V_CMPX_LE_U16_e32 = 2539
    0, // V_CMPX_LE_U16_e64 = 2540
    0, // V_CMPX_LE_U16_sdwa = 2541
    Feature_isGCN | 0, // V_CMPX_LE_U32_e32 = 2542
    0, // V_CMPX_LE_U32_e64 = 2543
    0, // V_CMPX_LE_U32_sdwa = 2544
    Feature_isGCN | 0, // V_CMPX_LE_U64_e32 = 2545
    0, // V_CMPX_LE_U64_e64 = 2546
    0, // V_CMPX_LE_U64_sdwa = 2547
    Feature_Has16BitInsts | 0, // V_CMPX_LG_F16_e32 = 2548
    0, // V_CMPX_LG_F16_e64 = 2549
    0, // V_CMPX_LG_F16_sdwa = 2550
    Feature_isGCN | 0, // V_CMPX_LG_F32_e32 = 2551
    0, // V_CMPX_LG_F32_e64 = 2552
    0, // V_CMPX_LG_F32_sdwa = 2553
    Feature_isGCN | 0, // V_CMPX_LG_F64_e32 = 2554
    0, // V_CMPX_LG_F64_e64 = 2555
    0, // V_CMPX_LG_F64_sdwa = 2556
    Feature_Has16BitInsts | 0, // V_CMPX_LT_F16_e32 = 2557
    0, // V_CMPX_LT_F16_e64 = 2558
    0, // V_CMPX_LT_F16_sdwa = 2559
    Feature_isGCN | 0, // V_CMPX_LT_F32_e32 = 2560
    0, // V_CMPX_LT_F32_e64 = 2561
    0, // V_CMPX_LT_F32_sdwa = 2562
    Feature_isGCN | 0, // V_CMPX_LT_F64_e32 = 2563
    0, // V_CMPX_LT_F64_e64 = 2564
    0, // V_CMPX_LT_F64_sdwa = 2565
    Feature_Has16BitInsts | 0, // V_CMPX_LT_I16_e32 = 2566
    0, // V_CMPX_LT_I16_e64 = 2567
    0, // V_CMPX_LT_I16_sdwa = 2568
    Feature_isGCN | 0, // V_CMPX_LT_I32_e32 = 2569
    0, // V_CMPX_LT_I32_e64 = 2570
    0, // V_CMPX_LT_I32_sdwa = 2571
    Feature_isGCN | 0, // V_CMPX_LT_I64_e32 = 2572
    0, // V_CMPX_LT_I64_e64 = 2573
    0, // V_CMPX_LT_I64_sdwa = 2574
    Feature_Has16BitInsts | 0, // V_CMPX_LT_U16_e32 = 2575
    0, // V_CMPX_LT_U16_e64 = 2576
    0, // V_CMPX_LT_U16_sdwa = 2577
    Feature_isGCN | 0, // V_CMPX_LT_U32_e32 = 2578
    0, // V_CMPX_LT_U32_e64 = 2579
    0, // V_CMPX_LT_U32_sdwa = 2580
    Feature_isGCN | 0, // V_CMPX_LT_U64_e32 = 2581
    0, // V_CMPX_LT_U64_e64 = 2582
    0, // V_CMPX_LT_U64_sdwa = 2583
    Feature_Has16BitInsts | 0, // V_CMPX_NEQ_F16_e32 = 2584
    0, // V_CMPX_NEQ_F16_e64 = 2585
    0, // V_CMPX_NEQ_F16_sdwa = 2586
    Feature_isGCN | 0, // V_CMPX_NEQ_F32_e32 = 2587
    0, // V_CMPX_NEQ_F32_e64 = 2588
    0, // V_CMPX_NEQ_F32_sdwa = 2589
    Feature_isGCN | 0, // V_CMPX_NEQ_F64_e32 = 2590
    0, // V_CMPX_NEQ_F64_e64 = 2591
    0, // V_CMPX_NEQ_F64_sdwa = 2592
    Feature_Has16BitInsts | 0, // V_CMPX_NE_I16_e32 = 2593
    0, // V_CMPX_NE_I16_e64 = 2594
    0, // V_CMPX_NE_I16_sdwa = 2595
    Feature_isGCN | 0, // V_CMPX_NE_I32_e32 = 2596
    0, // V_CMPX_NE_I32_e64 = 2597
    0, // V_CMPX_NE_I32_sdwa = 2598
    Feature_isGCN | 0, // V_CMPX_NE_I64_e32 = 2599
    0, // V_CMPX_NE_I64_e64 = 2600
    0, // V_CMPX_NE_I64_sdwa = 2601
    Feature_Has16BitInsts | 0, // V_CMPX_NE_U16_e32 = 2602
    0, // V_CMPX_NE_U16_e64 = 2603
    0, // V_CMPX_NE_U16_sdwa = 2604
    Feature_isGCN | 0, // V_CMPX_NE_U32_e32 = 2605
    0, // V_CMPX_NE_U32_e64 = 2606
    0, // V_CMPX_NE_U32_sdwa = 2607
    Feature_isGCN | 0, // V_CMPX_NE_U64_e32 = 2608
    0, // V_CMPX_NE_U64_e64 = 2609
    0, // V_CMPX_NE_U64_sdwa = 2610
    Feature_Has16BitInsts | 0, // V_CMPX_NGE_F16_e32 = 2611
    0, // V_CMPX_NGE_F16_e64 = 2612
    0, // V_CMPX_NGE_F16_sdwa = 2613
    Feature_isGCN | 0, // V_CMPX_NGE_F32_e32 = 2614
    0, // V_CMPX_NGE_F32_e64 = 2615
    0, // V_CMPX_NGE_F32_sdwa = 2616
    Feature_isGCN | 0, // V_CMPX_NGE_F64_e32 = 2617
    0, // V_CMPX_NGE_F64_e64 = 2618
    0, // V_CMPX_NGE_F64_sdwa = 2619
    Feature_Has16BitInsts | 0, // V_CMPX_NGT_F16_e32 = 2620
    0, // V_CMPX_NGT_F16_e64 = 2621
    0, // V_CMPX_NGT_F16_sdwa = 2622
    Feature_isGCN | 0, // V_CMPX_NGT_F32_e32 = 2623
    0, // V_CMPX_NGT_F32_e64 = 2624
    0, // V_CMPX_NGT_F32_sdwa = 2625
    Feature_isGCN | 0, // V_CMPX_NGT_F64_e32 = 2626
    0, // V_CMPX_NGT_F64_e64 = 2627
    0, // V_CMPX_NGT_F64_sdwa = 2628
    Feature_Has16BitInsts | 0, // V_CMPX_NLE_F16_e32 = 2629
    0, // V_CMPX_NLE_F16_e64 = 2630
    0, // V_CMPX_NLE_F16_sdwa = 2631
    Feature_isGCN | 0, // V_CMPX_NLE_F32_e32 = 2632
    0, // V_CMPX_NLE_F32_e64 = 2633
    0, // V_CMPX_NLE_F32_sdwa = 2634
    Feature_isGCN | 0, // V_CMPX_NLE_F64_e32 = 2635
    0, // V_CMPX_NLE_F64_e64 = 2636
    0, // V_CMPX_NLE_F64_sdwa = 2637
    Feature_Has16BitInsts | 0, // V_CMPX_NLG_F16_e32 = 2638
    0, // V_CMPX_NLG_F16_e64 = 2639
    0, // V_CMPX_NLG_F16_sdwa = 2640
    Feature_isGCN | 0, // V_CMPX_NLG_F32_e32 = 2641
    0, // V_CMPX_NLG_F32_e64 = 2642
    0, // V_CMPX_NLG_F32_sdwa = 2643
    Feature_isGCN | 0, // V_CMPX_NLG_F64_e32 = 2644
    0, // V_CMPX_NLG_F64_e64 = 2645
    0, // V_CMPX_NLG_F64_sdwa = 2646
    Feature_Has16BitInsts | 0, // V_CMPX_NLT_F16_e32 = 2647
    0, // V_CMPX_NLT_F16_e64 = 2648
    0, // V_CMPX_NLT_F16_sdwa = 2649
    Feature_isGCN | 0, // V_CMPX_NLT_F32_e32 = 2650
    0, // V_CMPX_NLT_F32_e64 = 2651
    0, // V_CMPX_NLT_F32_sdwa = 2652
    Feature_isGCN | 0, // V_CMPX_NLT_F64_e32 = 2653
    0, // V_CMPX_NLT_F64_e64 = 2654
    0, // V_CMPX_NLT_F64_sdwa = 2655
    Feature_Has16BitInsts | 0, // V_CMPX_O_F16_e32 = 2656
    0, // V_CMPX_O_F16_e64 = 2657
    0, // V_CMPX_O_F16_sdwa = 2658
    Feature_isGCN | 0, // V_CMPX_O_F32_e32 = 2659
    0, // V_CMPX_O_F32_e64 = 2660
    0, // V_CMPX_O_F32_sdwa = 2661
    Feature_isGCN | 0, // V_CMPX_O_F64_e32 = 2662
    0, // V_CMPX_O_F64_e64 = 2663
    0, // V_CMPX_O_F64_sdwa = 2664
    Feature_Has16BitInsts | 0, // V_CMPX_TRU_F16_e32 = 2665
    0, // V_CMPX_TRU_F16_e64 = 2666
    0, // V_CMPX_TRU_F16_sdwa = 2667
    Feature_isGCN | 0, // V_CMPX_TRU_F32_e32 = 2668
    0, // V_CMPX_TRU_F32_e64 = 2669
    0, // V_CMPX_TRU_F32_sdwa = 2670
    Feature_isGCN | 0, // V_CMPX_TRU_F64_e32 = 2671
    0, // V_CMPX_TRU_F64_e64 = 2672
    0, // V_CMPX_TRU_F64_sdwa = 2673
    Feature_Has16BitInsts | 0, // V_CMPX_T_I16_e32 = 2674
    0, // V_CMPX_T_I16_e64 = 2675
    0, // V_CMPX_T_I16_sdwa = 2676
    Feature_isGCN | 0, // V_CMPX_T_I32_e32 = 2677
    0, // V_CMPX_T_I32_e64 = 2678
    0, // V_CMPX_T_I32_sdwa = 2679
    Feature_isGCN | 0, // V_CMPX_T_I64_e32 = 2680
    0, // V_CMPX_T_I64_e64 = 2681
    0, // V_CMPX_T_I64_sdwa = 2682
    Feature_Has16BitInsts | 0, // V_CMPX_T_U16_e32 = 2683
    0, // V_CMPX_T_U16_e64 = 2684
    0, // V_CMPX_T_U16_sdwa = 2685
    Feature_isGCN | 0, // V_CMPX_T_U32_e32 = 2686
    0, // V_CMPX_T_U32_e64 = 2687
    0, // V_CMPX_T_U32_sdwa = 2688
    Feature_isGCN | 0, // V_CMPX_T_U64_e32 = 2689
    0, // V_CMPX_T_U64_e64 = 2690
    0, // V_CMPX_T_U64_sdwa = 2691
    Feature_Has16BitInsts | 0, // V_CMPX_U_F16_e32 = 2692
    0, // V_CMPX_U_F16_e64 = 2693
    0, // V_CMPX_U_F16_sdwa = 2694
    Feature_isGCN | 0, // V_CMPX_U_F32_e32 = 2695
    0, // V_CMPX_U_F32_e64 = 2696
    0, // V_CMPX_U_F32_sdwa = 2697
    Feature_isGCN | 0, // V_CMPX_U_F64_e32 = 2698
    0, // V_CMPX_U_F64_e64 = 2699
    0, // V_CMPX_U_F64_sdwa = 2700
    Feature_isGCN | 0, // V_CMP_CLASS_F16_e32 = 2701
    0, // V_CMP_CLASS_F16_e64 = 2702
    0, // V_CMP_CLASS_F16_sdwa = 2703
    Feature_isGCN | 0, // V_CMP_CLASS_F32_e32 = 2704
    0, // V_CMP_CLASS_F32_e64 = 2705
    0, // V_CMP_CLASS_F32_sdwa = 2706
    Feature_isGCN | 0, // V_CMP_CLASS_F64_e32 = 2707
    0, // V_CMP_CLASS_F64_e64 = 2708
    0, // V_CMP_CLASS_F64_sdwa = 2709
    Feature_Has16BitInsts | 0, // V_CMP_EQ_F16_e32 = 2710
    0, // V_CMP_EQ_F16_e64 = 2711
    0, // V_CMP_EQ_F16_sdwa = 2712
    Feature_isGCN | 0, // V_CMP_EQ_F32_e32 = 2713
    0, // V_CMP_EQ_F32_e64 = 2714
    0, // V_CMP_EQ_F32_sdwa = 2715
    Feature_isGCN | 0, // V_CMP_EQ_F64_e32 = 2716
    0, // V_CMP_EQ_F64_e64 = 2717
    0, // V_CMP_EQ_F64_sdwa = 2718
    Feature_Has16BitInsts | 0, // V_CMP_EQ_I16_e32 = 2719
    0, // V_CMP_EQ_I16_e64 = 2720
    0, // V_CMP_EQ_I16_sdwa = 2721
    Feature_isGCN | 0, // V_CMP_EQ_I32_e32 = 2722
    0, // V_CMP_EQ_I32_e64 = 2723
    0, // V_CMP_EQ_I32_sdwa = 2724
    Feature_isGCN | 0, // V_CMP_EQ_I64_e32 = 2725
    0, // V_CMP_EQ_I64_e64 = 2726
    0, // V_CMP_EQ_I64_sdwa = 2727
    Feature_Has16BitInsts | 0, // V_CMP_EQ_U16_e32 = 2728
    0, // V_CMP_EQ_U16_e64 = 2729
    0, // V_CMP_EQ_U16_sdwa = 2730
    Feature_isGCN | 0, // V_CMP_EQ_U32_e32 = 2731
    0, // V_CMP_EQ_U32_e64 = 2732
    0, // V_CMP_EQ_U32_sdwa = 2733
    Feature_isGCN | 0, // V_CMP_EQ_U64_e32 = 2734
    0, // V_CMP_EQ_U64_e64 = 2735
    0, // V_CMP_EQ_U64_sdwa = 2736
    Feature_Has16BitInsts | 0, // V_CMP_F_F16_e32 = 2737
    0, // V_CMP_F_F16_e64 = 2738
    0, // V_CMP_F_F16_sdwa = 2739
    Feature_isGCN | 0, // V_CMP_F_F32_e32 = 2740
    0, // V_CMP_F_F32_e64 = 2741
    0, // V_CMP_F_F32_sdwa = 2742
    Feature_isGCN | 0, // V_CMP_F_F64_e32 = 2743
    0, // V_CMP_F_F64_e64 = 2744
    0, // V_CMP_F_F64_sdwa = 2745
    Feature_Has16BitInsts | 0, // V_CMP_F_I16_e32 = 2746
    0, // V_CMP_F_I16_e64 = 2747
    0, // V_CMP_F_I16_sdwa = 2748
    Feature_isGCN | 0, // V_CMP_F_I32_e32 = 2749
    0, // V_CMP_F_I32_e64 = 2750
    0, // V_CMP_F_I32_sdwa = 2751
    Feature_isGCN | 0, // V_CMP_F_I64_e32 = 2752
    0, // V_CMP_F_I64_e64 = 2753
    0, // V_CMP_F_I64_sdwa = 2754
    Feature_Has16BitInsts | 0, // V_CMP_F_U16_e32 = 2755
    0, // V_CMP_F_U16_e64 = 2756
    0, // V_CMP_F_U16_sdwa = 2757
    Feature_isGCN | 0, // V_CMP_F_U32_e32 = 2758
    0, // V_CMP_F_U32_e64 = 2759
    0, // V_CMP_F_U32_sdwa = 2760
    Feature_isGCN | 0, // V_CMP_F_U64_e32 = 2761
    0, // V_CMP_F_U64_e64 = 2762
    0, // V_CMP_F_U64_sdwa = 2763
    Feature_Has16BitInsts | 0, // V_CMP_GE_F16_e32 = 2764
    0, // V_CMP_GE_F16_e64 = 2765
    0, // V_CMP_GE_F16_sdwa = 2766
    Feature_isGCN | 0, // V_CMP_GE_F32_e32 = 2767
    0, // V_CMP_GE_F32_e64 = 2768
    0, // V_CMP_GE_F32_sdwa = 2769
    Feature_isGCN | 0, // V_CMP_GE_F64_e32 = 2770
    0, // V_CMP_GE_F64_e64 = 2771
    0, // V_CMP_GE_F64_sdwa = 2772
    Feature_Has16BitInsts | 0, // V_CMP_GE_I16_e32 = 2773
    0, // V_CMP_GE_I16_e64 = 2774
    0, // V_CMP_GE_I16_sdwa = 2775
    Feature_isGCN | 0, // V_CMP_GE_I32_e32 = 2776
    0, // V_CMP_GE_I32_e64 = 2777
    0, // V_CMP_GE_I32_sdwa = 2778
    Feature_isGCN | 0, // V_CMP_GE_I64_e32 = 2779
    0, // V_CMP_GE_I64_e64 = 2780
    0, // V_CMP_GE_I64_sdwa = 2781
    Feature_Has16BitInsts | 0, // V_CMP_GE_U16_e32 = 2782
    0, // V_CMP_GE_U16_e64 = 2783
    0, // V_CMP_GE_U16_sdwa = 2784
    Feature_isGCN | 0, // V_CMP_GE_U32_e32 = 2785
    0, // V_CMP_GE_U32_e64 = 2786
    0, // V_CMP_GE_U32_sdwa = 2787
    Feature_isGCN | 0, // V_CMP_GE_U64_e32 = 2788
    0, // V_CMP_GE_U64_e64 = 2789
    0, // V_CMP_GE_U64_sdwa = 2790
    Feature_Has16BitInsts | 0, // V_CMP_GT_F16_e32 = 2791
    0, // V_CMP_GT_F16_e64 = 2792
    0, // V_CMP_GT_F16_sdwa = 2793
    Feature_isGCN | 0, // V_CMP_GT_F32_e32 = 2794
    0, // V_CMP_GT_F32_e64 = 2795
    0, // V_CMP_GT_F32_sdwa = 2796
    Feature_isGCN | 0, // V_CMP_GT_F64_e32 = 2797
    0, // V_CMP_GT_F64_e64 = 2798
    0, // V_CMP_GT_F64_sdwa = 2799
    Feature_Has16BitInsts | 0, // V_CMP_GT_I16_e32 = 2800
    0, // V_CMP_GT_I16_e64 = 2801
    0, // V_CMP_GT_I16_sdwa = 2802
    Feature_isGCN | 0, // V_CMP_GT_I32_e32 = 2803
    0, // V_CMP_GT_I32_e64 = 2804
    0, // V_CMP_GT_I32_sdwa = 2805
    Feature_isGCN | 0, // V_CMP_GT_I64_e32 = 2806
    0, // V_CMP_GT_I64_e64 = 2807
    0, // V_CMP_GT_I64_sdwa = 2808
    Feature_Has16BitInsts | 0, // V_CMP_GT_U16_e32 = 2809
    0, // V_CMP_GT_U16_e64 = 2810
    0, // V_CMP_GT_U16_sdwa = 2811
    Feature_isGCN | 0, // V_CMP_GT_U32_e32 = 2812
    0, // V_CMP_GT_U32_e64 = 2813
    0, // V_CMP_GT_U32_sdwa = 2814
    Feature_isGCN | 0, // V_CMP_GT_U64_e32 = 2815
    0, // V_CMP_GT_U64_e64 = 2816
    0, // V_CMP_GT_U64_sdwa = 2817
    Feature_Has16BitInsts | 0, // V_CMP_LE_F16_e32 = 2818
    0, // V_CMP_LE_F16_e64 = 2819
    0, // V_CMP_LE_F16_sdwa = 2820
    Feature_isGCN | 0, // V_CMP_LE_F32_e32 = 2821
    0, // V_CMP_LE_F32_e64 = 2822
    0, // V_CMP_LE_F32_sdwa = 2823
    Feature_isGCN | 0, // V_CMP_LE_F64_e32 = 2824
    0, // V_CMP_LE_F64_e64 = 2825
    0, // V_CMP_LE_F64_sdwa = 2826
    Feature_Has16BitInsts | 0, // V_CMP_LE_I16_e32 = 2827
    0, // V_CMP_LE_I16_e64 = 2828
    0, // V_CMP_LE_I16_sdwa = 2829
    Feature_isGCN | 0, // V_CMP_LE_I32_e32 = 2830
    0, // V_CMP_LE_I32_e64 = 2831
    0, // V_CMP_LE_I32_sdwa = 2832
    Feature_isGCN | 0, // V_CMP_LE_I64_e32 = 2833
    0, // V_CMP_LE_I64_e64 = 2834
    0, // V_CMP_LE_I64_sdwa = 2835
    Feature_Has16BitInsts | 0, // V_CMP_LE_U16_e32 = 2836
    0, // V_CMP_LE_U16_e64 = 2837
    0, // V_CMP_LE_U16_sdwa = 2838
    Feature_isGCN | 0, // V_CMP_LE_U32_e32 = 2839
    0, // V_CMP_LE_U32_e64 = 2840
    0, // V_CMP_LE_U32_sdwa = 2841
    Feature_isGCN | 0, // V_CMP_LE_U64_e32 = 2842
    0, // V_CMP_LE_U64_e64 = 2843
    0, // V_CMP_LE_U64_sdwa = 2844
    Feature_Has16BitInsts | 0, // V_CMP_LG_F16_e32 = 2845
    0, // V_CMP_LG_F16_e64 = 2846
    0, // V_CMP_LG_F16_sdwa = 2847
    Feature_isGCN | 0, // V_CMP_LG_F32_e32 = 2848
    0, // V_CMP_LG_F32_e64 = 2849
    0, // V_CMP_LG_F32_sdwa = 2850
    Feature_isGCN | 0, // V_CMP_LG_F64_e32 = 2851
    0, // V_CMP_LG_F64_e64 = 2852
    0, // V_CMP_LG_F64_sdwa = 2853
    Feature_Has16BitInsts | 0, // V_CMP_LT_F16_e32 = 2854
    0, // V_CMP_LT_F16_e64 = 2855
    0, // V_CMP_LT_F16_sdwa = 2856
    Feature_isGCN | 0, // V_CMP_LT_F32_e32 = 2857
    0, // V_CMP_LT_F32_e64 = 2858
    0, // V_CMP_LT_F32_sdwa = 2859
    Feature_isGCN | 0, // V_CMP_LT_F64_e32 = 2860
    0, // V_CMP_LT_F64_e64 = 2861
    0, // V_CMP_LT_F64_sdwa = 2862
    Feature_Has16BitInsts | 0, // V_CMP_LT_I16_e32 = 2863
    0, // V_CMP_LT_I16_e64 = 2864
    0, // V_CMP_LT_I16_sdwa = 2865
    Feature_isGCN | 0, // V_CMP_LT_I32_e32 = 2866
    0, // V_CMP_LT_I32_e64 = 2867
    0, // V_CMP_LT_I32_sdwa = 2868
    Feature_isGCN | 0, // V_CMP_LT_I64_e32 = 2869
    0, // V_CMP_LT_I64_e64 = 2870
    0, // V_CMP_LT_I64_sdwa = 2871
    Feature_Has16BitInsts | 0, // V_CMP_LT_U16_e32 = 2872
    0, // V_CMP_LT_U16_e64 = 2873
    0, // V_CMP_LT_U16_sdwa = 2874
    Feature_isGCN | 0, // V_CMP_LT_U32_e32 = 2875
    0, // V_CMP_LT_U32_e64 = 2876
    0, // V_CMP_LT_U32_sdwa = 2877
    Feature_isGCN | 0, // V_CMP_LT_U64_e32 = 2878
    0, // V_CMP_LT_U64_e64 = 2879
    0, // V_CMP_LT_U64_sdwa = 2880
    Feature_Has16BitInsts | 0, // V_CMP_NEQ_F16_e32 = 2881
    0, // V_CMP_NEQ_F16_e64 = 2882
    0, // V_CMP_NEQ_F16_sdwa = 2883
    Feature_isGCN | 0, // V_CMP_NEQ_F32_e32 = 2884
    0, // V_CMP_NEQ_F32_e64 = 2885
    0, // V_CMP_NEQ_F32_sdwa = 2886
    Feature_isGCN | 0, // V_CMP_NEQ_F64_e32 = 2887
    0, // V_CMP_NEQ_F64_e64 = 2888
    0, // V_CMP_NEQ_F64_sdwa = 2889
    Feature_Has16BitInsts | 0, // V_CMP_NE_I16_e32 = 2890
    0, // V_CMP_NE_I16_e64 = 2891
    0, // V_CMP_NE_I16_sdwa = 2892
    Feature_isGCN | 0, // V_CMP_NE_I32_e32 = 2893
    0, // V_CMP_NE_I32_e64 = 2894
    0, // V_CMP_NE_I32_sdwa = 2895
    Feature_isGCN | 0, // V_CMP_NE_I64_e32 = 2896
    0, // V_CMP_NE_I64_e64 = 2897
    0, // V_CMP_NE_I64_sdwa = 2898
    Feature_Has16BitInsts | 0, // V_CMP_NE_U16_e32 = 2899
    0, // V_CMP_NE_U16_e64 = 2900
    0, // V_CMP_NE_U16_sdwa = 2901
    Feature_isGCN | 0, // V_CMP_NE_U32_e32 = 2902
    0, // V_CMP_NE_U32_e64 = 2903
    0, // V_CMP_NE_U32_sdwa = 2904
    Feature_isGCN | 0, // V_CMP_NE_U64_e32 = 2905
    0, // V_CMP_NE_U64_e64 = 2906
    0, // V_CMP_NE_U64_sdwa = 2907
    Feature_Has16BitInsts | 0, // V_CMP_NGE_F16_e32 = 2908
    0, // V_CMP_NGE_F16_e64 = 2909
    0, // V_CMP_NGE_F16_sdwa = 2910
    Feature_isGCN | 0, // V_CMP_NGE_F32_e32 = 2911
    0, // V_CMP_NGE_F32_e64 = 2912
    0, // V_CMP_NGE_F32_sdwa = 2913
    Feature_isGCN | 0, // V_CMP_NGE_F64_e32 = 2914
    0, // V_CMP_NGE_F64_e64 = 2915
    0, // V_CMP_NGE_F64_sdwa = 2916
    Feature_Has16BitInsts | 0, // V_CMP_NGT_F16_e32 = 2917
    0, // V_CMP_NGT_F16_e64 = 2918
    0, // V_CMP_NGT_F16_sdwa = 2919
    Feature_isGCN | 0, // V_CMP_NGT_F32_e32 = 2920
    0, // V_CMP_NGT_F32_e64 = 2921
    0, // V_CMP_NGT_F32_sdwa = 2922
    Feature_isGCN | 0, // V_CMP_NGT_F64_e32 = 2923
    0, // V_CMP_NGT_F64_e64 = 2924
    0, // V_CMP_NGT_F64_sdwa = 2925
    Feature_Has16BitInsts | 0, // V_CMP_NLE_F16_e32 = 2926
    0, // V_CMP_NLE_F16_e64 = 2927
    0, // V_CMP_NLE_F16_sdwa = 2928
    Feature_isGCN | 0, // V_CMP_NLE_F32_e32 = 2929
    0, // V_CMP_NLE_F32_e64 = 2930
    0, // V_CMP_NLE_F32_sdwa = 2931
    Feature_isGCN | 0, // V_CMP_NLE_F64_e32 = 2932
    0, // V_CMP_NLE_F64_e64 = 2933
    0, // V_CMP_NLE_F64_sdwa = 2934
    Feature_Has16BitInsts | 0, // V_CMP_NLG_F16_e32 = 2935
    0, // V_CMP_NLG_F16_e64 = 2936
    0, // V_CMP_NLG_F16_sdwa = 2937
    Feature_isGCN | 0, // V_CMP_NLG_F32_e32 = 2938
    0, // V_CMP_NLG_F32_e64 = 2939
    0, // V_CMP_NLG_F32_sdwa = 2940
    Feature_isGCN | 0, // V_CMP_NLG_F64_e32 = 2941
    0, // V_CMP_NLG_F64_e64 = 2942
    0, // V_CMP_NLG_F64_sdwa = 2943
    Feature_Has16BitInsts | 0, // V_CMP_NLT_F16_e32 = 2944
    0, // V_CMP_NLT_F16_e64 = 2945
    0, // V_CMP_NLT_F16_sdwa = 2946
    Feature_isGCN | 0, // V_CMP_NLT_F32_e32 = 2947
    0, // V_CMP_NLT_F32_e64 = 2948
    0, // V_CMP_NLT_F32_sdwa = 2949
    Feature_isGCN | 0, // V_CMP_NLT_F64_e32 = 2950
    0, // V_CMP_NLT_F64_e64 = 2951
    0, // V_CMP_NLT_F64_sdwa = 2952
    Feature_Has16BitInsts | 0, // V_CMP_O_F16_e32 = 2953
    0, // V_CMP_O_F16_e64 = 2954
    0, // V_CMP_O_F16_sdwa = 2955
    Feature_isGCN | 0, // V_CMP_O_F32_e32 = 2956
    0, // V_CMP_O_F32_e64 = 2957
    0, // V_CMP_O_F32_sdwa = 2958
    Feature_isGCN | 0, // V_CMP_O_F64_e32 = 2959
    0, // V_CMP_O_F64_e64 = 2960
    0, // V_CMP_O_F64_sdwa = 2961
    Feature_Has16BitInsts | 0, // V_CMP_TRU_F16_e32 = 2962
    0, // V_CMP_TRU_F16_e64 = 2963
    0, // V_CMP_TRU_F16_sdwa = 2964
    Feature_isGCN | 0, // V_CMP_TRU_F32_e32 = 2965
    0, // V_CMP_TRU_F32_e64 = 2966
    0, // V_CMP_TRU_F32_sdwa = 2967
    Feature_isGCN | 0, // V_CMP_TRU_F64_e32 = 2968
    0, // V_CMP_TRU_F64_e64 = 2969
    0, // V_CMP_TRU_F64_sdwa = 2970
    Feature_Has16BitInsts | 0, // V_CMP_T_I16_e32 = 2971
    0, // V_CMP_T_I16_e64 = 2972
    0, // V_CMP_T_I16_sdwa = 2973
    Feature_isGCN | 0, // V_CMP_T_I32_e32 = 2974
    0, // V_CMP_T_I32_e64 = 2975
    0, // V_CMP_T_I32_sdwa = 2976
    Feature_isGCN | 0, // V_CMP_T_I64_e32 = 2977
    0, // V_CMP_T_I64_e64 = 2978
    0, // V_CMP_T_I64_sdwa = 2979
    Feature_Has16BitInsts | 0, // V_CMP_T_U16_e32 = 2980
    0, // V_CMP_T_U16_e64 = 2981
    0, // V_CMP_T_U16_sdwa = 2982
    Feature_isGCN | 0, // V_CMP_T_U32_e32 = 2983
    0, // V_CMP_T_U32_e64 = 2984
    0, // V_CMP_T_U32_sdwa = 2985
    Feature_isGCN | 0, // V_CMP_T_U64_e32 = 2986
    0, // V_CMP_T_U64_e64 = 2987
    0, // V_CMP_T_U64_sdwa = 2988
    Feature_Has16BitInsts | 0, // V_CMP_U_F16_e32 = 2989
    0, // V_CMP_U_F16_e64 = 2990
    0, // V_CMP_U_F16_sdwa = 2991
    Feature_isGCN | 0, // V_CMP_U_F32_e32 = 2992
    0, // V_CMP_U_F32_e64 = 2993
    0, // V_CMP_U_F32_sdwa = 2994
    Feature_isGCN | 0, // V_CMP_U_F64_e32 = 2995
    0, // V_CMP_U_F64_e64 = 2996
    0, // V_CMP_U_F64_sdwa = 2997
    Feature_isGCN | 0, // V_CNDMASK_B32_dpp = 2998
    Feature_isGCN | 0, // V_CNDMASK_B32_e32 = 2999
    Feature_isGCN | 0, // V_CNDMASK_B32_e64 = 3000
    Feature_isGCN | 0, // V_CNDMASK_B32_sdwa = 3001
    Feature_isGCN | 0, // V_CNDMASK_B64_PSEUDO = 3002
    0, // V_COS_F16_dpp = 3003
    0, // V_COS_F16_e32 = 3004
    0, // V_COS_F16_e64 = 3005
    0, // V_COS_F16_sdwa = 3006
    0, // V_COS_F32_dpp = 3007
    0, // V_COS_F32_e32 = 3008
    0, // V_COS_F32_e64 = 3009
    0, // V_COS_F32_sdwa = 3010
    0, // V_CUBEID_F32 = 3011
    0, // V_CUBEMA_F32 = 3012
    0, // V_CUBESC_F32 = 3013
    0, // V_CUBETC_F32 = 3014
    0, // V_CVT_F16_F32_dpp = 3015
    0, // V_CVT_F16_F32_e32 = 3016
    0, // V_CVT_F16_F32_e64 = 3017
    0, // V_CVT_F16_F32_sdwa = 3018
    0, // V_CVT_F16_I16_dpp = 3019
    0, // V_CVT_F16_I16_e32 = 3020
    0, // V_CVT_F16_I16_e64 = 3021
    0, // V_CVT_F16_I16_sdwa = 3022
    0, // V_CVT_F16_U16_dpp = 3023
    0, // V_CVT_F16_U16_e32 = 3024
    0, // V_CVT_F16_U16_e64 = 3025
    0, // V_CVT_F16_U16_sdwa = 3026
    0, // V_CVT_F32_F16_dpp = 3027
    0, // V_CVT_F32_F16_e32 = 3028
    0, // V_CVT_F32_F16_e64 = 3029
    0, // V_CVT_F32_F16_sdwa = 3030
    0, // V_CVT_F32_F64_e32 = 3031
    0, // V_CVT_F32_F64_e64 = 3032
    0, // V_CVT_F32_F64_sdwa = 3033
    0, // V_CVT_F32_I32_dpp = 3034
    0, // V_CVT_F32_I32_e32 = 3035
    0, // V_CVT_F32_I32_e64 = 3036
    0, // V_CVT_F32_I32_sdwa = 3037
    0, // V_CVT_F32_U32_dpp = 3038
    0, // V_CVT_F32_U32_e32 = 3039
    0, // V_CVT_F32_U32_e64 = 3040
    0, // V_CVT_F32_U32_sdwa = 3041
    0, // V_CVT_F32_UBYTE0_dpp = 3042
    0, // V_CVT_F32_UBYTE0_e32 = 3043
    0, // V_CVT_F32_UBYTE0_e64 = 3044
    0, // V_CVT_F32_UBYTE0_sdwa = 3045
    0, // V_CVT_F32_UBYTE1_dpp = 3046
    0, // V_CVT_F32_UBYTE1_e32 = 3047
    0, // V_CVT_F32_UBYTE1_e64 = 3048
    0, // V_CVT_F32_UBYTE1_sdwa = 3049
    0, // V_CVT_F32_UBYTE2_dpp = 3050
    0, // V_CVT_F32_UBYTE2_e32 = 3051
    0, // V_CVT_F32_UBYTE2_e64 = 3052
    0, // V_CVT_F32_UBYTE2_sdwa = 3053
    0, // V_CVT_F32_UBYTE3_dpp = 3054
    0, // V_CVT_F32_UBYTE3_e32 = 3055
    0, // V_CVT_F32_UBYTE3_e64 = 3056
    0, // V_CVT_F32_UBYTE3_sdwa = 3057
    0, // V_CVT_F64_F32_e32 = 3058
    0, // V_CVT_F64_F32_e64 = 3059
    0, // V_CVT_F64_F32_sdwa = 3060
    0, // V_CVT_F64_I32_e32 = 3061
    0, // V_CVT_F64_I32_e64 = 3062
    0, // V_CVT_F64_I32_sdwa = 3063
    0, // V_CVT_F64_U32_e32 = 3064
    0, // V_CVT_F64_U32_e64 = 3065
    0, // V_CVT_F64_U32_sdwa = 3066
    0, // V_CVT_FLR_I32_F32_dpp = 3067
    0, // V_CVT_FLR_I32_F32_e32 = 3068
    0, // V_CVT_FLR_I32_F32_e64 = 3069
    0, // V_CVT_FLR_I32_F32_sdwa = 3070
    0, // V_CVT_I16_F16_dpp = 3071
    0, // V_CVT_I16_F16_e32 = 3072
    0, // V_CVT_I16_F16_e64 = 3073
    0, // V_CVT_I16_F16_sdwa = 3074
    0, // V_CVT_I32_F32_dpp = 3075
    0, // V_CVT_I32_F32_e32 = 3076
    0, // V_CVT_I32_F32_e64 = 3077
    0, // V_CVT_I32_F32_sdwa = 3078
    0, // V_CVT_I32_F64_e32 = 3079
    0, // V_CVT_I32_F64_e64 = 3080
    0, // V_CVT_I32_F64_sdwa = 3081
    0, // V_CVT_NORM_I16_F16_dpp = 3082
    0, // V_CVT_NORM_I16_F16_e32 = 3083
    0, // V_CVT_NORM_I16_F16_e64 = 3084
    0, // V_CVT_NORM_I16_F16_sdwa = 3085
    0, // V_CVT_NORM_U16_F16_dpp = 3086
    0, // V_CVT_NORM_U16_F16_e32 = 3087
    0, // V_CVT_NORM_U16_F16_e64 = 3088
    0, // V_CVT_NORM_U16_F16_sdwa = 3089
    0, // V_CVT_OFF_F32_I4_dpp = 3090
    0, // V_CVT_OFF_F32_I4_e32 = 3091
    0, // V_CVT_OFF_F32_I4_e64 = 3092
    0, // V_CVT_OFF_F32_I4_sdwa = 3093
    Feature_isGCN | 0, // V_CVT_PKACCUM_U8_F32_e32 = 3094
    Feature_isGCN | 0, // V_CVT_PKACCUM_U8_F32_e64 = 3095
    Feature_isGCN | 0, // V_CVT_PKACCUM_U8_F32_sdwa = 3096
    0, // V_CVT_PKNORM_I16_F16 = 3097
    Feature_isGCN | 0, // V_CVT_PKNORM_I16_F32_e32 = 3098
    Feature_isGCN | 0, // V_CVT_PKNORM_I16_F32_e64 = 3099
    Feature_isGCN | 0, // V_CVT_PKNORM_I16_F32_sdwa = 3100
    0, // V_CVT_PKNORM_U16_F16 = 3101
    Feature_isGCN | 0, // V_CVT_PKNORM_U16_F32_e32 = 3102
    Feature_isGCN | 0, // V_CVT_PKNORM_U16_F32_e64 = 3103
    Feature_isGCN | 0, // V_CVT_PKNORM_U16_F32_sdwa = 3104
    Feature_isGCN | 0, // V_CVT_PKRTZ_F16_F32_e32 = 3105
    Feature_isGCN | 0, // V_CVT_PKRTZ_F16_F32_e64 = 3106
    Feature_isGCN | 0, // V_CVT_PKRTZ_F16_F32_sdwa = 3107
    Feature_isGCN | 0, // V_CVT_PK_I16_I32_e32 = 3108
    Feature_isGCN | 0, // V_CVT_PK_I16_I32_e64 = 3109
    Feature_isGCN | 0, // V_CVT_PK_I16_I32_sdwa = 3110
    Feature_isGCN | 0, // V_CVT_PK_U16_U32_e32 = 3111
    Feature_isGCN | 0, // V_CVT_PK_U16_U32_e64 = 3112
    Feature_isGCN | 0, // V_CVT_PK_U16_U32_sdwa = 3113
    0, // V_CVT_PK_U8_F32 = 3114
    0, // V_CVT_RPI_I32_F32_dpp = 3115
    0, // V_CVT_RPI_I32_F32_e32 = 3116
    0, // V_CVT_RPI_I32_F32_e64 = 3117
    0, // V_CVT_RPI_I32_F32_sdwa = 3118
    0, // V_CVT_U16_F16_dpp = 3119
    0, // V_CVT_U16_F16_e32 = 3120
    0, // V_CVT_U16_F16_e64 = 3121
    0, // V_CVT_U16_F16_sdwa = 3122
    0, // V_CVT_U32_F32_dpp = 3123
    0, // V_CVT_U32_F32_e32 = 3124
    0, // V_CVT_U32_F32_e64 = 3125
    0, // V_CVT_U32_F32_sdwa = 3126
    0, // V_CVT_U32_F64_e32 = 3127
    0, // V_CVT_U32_F64_e64 = 3128
    0, // V_CVT_U32_F64_sdwa = 3129
    Feature_Has16BitInsts | Feature_isVIOnly | 0, // V_DIV_FIXUP_F16 = 3130
    Feature_Has16BitInsts | Feature_isGFX9 | 0, // V_DIV_FIXUP_F16_gfx9 = 3131
    0, // V_DIV_FIXUP_F32 = 3132
    0, // V_DIV_FIXUP_F64 = 3133
    0, // V_DIV_FMAS_F32 = 3134
    0, // V_DIV_FMAS_F64 = 3135
    0, // V_DIV_SCALE_F32 = 3136
    0, // V_DIV_SCALE_F64 = 3137
    0, // V_DOT2_F32_F16 = 3138
    0, // V_DOT2_I32_I16 = 3139
    0, // V_DOT2_U32_U16 = 3140
    0, // V_DOT4_I32_I8 = 3141
    0, // V_DOT4_U32_U8 = 3142
    0, // V_DOT8_I32_I4 = 3143
    0, // V_DOT8_U32_U4 = 3144
    0, // V_EXP_F16_dpp = 3145
    0, // V_EXP_F16_e32 = 3146
    0, // V_EXP_F16_e64 = 3147
    0, // V_EXP_F16_sdwa = 3148
    0, // V_EXP_F32_dpp = 3149
    0, // V_EXP_F32_e32 = 3150
    0, // V_EXP_F32_e64 = 3151
    0, // V_EXP_F32_sdwa = 3152
    0, // V_EXP_LEGACY_F32_dpp = 3153
    0, // V_EXP_LEGACY_F32_e32 = 3154
    0, // V_EXP_LEGACY_F32_e64 = 3155
    0, // V_EXP_LEGACY_F32_sdwa = 3156
    0, // V_FFBH_I32_dpp = 3157
    0, // V_FFBH_I32_e32 = 3158
    0, // V_FFBH_I32_e64 = 3159
    0, // V_FFBH_I32_sdwa = 3160
    0, // V_FFBH_U32_dpp = 3161
    0, // V_FFBH_U32_e32 = 3162
    0, // V_FFBH_U32_e64 = 3163
    0, // V_FFBH_U32_sdwa = 3164
    0, // V_FFBL_B32_dpp = 3165
    0, // V_FFBL_B32_e32 = 3166
    0, // V_FFBL_B32_e64 = 3167
    0, // V_FFBL_B32_sdwa = 3168
    0, // V_FLOOR_F16_dpp = 3169
    0, // V_FLOOR_F16_e32 = 3170
    0, // V_FLOOR_F16_e64 = 3171
    0, // V_FLOOR_F16_sdwa = 3172
    0, // V_FLOOR_F32_dpp = 3173
    0, // V_FLOOR_F32_e32 = 3174
    0, // V_FLOOR_F32_e64 = 3175
    0, // V_FLOOR_F32_sdwa = 3176
    0, // V_FLOOR_F64_e32 = 3177
    0, // V_FLOOR_F64_e64 = 3178
    0, // V_FLOOR_F64_sdwa = 3179
    0, // V_FMAC_F32_dpp = 3180
    0, // V_FMAC_F32_e32 = 3181
    0, // V_FMAC_F32_e64 = 3182
    0, // V_FMAC_F32_sdwa = 3183
    Feature_Has16BitInsts | Feature_isVIOnly | 0, // V_FMA_F16 = 3184
    Feature_Has16BitInsts | Feature_isGFX9 | 0, // V_FMA_F16_gfx9 = 3185
    0, // V_FMA_F32 = 3186
    0, // V_FMA_F64 = 3187
    0, // V_FMA_MIXHI_F16 = 3188
    0, // V_FMA_MIXLO_F16 = 3189
    0, // V_FMA_MIX_F32 = 3190
    0, // V_FRACT_F16_dpp = 3191
    0, // V_FRACT_F16_e32 = 3192
    0, // V_FRACT_F16_e64 = 3193
    0, // V_FRACT_F16_sdwa = 3194
    0, // V_FRACT_F32_dpp = 3195
    0, // V_FRACT_F32_e32 = 3196
    0, // V_FRACT_F32_e64 = 3197
    0, // V_FRACT_F32_sdwa = 3198
    0, // V_FRACT_F64_e32 = 3199
    0, // V_FRACT_F64_e64 = 3200
    0, // V_FRACT_F64_sdwa = 3201
    0, // V_FREXP_EXP_I16_F16_dpp = 3202
    0, // V_FREXP_EXP_I16_F16_e32 = 3203
    0, // V_FREXP_EXP_I16_F16_e64 = 3204
    0, // V_FREXP_EXP_I16_F16_sdwa = 3205
    0, // V_FREXP_EXP_I32_F32_dpp = 3206
    0, // V_FREXP_EXP_I32_F32_e32 = 3207
    0, // V_FREXP_EXP_I32_F32_e64 = 3208
    0, // V_FREXP_EXP_I32_F32_sdwa = 3209
    0, // V_FREXP_EXP_I32_F64_e32 = 3210
    0, // V_FREXP_EXP_I32_F64_e64 = 3211
    0, // V_FREXP_EXP_I32_F64_sdwa = 3212
    0, // V_FREXP_MANT_F16_dpp = 3213
    0, // V_FREXP_MANT_F16_e32 = 3214
    0, // V_FREXP_MANT_F16_e64 = 3215
    0, // V_FREXP_MANT_F16_sdwa = 3216
    0, // V_FREXP_MANT_F32_dpp = 3217
    0, // V_FREXP_MANT_F32_e32 = 3218
    0, // V_FREXP_MANT_F32_e64 = 3219
    0, // V_FREXP_MANT_F32_sdwa = 3220
    0, // V_FREXP_MANT_F64_e32 = 3221
    0, // V_FREXP_MANT_F64_e64 = 3222
    0, // V_FREXP_MANT_F64_sdwa = 3223
    Feature_isGCN | 0, // V_INTERP_MOV_F32 = 3224
    0, // V_INTERP_MOV_F32_e64 = 3225
    0, // V_INTERP_P1LL_F16 = 3226
    0, // V_INTERP_P1LV_F16 = 3227
    Feature_isGCN | 0, // V_INTERP_P1_F32 = 3228
    Feature_isGCN | 0, // V_INTERP_P1_F32_16bank = 3229
    0, // V_INTERP_P1_F32_e64 = 3230
    0, // V_INTERP_P2_F16 = 3231
    0, // V_INTERP_P2_F16_gfx9 = 3232
    Feature_isGCN | 0, // V_INTERP_P2_F32 = 3233
    0, // V_INTERP_P2_F32_e64 = 3234
    0, // V_LDEXP_F16_dpp = 3235
    0, // V_LDEXP_F16_e32 = 3236
    0, // V_LDEXP_F16_e64 = 3237
    0, // V_LDEXP_F16_sdwa = 3238
    Feature_isGCN | 0, // V_LDEXP_F32_e32 = 3239
    Feature_isGCN | 0, // V_LDEXP_F32_e64 = 3240
    Feature_isGCN | 0, // V_LDEXP_F32_sdwa = 3241
    0, // V_LDEXP_F64 = 3242
    0, // V_LERP_U8 = 3243
    0, // V_LOG_CLAMP_F32_dpp = 3244
    0, // V_LOG_CLAMP_F32_e32 = 3245
    0, // V_LOG_CLAMP_F32_e64 = 3246
    0, // V_LOG_CLAMP_F32_sdwa = 3247
    0, // V_LOG_F16_dpp = 3248
    0, // V_LOG_F16_e32 = 3249
    0, // V_LOG_F16_e64 = 3250
    0, // V_LOG_F16_sdwa = 3251
    0, // V_LOG_F32_dpp = 3252
    0, // V_LOG_F32_e32 = 3253
    0, // V_LOG_F32_e64 = 3254
    0, // V_LOG_F32_sdwa = 3255
    0, // V_LOG_LEGACY_F32_dpp = 3256
    0, // V_LOG_LEGACY_F32_e32 = 3257
    0, // V_LOG_LEGACY_F32_e64 = 3258
    0, // V_LOG_LEGACY_F32_sdwa = 3259
    0, // V_LSHLREV_B16_dpp = 3260
    0, // V_LSHLREV_B16_e32 = 3261
    0, // V_LSHLREV_B16_e64 = 3262
    0, // V_LSHLREV_B16_sdwa = 3263
    Feature_isGCN | 0, // V_LSHLREV_B32_dpp = 3264
    Feature_isGCN | 0, // V_LSHLREV_B32_e32 = 3265
    Feature_isGCN | 0, // V_LSHLREV_B32_e64 = 3266
    Feature_isGCN | 0, // V_LSHLREV_B32_sdwa = 3267
    0, // V_LSHLREV_B64 = 3268
    0, // V_LSHL_ADD_U32 = 3269
    Feature_isSICI | 0, // V_LSHL_B32_dpp = 3270
    Feature_isSICI | 0, // V_LSHL_B32_e32 = 3271
    Feature_isSICI | 0, // V_LSHL_B32_e64 = 3272
    Feature_isSICI | 0, // V_LSHL_B32_sdwa = 3273
    Feature_isSICI | 0, // V_LSHL_B64 = 3274
    0, // V_LSHL_OR_B32 = 3275
    0, // V_LSHRREV_B16_dpp = 3276
    0, // V_LSHRREV_B16_e32 = 3277
    0, // V_LSHRREV_B16_e64 = 3278
    0, // V_LSHRREV_B16_sdwa = 3279
    Feature_isGCN | 0, // V_LSHRREV_B32_dpp = 3280
    Feature_isGCN | 0, // V_LSHRREV_B32_e32 = 3281
    Feature_isGCN | 0, // V_LSHRREV_B32_e64 = 3282
    Feature_isGCN | 0, // V_LSHRREV_B32_sdwa = 3283
    0, // V_LSHRREV_B64 = 3284
    Feature_isSICI | 0, // V_LSHR_B32_dpp = 3285
    Feature_isSICI | 0, // V_LSHR_B32_e32 = 3286
    Feature_isSICI | 0, // V_LSHR_B32_e64 = 3287
    Feature_isSICI | 0, // V_LSHR_B32_sdwa = 3288
    Feature_isSICI | 0, // V_LSHR_B64 = 3289
    0, // V_MAC_F16_dpp = 3290
    0, // V_MAC_F16_e32 = 3291
    0, // V_MAC_F16_e64 = 3292
    0, // V_MAC_F16_sdwa = 3293
    Feature_isGCN | 0, // V_MAC_F32_dpp = 3294
    Feature_isGCN | 0, // V_MAC_F32_e32 = 3295
    Feature_isGCN | 0, // V_MAC_F32_e64 = 3296
    Feature_isGCN | 0, // V_MAC_F32_sdwa = 3297
    Feature_isSICI | 0, // V_MAC_LEGACY_F32_dpp = 3298
    Feature_isSICI | 0, // V_MAC_LEGACY_F32_e32 = 3299
    Feature_isSICI | 0, // V_MAC_LEGACY_F32_e64 = 3300
    Feature_isSICI | 0, // V_MAC_LEGACY_F32_sdwa = 3301
    0, // V_MADAK_F16 = 3302
    Feature_isGCN | 0, // V_MADAK_F32 = 3303
    0, // V_MADMK_F16 = 3304
    Feature_isGCN | 0, // V_MADMK_F32 = 3305
    0, // V_MAD_F16 = 3306
    0, // V_MAD_F16_gfx9 = 3307
    0, // V_MAD_F32 = 3308
    0, // V_MAD_I16 = 3309
    0, // V_MAD_I16_gfx9 = 3310
    0, // V_MAD_I32_I16 = 3311
    0, // V_MAD_I32_I24 = 3312
    0, // V_MAD_I64_I32 = 3313
    0, // V_MAD_LEGACY_F32 = 3314
    0, // V_MAD_MIXHI_F16 = 3315
    0, // V_MAD_MIXLO_F16 = 3316
    0, // V_MAD_MIX_F32 = 3317
    0, // V_MAD_U16 = 3318
    0, // V_MAD_U16_gfx9 = 3319
    0, // V_MAD_U32_U16 = 3320
    0, // V_MAD_U32_U24 = 3321
    0, // V_MAD_U64_U32 = 3322
    0, // V_MAX3_F16 = 3323
    0, // V_MAX3_F32 = 3324
    0, // V_MAX3_I16 = 3325
    0, // V_MAX3_I32 = 3326
    0, // V_MAX3_U16 = 3327
    0, // V_MAX3_U32 = 3328
    0, // V_MAX_F16_dpp = 3329
    0, // V_MAX_F16_e32 = 3330
    0, // V_MAX_F16_e64 = 3331
    0, // V_MAX_F16_sdwa = 3332
    Feature_isGCN | 0, // V_MAX_F32_dpp = 3333
    Feature_isGCN | 0, // V_MAX_F32_e32 = 3334
    Feature_isGCN | 0, // V_MAX_F32_e64 = 3335
    Feature_isGCN | 0, // V_MAX_F32_sdwa = 3336
    0, // V_MAX_F64 = 3337
    0, // V_MAX_I16_dpp = 3338
    0, // V_MAX_I16_e32 = 3339
    0, // V_MAX_I16_e64 = 3340
    0, // V_MAX_I16_sdwa = 3341
    Feature_isGCN | 0, // V_MAX_I32_dpp = 3342
    Feature_isGCN | 0, // V_MAX_I32_e32 = 3343
    Feature_isGCN | 0, // V_MAX_I32_e64 = 3344
    Feature_isGCN | 0, // V_MAX_I32_sdwa = 3345
    Feature_isSICI | 0, // V_MAX_LEGACY_F32_dpp = 3346
    Feature_isSICI | 0, // V_MAX_LEGACY_F32_e32 = 3347
    Feature_isSICI | 0, // V_MAX_LEGACY_F32_e64 = 3348
    Feature_isSICI | 0, // V_MAX_LEGACY_F32_sdwa = 3349
    0, // V_MAX_U16_dpp = 3350
    0, // V_MAX_U16_e32 = 3351
    0, // V_MAX_U16_e64 = 3352
    0, // V_MAX_U16_sdwa = 3353
    Feature_isGCN | 0, // V_MAX_U32_dpp = 3354
    Feature_isGCN | 0, // V_MAX_U32_e32 = 3355
    Feature_isGCN | 0, // V_MAX_U32_e64 = 3356
    Feature_isGCN | 0, // V_MAX_U32_sdwa = 3357
    Feature_isGCN | 0, // V_MBCNT_HI_U32_B32_e32 = 3358
    Feature_isGCN | 0, // V_MBCNT_HI_U32_B32_e64 = 3359
    Feature_isGCN | 0, // V_MBCNT_HI_U32_B32_sdwa = 3360
    Feature_isGCN | 0, // V_MBCNT_LO_U32_B32_e32 = 3361
    Feature_isGCN | 0, // V_MBCNT_LO_U32_B32_e64 = 3362
    Feature_isGCN | 0, // V_MBCNT_LO_U32_B32_sdwa = 3363
    0, // V_MED3_F16 = 3364
    0, // V_MED3_F32 = 3365
    0, // V_MED3_I16 = 3366
    0, // V_MED3_I32 = 3367
    0, // V_MED3_U16 = 3368
    0, // V_MED3_U32 = 3369
    0, // V_MIN3_F16 = 3370
    0, // V_MIN3_F32 = 3371
    0, // V_MIN3_I16 = 3372
    0, // V_MIN3_I32 = 3373
    0, // V_MIN3_U16 = 3374
    0, // V_MIN3_U32 = 3375
    0, // V_MIN_F16_dpp = 3376
    0, // V_MIN_F16_e32 = 3377
    0, // V_MIN_F16_e64 = 3378
    0, // V_MIN_F16_sdwa = 3379
    Feature_isGCN | 0, // V_MIN_F32_dpp = 3380
    Feature_isGCN | 0, // V_MIN_F32_e32 = 3381
    Feature_isGCN | 0, // V_MIN_F32_e64 = 3382
    Feature_isGCN | 0, // V_MIN_F32_sdwa = 3383
    0, // V_MIN_F64 = 3384
    0, // V_MIN_I16_dpp = 3385
    0, // V_MIN_I16_e32 = 3386
    0, // V_MIN_I16_e64 = 3387
    0, // V_MIN_I16_sdwa = 3388
    Feature_isGCN | 0, // V_MIN_I32_dpp = 3389
    Feature_isGCN | 0, // V_MIN_I32_e32 = 3390
    Feature_isGCN | 0, // V_MIN_I32_e64 = 3391
    Feature_isGCN | 0, // V_MIN_I32_sdwa = 3392
    Feature_isSICI | 0, // V_MIN_LEGACY_F32_dpp = 3393
    Feature_isSICI | 0, // V_MIN_LEGACY_F32_e32 = 3394
    Feature_isSICI | 0, // V_MIN_LEGACY_F32_e64 = 3395
    Feature_isSICI | 0, // V_MIN_LEGACY_F32_sdwa = 3396
    0, // V_MIN_U16_dpp = 3397
    0, // V_MIN_U16_e32 = 3398
    0, // V_MIN_U16_e64 = 3399
    0, // V_MIN_U16_sdwa = 3400
    Feature_isGCN | 0, // V_MIN_U32_dpp = 3401
    Feature_isGCN | 0, // V_MIN_U32_e32 = 3402
    Feature_isGCN | 0, // V_MIN_U32_e64 = 3403
    Feature_isGCN | 0, // V_MIN_U32_sdwa = 3404
    Feature_HasMovrel | 0, // V_MOVRELD_B32_V1 = 3405
    Feature_HasMovrel | 0, // V_MOVRELD_B32_V16 = 3406
    Feature_HasMovrel | 0, // V_MOVRELD_B32_V2 = 3407
    Feature_HasMovrel | 0, // V_MOVRELD_B32_V4 = 3408
    Feature_HasMovrel | 0, // V_MOVRELD_B32_V8 = 3409
    0, // V_MOVRELD_B32_e32 = 3410
    0, // V_MOVRELD_B32_e64 = 3411
    0, // V_MOVRELD_B32_sdwa = 3412
    0, // V_MOVRELSD_B32_e32 = 3413
    0, // V_MOVRELSD_B32_e64 = 3414
    0, // V_MOVRELSD_B32_sdwa = 3415
    0, // V_MOVRELS_B32_e32 = 3416
    0, // V_MOVRELS_B32_e64 = 3417
    0, // V_MOVRELS_B32_sdwa = 3418
    0, // V_MOV_B32_dpp = 3419
    0, // V_MOV_B32_e32 = 3420
    0, // V_MOV_B32_e64 = 3421
    Feature_isVI | 0, // V_MOV_B32_indirect = 3422
    0, // V_MOV_B32_sdwa = 3423
    Feature_isGCN | 0, // V_MOV_B64_PSEUDO = 3424
    0, // V_MOV_FED_B32_dpp = 3425
    0, // V_MOV_FED_B32_e32 = 3426
    0, // V_MOV_FED_B32_e64 = 3427
    0, // V_MOV_FED_B32_sdwa = 3428
    0, // V_MQSAD_PK_U16_U8 = 3429
    0, // V_MQSAD_U32_U8 = 3430
    0, // V_MSAD_U8 = 3431
    Feature_isSICI | 0, // V_MULLIT_F32 = 3432
    0, // V_MUL_F16_dpp = 3433
    0, // V_MUL_F16_e32 = 3434
    0, // V_MUL_F16_e64 = 3435
    0, // V_MUL_F16_sdwa = 3436
    Feature_isGCN | 0, // V_MUL_F32_dpp = 3437
    Feature_isGCN | 0, // V_MUL_F32_e32 = 3438
    Feature_isGCN | 0, // V_MUL_F32_e64 = 3439
    Feature_isGCN | 0, // V_MUL_F32_sdwa = 3440
    0, // V_MUL_F64 = 3441
    0, // V_MUL_HI_I32 = 3442
    Feature_isGCN | 0, // V_MUL_HI_I32_I24_dpp = 3443
    Feature_isGCN | 0, // V_MUL_HI_I32_I24_e32 = 3444
    Feature_isGCN | 0, // V_MUL_HI_I32_I24_e64 = 3445
    Feature_isGCN | 0, // V_MUL_HI_I32_I24_sdwa = 3446
    0, // V_MUL_HI_U32 = 3447
    Feature_isGCN | 0, // V_MUL_HI_U32_U24_dpp = 3448
    Feature_isGCN | 0, // V_MUL_HI_U32_U24_e32 = 3449
    Feature_isGCN | 0, // V_MUL_HI_U32_U24_e64 = 3450
    Feature_isGCN | 0, // V_MUL_HI_U32_U24_sdwa = 3451
    Feature_isGCN | 0, // V_MUL_I32_I24_dpp = 3452
    Feature_isGCN | 0, // V_MUL_I32_I24_e32 = 3453
    Feature_isGCN | 0, // V_MUL_I32_I24_e64 = 3454
    Feature_isGCN | 0, // V_MUL_I32_I24_sdwa = 3455
    Feature_isGCN | 0, // V_MUL_LEGACY_F32_dpp = 3456
    Feature_isGCN | 0, // V_MUL_LEGACY_F32_e32 = 3457
    Feature_isGCN | 0, // V_MUL_LEGACY_F32_e64 = 3458
    Feature_isGCN | 0, // V_MUL_LEGACY_F32_sdwa = 3459
    0, // V_MUL_LO_I32 = 3460
    0, // V_MUL_LO_U16_dpp = 3461
    0, // V_MUL_LO_U16_e32 = 3462
    0, // V_MUL_LO_U16_e64 = 3463
    0, // V_MUL_LO_U16_sdwa = 3464
    0, // V_MUL_LO_U32 = 3465
    Feature_isGCN | 0, // V_MUL_U32_U24_dpp = 3466
    Feature_isGCN | 0, // V_MUL_U32_U24_e32 = 3467
    Feature_isGCN | 0, // V_MUL_U32_U24_e64 = 3468
    Feature_isGCN | 0, // V_MUL_U32_U24_sdwa = 3469
    0, // V_NOP_e32 = 3470
    0, // V_NOP_e64 = 3471
    0, // V_NOP_sdwa = 3472
    0, // V_NOT_B32_dpp = 3473
    0, // V_NOT_B32_e32 = 3474
    0, // V_NOT_B32_e64 = 3475
    0, // V_NOT_B32_sdwa = 3476
    0, // V_OR3_B32 = 3477
    Feature_isGCN | 0, // V_OR_B32_dpp = 3478
    Feature_isGCN | 0, // V_OR_B32_e32 = 3479
    Feature_isGCN | 0, // V_OR_B32_e64 = 3480
    Feature_isGCN | 0, // V_OR_B32_sdwa = 3481
    0, // V_PACK_B32_F16 = 3482
    0, // V_PERM_B32 = 3483
    0, // V_PK_ADD_F16 = 3484
    0, // V_PK_ADD_I16 = 3485
    0, // V_PK_ADD_U16 = 3486
    0, // V_PK_ASHRREV_I16 = 3487
    0, // V_PK_FMA_F16 = 3488
    0, // V_PK_LSHLREV_B16 = 3489
    0, // V_PK_LSHRREV_B16 = 3490
    0, // V_PK_MAD_I16 = 3491
    0, // V_PK_MAD_U16 = 3492
    0, // V_PK_MAX_F16 = 3493
    0, // V_PK_MAX_I16 = 3494
    0, // V_PK_MAX_U16 = 3495
    0, // V_PK_MIN_F16 = 3496
    0, // V_PK_MIN_I16 = 3497
    0, // V_PK_MIN_U16 = 3498
    0, // V_PK_MUL_F16 = 3499
    0, // V_PK_MUL_LO_U16 = 3500
    0, // V_PK_SUB_I16 = 3501
    0, // V_PK_SUB_U16 = 3502
    0, // V_QSAD_PK_U16_U8 = 3503
    0, // V_RCP_CLAMP_F32_dpp = 3504
    0, // V_RCP_CLAMP_F32_e32 = 3505
    0, // V_RCP_CLAMP_F32_e64 = 3506
    0, // V_RCP_CLAMP_F32_sdwa = 3507
    0, // V_RCP_CLAMP_F64_e32 = 3508
    0, // V_RCP_CLAMP_F64_e64 = 3509
    0, // V_RCP_CLAMP_F64_sdwa = 3510
    0, // V_RCP_F16_dpp = 3511
    0, // V_RCP_F16_e32 = 3512
    0, // V_RCP_F16_e64 = 3513
    0, // V_RCP_F16_sdwa = 3514
    0, // V_RCP_F32_dpp = 3515
    0, // V_RCP_F32_e32 = 3516
    0, // V_RCP_F32_e64 = 3517
    0, // V_RCP_F32_sdwa = 3518
    0, // V_RCP_F64_e32 = 3519
    0, // V_RCP_F64_e64 = 3520
    0, // V_RCP_F64_sdwa = 3521
    0, // V_RCP_IFLAG_F32_dpp = 3522
    0, // V_RCP_IFLAG_F32_e32 = 3523
    0, // V_RCP_IFLAG_F32_e64 = 3524
    0, // V_RCP_IFLAG_F32_sdwa = 3525
    0, // V_RCP_LEGACY_F32_dpp = 3526
    0, // V_RCP_LEGACY_F32_e32 = 3527
    0, // V_RCP_LEGACY_F32_e64 = 3528
    0, // V_RCP_LEGACY_F32_sdwa = 3529
    Feature_isGCN | 0, // V_READLANE_B32 = 3530
    0, // V_RNDNE_F16_dpp = 3531
    0, // V_RNDNE_F16_e32 = 3532
    0, // V_RNDNE_F16_e64 = 3533
    0, // V_RNDNE_F16_sdwa = 3534
    0, // V_RNDNE_F32_dpp = 3535
    0, // V_RNDNE_F32_e32 = 3536
    0, // V_RNDNE_F32_e64 = 3537
    0, // V_RNDNE_F32_sdwa = 3538
    0, // V_RNDNE_F64_e32 = 3539
    0, // V_RNDNE_F64_e64 = 3540
    0, // V_RNDNE_F64_sdwa = 3541
    0, // V_RSQ_CLAMP_F32_dpp = 3542
    0, // V_RSQ_CLAMP_F32_e32 = 3543
    0, // V_RSQ_CLAMP_F32_e64 = 3544
    0, // V_RSQ_CLAMP_F32_sdwa = 3545
    0, // V_RSQ_CLAMP_F64_e32 = 3546
    0, // V_RSQ_CLAMP_F64_e64 = 3547
    0, // V_RSQ_CLAMP_F64_sdwa = 3548
    0, // V_RSQ_F16_dpp = 3549
    0, // V_RSQ_F16_e32 = 3550
    0, // V_RSQ_F16_e64 = 3551
    0, // V_RSQ_F16_sdwa = 3552
    0, // V_RSQ_F32_dpp = 3553
    0, // V_RSQ_F32_e32 = 3554
    0, // V_RSQ_F32_e64 = 3555
    0, // V_RSQ_F32_sdwa = 3556
    0, // V_RSQ_F64_e32 = 3557
    0, // V_RSQ_F64_e64 = 3558
    0, // V_RSQ_F64_sdwa = 3559
    0, // V_RSQ_LEGACY_F32_dpp = 3560
    0, // V_RSQ_LEGACY_F32_e32 = 3561
    0, // V_RSQ_LEGACY_F32_e64 = 3562
    0, // V_RSQ_LEGACY_F32_sdwa = 3563
    0, // V_SAD_HI_U8 = 3564
    0, // V_SAD_U16 = 3565
    0, // V_SAD_U32 = 3566
    0, // V_SAD_U8 = 3567
    0, // V_SAT_PK_U8_I16_dpp = 3568
    0, // V_SAT_PK_U8_I16_e32 = 3569
    0, // V_SAT_PK_U8_I16_e64 = 3570
    0, // V_SAT_PK_U8_I16_sdwa = 3571
    0, // V_SCREEN_PARTITION_4SE_B32_dpp = 3572
    0, // V_SCREEN_PARTITION_4SE_B32_e32 = 3573
    0, // V_SCREEN_PARTITION_4SE_B32_e64 = 3574
    0, // V_SCREEN_PARTITION_4SE_B32_sdwa = 3575
    Feature_isGCN | 0, // V_SET_INACTIVE_B32 = 3576
    Feature_isGCN | 0, // V_SET_INACTIVE_B64 = 3577
    0, // V_SIN_F16_dpp = 3578
    0, // V_SIN_F16_e32 = 3579
    0, // V_SIN_F16_e64 = 3580
    0, // V_SIN_F16_sdwa = 3581
    0, // V_SIN_F32_dpp = 3582
    0, // V_SIN_F32_e32 = 3583
    0, // V_SIN_F32_e64 = 3584
    0, // V_SIN_F32_sdwa = 3585
    0, // V_SQRT_F16_dpp = 3586
    0, // V_SQRT_F16_e32 = 3587
    0, // V_SQRT_F16_e64 = 3588
    0, // V_SQRT_F16_sdwa = 3589
    0, // V_SQRT_F32_dpp = 3590
    0, // V_SQRT_F32_e32 = 3591
    0, // V_SQRT_F32_e64 = 3592
    0, // V_SQRT_F32_sdwa = 3593
    0, // V_SQRT_F64_e32 = 3594
    0, // V_SQRT_F64_e64 = 3595
    0, // V_SQRT_F64_sdwa = 3596
    Feature_isGCN | 0, // V_SUBBREV_U32_dpp = 3597
    Feature_isGCN | 0, // V_SUBBREV_U32_e32 = 3598
    Feature_isGCN | 0, // V_SUBBREV_U32_e64 = 3599
    Feature_isGCN | 0, // V_SUBBREV_U32_sdwa = 3600
    Feature_isGCN | 0, // V_SUBB_U32_dpp = 3601
    Feature_isGCN | 0, // V_SUBB_U32_e32 = 3602
    Feature_isGCN | 0, // V_SUBB_U32_e64 = 3603
    Feature_isGCN | 0, // V_SUBB_U32_sdwa = 3604
    0, // V_SUBREV_F16_dpp = 3605
    0, // V_SUBREV_F16_e32 = 3606
    0, // V_SUBREV_F16_e64 = 3607
    0, // V_SUBREV_F16_sdwa = 3608
    Feature_isGCN | 0, // V_SUBREV_F32_dpp = 3609
    Feature_isGCN | 0, // V_SUBREV_F32_e32 = 3610
    Feature_isGCN | 0, // V_SUBREV_F32_e64 = 3611
    Feature_isGCN | 0, // V_SUBREV_F32_sdwa = 3612
    Feature_isGCN | 0, // V_SUBREV_I32_dpp = 3613
    Feature_isGCN | 0, // V_SUBREV_I32_e32 = 3614
    Feature_isGCN | 0, // V_SUBREV_I32_e64 = 3615
    Feature_isGCN | 0, // V_SUBREV_I32_sdwa = 3616
    0, // V_SUBREV_U16_dpp = 3617
    0, // V_SUBREV_U16_e32 = 3618
    0, // V_SUBREV_U16_e64 = 3619
    0, // V_SUBREV_U16_sdwa = 3620
    Feature_isGCN | 0, // V_SUBREV_U32_dpp = 3621
    Feature_isGCN | 0, // V_SUBREV_U32_e32 = 3622
    Feature_isGCN | 0, // V_SUBREV_U32_e64 = 3623
    Feature_isGCN | 0, // V_SUBREV_U32_sdwa = 3624
    0, // V_SUB_F16_dpp = 3625
    0, // V_SUB_F16_e32 = 3626
    0, // V_SUB_F16_e64 = 3627
    0, // V_SUB_F16_sdwa = 3628
    Feature_isGCN | 0, // V_SUB_F32_dpp = 3629
    Feature_isGCN | 0, // V_SUB_F32_e32 = 3630
    Feature_isGCN | 0, // V_SUB_F32_e64 = 3631
    Feature_isGCN | 0, // V_SUB_F32_sdwa = 3632
    0, // V_SUB_I16 = 3633
    Feature_isGCN | 0, // V_SUB_I32_dpp = 3634
    Feature_isGCN | 0, // V_SUB_I32_e32 = 3635
    Feature_isGCN | 0, // V_SUB_I32_e64 = 3636
    0, // V_SUB_I32_gfx9 = 3637
    Feature_isGCN | 0, // V_SUB_I32_sdwa = 3638
    0, // V_SUB_U16_dpp = 3639
    0, // V_SUB_U16_e32 = 3640
    0, // V_SUB_U16_e64 = 3641
    0, // V_SUB_U16_sdwa = 3642
    Feature_isGCN | 0, // V_SUB_U32_dpp = 3643
    Feature_isGCN | 0, // V_SUB_U32_e32 = 3644
    Feature_isGCN | 0, // V_SUB_U32_e64 = 3645
    Feature_isGCN | 0, // V_SUB_U32_sdwa = 3646
    0, // V_SWAP_B32 = 3647
    0, // V_TRIG_PREOP_F64 = 3648
    0, // V_TRUNC_F16_dpp = 3649
    0, // V_TRUNC_F16_e32 = 3650
    0, // V_TRUNC_F16_e64 = 3651
    0, // V_TRUNC_F16_sdwa = 3652
    0, // V_TRUNC_F32_dpp = 3653
    0, // V_TRUNC_F32_e32 = 3654
    0, // V_TRUNC_F32_e64 = 3655
    0, // V_TRUNC_F32_sdwa = 3656
    0, // V_TRUNC_F64_e32 = 3657
    0, // V_TRUNC_F64_e64 = 3658
    0, // V_TRUNC_F64_sdwa = 3659
    Feature_isGCN | 0, // V_WRITELANE_B32 = 3660
    0, // V_XAD_U32 = 3661
    0, // V_XNOR_B32_dpp = 3662
    0, // V_XNOR_B32_e32 = 3663
    0, // V_XNOR_B32_e64 = 3664
    0, // V_XNOR_B32_sdwa = 3665
    Feature_isGCN | 0, // V_XOR_B32_dpp = 3666
    Feature_isGCN | 0, // V_XOR_B32_e32 = 3667
    Feature_isGCN | 0, // V_XOR_B32_e64 = 3668
    Feature_isGCN | 0, // V_XOR_B32_sdwa = 3669
    Feature_isGCN | 0, // WAVE_BARRIER = 3670
    Feature_isGCN | 0, // WQM = 3671
    Feature_isGCN | 0, // WWM = 3672
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_ADDR64_RTN_si = 3673
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_ADDR64_si = 3674
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_BOTHEN_RTN_si = 3675
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_BOTHEN_RTN_vi = 3676
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_BOTHEN_si = 3677
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_BOTHEN_vi = 3678
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_IDXEN_RTN_si = 3679
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_IDXEN_RTN_vi = 3680
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_IDXEN_si = 3681
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_IDXEN_vi = 3682
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_OFFEN_RTN_si = 3683
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_OFFEN_RTN_vi = 3684
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_OFFEN_si = 3685
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_OFFEN_vi = 3686
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_OFFSET_RTN_si = 3687
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_OFFSET_RTN_vi = 3688
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_OFFSET_si = 3689
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_OFFSET_vi = 3690
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_X2_ADDR64_RTN_si = 3691
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_X2_ADDR64_si = 3692
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_X2_BOTHEN_RTN_si = 3693
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_X2_BOTHEN_RTN_vi = 3694
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_X2_BOTHEN_si = 3695
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_X2_BOTHEN_vi = 3696
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_X2_IDXEN_RTN_si = 3697
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_X2_IDXEN_RTN_vi = 3698
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_X2_IDXEN_si = 3699
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_X2_IDXEN_vi = 3700
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_X2_OFFEN_RTN_si = 3701
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_X2_OFFEN_RTN_vi = 3702
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_X2_OFFEN_si = 3703
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_X2_OFFEN_vi = 3704
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_X2_OFFSET_RTN_si = 3705
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_X2_OFFSET_RTN_vi = 3706
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_ADD_X2_OFFSET_si = 3707
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_ADD_X2_OFFSET_vi = 3708
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_ADDR64_RTN_si = 3709
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_ADDR64_si = 3710
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_BOTHEN_RTN_si = 3711
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_BOTHEN_RTN_vi = 3712
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_BOTHEN_si = 3713
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_BOTHEN_vi = 3714
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_IDXEN_RTN_si = 3715
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_IDXEN_RTN_vi = 3716
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_IDXEN_si = 3717
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_IDXEN_vi = 3718
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_OFFEN_RTN_si = 3719
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_OFFEN_RTN_vi = 3720
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_OFFEN_si = 3721
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_OFFEN_vi = 3722
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_OFFSET_RTN_si = 3723
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_OFFSET_RTN_vi = 3724
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_OFFSET_si = 3725
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_OFFSET_vi = 3726
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_X2_ADDR64_RTN_si = 3727
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_X2_ADDR64_si = 3728
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_X2_BOTHEN_RTN_si = 3729
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_X2_BOTHEN_RTN_vi = 3730
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_X2_BOTHEN_si = 3731
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_X2_BOTHEN_vi = 3732
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_X2_IDXEN_RTN_si = 3733
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_X2_IDXEN_RTN_vi = 3734
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_X2_IDXEN_si = 3735
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_X2_IDXEN_vi = 3736
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_X2_OFFEN_RTN_si = 3737
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_X2_OFFEN_RTN_vi = 3738
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_X2_OFFEN_si = 3739
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_X2_OFFEN_vi = 3740
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_X2_OFFSET_RTN_si = 3741
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_X2_OFFSET_RTN_vi = 3742
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_AND_X2_OFFSET_si = 3743
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_AND_X2_OFFSET_vi = 3744
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_ADDR64_RTN_si = 3745
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_ADDR64_si = 3746
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_BOTHEN_RTN_si = 3747
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_BOTHEN_RTN_vi = 3748
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_BOTHEN_si = 3749
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_BOTHEN_vi = 3750
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_IDXEN_RTN_si = 3751
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_IDXEN_RTN_vi = 3752
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_IDXEN_si = 3753
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_IDXEN_vi = 3754
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_OFFEN_RTN_si = 3755
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_OFFEN_RTN_vi = 3756
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_OFFEN_si = 3757
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_OFFEN_vi = 3758
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_OFFSET_RTN_si = 3759
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_OFFSET_RTN_vi = 3760
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_OFFSET_si = 3761
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_OFFSET_vi = 3762
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_ADDR64_RTN_si = 3763
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_ADDR64_si = 3764
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN_RTN_si = 3765
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN_RTN_vi = 3766
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN_si = 3767
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_BOTHEN_vi = 3768
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_RTN_si = 3769
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_RTN_vi = 3770
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_si = 3771
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_IDXEN_vi = 3772
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_RTN_si = 3773
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_RTN_vi = 3774
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_si = 3775
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_OFFEN_vi = 3776
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_OFFSET_RTN_si = 3777
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_OFFSET_RTN_vi = 3778
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_OFFSET_si = 3779
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_CMPSWAP_X2_OFFSET_vi = 3780
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_ADDR64_RTN_si = 3781
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_ADDR64_si = 3782
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_BOTHEN_RTN_si = 3783
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_BOTHEN_RTN_vi = 3784
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_BOTHEN_si = 3785
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_BOTHEN_vi = 3786
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_IDXEN_RTN_si = 3787
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_IDXEN_RTN_vi = 3788
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_IDXEN_si = 3789
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_IDXEN_vi = 3790
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_OFFEN_RTN_si = 3791
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_OFFEN_RTN_vi = 3792
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_OFFEN_si = 3793
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_OFFEN_vi = 3794
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_OFFSET_RTN_si = 3795
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_OFFSET_RTN_vi = 3796
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_OFFSET_si = 3797
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_OFFSET_vi = 3798
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_X2_ADDR64_RTN_si = 3799
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_X2_ADDR64_si = 3800
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_X2_BOTHEN_RTN_si = 3801
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_X2_BOTHEN_RTN_vi = 3802
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_X2_BOTHEN_si = 3803
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_X2_BOTHEN_vi = 3804
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_X2_IDXEN_RTN_si = 3805
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_X2_IDXEN_RTN_vi = 3806
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_X2_IDXEN_si = 3807
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_X2_IDXEN_vi = 3808
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_X2_OFFEN_RTN_si = 3809
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_X2_OFFEN_RTN_vi = 3810
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_X2_OFFEN_si = 3811
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_X2_OFFEN_vi = 3812
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_X2_OFFSET_RTN_si = 3813
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_X2_OFFSET_RTN_vi = 3814
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_DEC_X2_OFFSET_si = 3815
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_DEC_X2_OFFSET_vi = 3816
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_ADDR64_RTN_si = 3817
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_ADDR64_si = 3818
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_BOTHEN_RTN_si = 3819
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_BOTHEN_RTN_vi = 3820
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_BOTHEN_si = 3821
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_BOTHEN_vi = 3822
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_IDXEN_RTN_si = 3823
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_IDXEN_RTN_vi = 3824
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_IDXEN_si = 3825
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_IDXEN_vi = 3826
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_OFFEN_RTN_si = 3827
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_OFFEN_RTN_vi = 3828
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_OFFEN_si = 3829
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_OFFEN_vi = 3830
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_OFFSET_RTN_si = 3831
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_OFFSET_RTN_vi = 3832
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_OFFSET_si = 3833
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_OFFSET_vi = 3834
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_X2_ADDR64_RTN_si = 3835
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_X2_ADDR64_si = 3836
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_X2_BOTHEN_RTN_si = 3837
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_X2_BOTHEN_RTN_vi = 3838
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_X2_BOTHEN_si = 3839
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_X2_BOTHEN_vi = 3840
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_X2_IDXEN_RTN_si = 3841
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_X2_IDXEN_RTN_vi = 3842
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_X2_IDXEN_si = 3843
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_X2_IDXEN_vi = 3844
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_X2_OFFEN_RTN_si = 3845
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_X2_OFFEN_RTN_vi = 3846
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_X2_OFFEN_si = 3847
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_X2_OFFEN_vi = 3848
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_X2_OFFSET_RTN_si = 3849
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_X2_OFFSET_RTN_vi = 3850
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_INC_X2_OFFSET_si = 3851
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_INC_X2_OFFSET_vi = 3852
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_ADDR64_RTN_si = 3853
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_ADDR64_si = 3854
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_BOTHEN_RTN_si = 3855
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_BOTHEN_RTN_vi = 3856
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_BOTHEN_si = 3857
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_BOTHEN_vi = 3858
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_IDXEN_RTN_si = 3859
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_IDXEN_RTN_vi = 3860
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_IDXEN_si = 3861
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_IDXEN_vi = 3862
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_OFFEN_RTN_si = 3863
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_OFFEN_RTN_vi = 3864
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_OFFEN_si = 3865
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_OFFEN_vi = 3866
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_OFFSET_RTN_si = 3867
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_OFFSET_RTN_vi = 3868
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_OFFSET_si = 3869
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_OFFSET_vi = 3870
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_X2_ADDR64_RTN_si = 3871
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_X2_ADDR64_si = 3872
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_X2_BOTHEN_RTN_si = 3873
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_X2_BOTHEN_RTN_vi = 3874
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_X2_BOTHEN_si = 3875
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_X2_BOTHEN_vi = 3876
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_X2_IDXEN_RTN_si = 3877
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_X2_IDXEN_RTN_vi = 3878
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_X2_IDXEN_si = 3879
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_X2_IDXEN_vi = 3880
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_X2_OFFEN_RTN_si = 3881
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_X2_OFFEN_RTN_vi = 3882
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_X2_OFFEN_si = 3883
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_X2_OFFEN_vi = 3884
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_X2_OFFSET_RTN_si = 3885
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_X2_OFFSET_RTN_vi = 3886
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_OR_X2_OFFSET_si = 3887
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_OR_X2_OFFSET_vi = 3888
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_ADDR64_RTN_si = 3889
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_ADDR64_si = 3890
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_BOTHEN_RTN_si = 3891
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_BOTHEN_RTN_vi = 3892
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_BOTHEN_si = 3893
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_BOTHEN_vi = 3894
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_IDXEN_RTN_si = 3895
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_IDXEN_RTN_vi = 3896
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_IDXEN_si = 3897
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_IDXEN_vi = 3898
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_OFFEN_RTN_si = 3899
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_OFFEN_RTN_vi = 3900
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_OFFEN_si = 3901
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_OFFEN_vi = 3902
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_OFFSET_RTN_si = 3903
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_OFFSET_RTN_vi = 3904
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_OFFSET_si = 3905
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_OFFSET_vi = 3906
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_X2_ADDR64_RTN_si = 3907
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_X2_ADDR64_si = 3908
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_X2_BOTHEN_RTN_si = 3909
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_X2_BOTHEN_RTN_vi = 3910
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_X2_BOTHEN_si = 3911
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_X2_BOTHEN_vi = 3912
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_X2_IDXEN_RTN_si = 3913
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_X2_IDXEN_RTN_vi = 3914
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_X2_IDXEN_si = 3915
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_X2_IDXEN_vi = 3916
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_X2_OFFEN_RTN_si = 3917
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_X2_OFFEN_RTN_vi = 3918
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_X2_OFFEN_si = 3919
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_X2_OFFEN_vi = 3920
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_X2_OFFSET_RTN_si = 3921
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_X2_OFFSET_RTN_vi = 3922
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMAX_X2_OFFSET_si = 3923
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMAX_X2_OFFSET_vi = 3924
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_ADDR64_RTN_si = 3925
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_ADDR64_si = 3926
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_BOTHEN_RTN_si = 3927
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_BOTHEN_RTN_vi = 3928
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_BOTHEN_si = 3929
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_BOTHEN_vi = 3930
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_IDXEN_RTN_si = 3931
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_IDXEN_RTN_vi = 3932
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_IDXEN_si = 3933
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_IDXEN_vi = 3934
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_OFFEN_RTN_si = 3935
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_OFFEN_RTN_vi = 3936
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_OFFEN_si = 3937
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_OFFEN_vi = 3938
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_OFFSET_RTN_si = 3939
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_OFFSET_RTN_vi = 3940
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_OFFSET_si = 3941
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_OFFSET_vi = 3942
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_X2_ADDR64_RTN_si = 3943
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_X2_ADDR64_si = 3944
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_X2_BOTHEN_RTN_si = 3945
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_X2_BOTHEN_RTN_vi = 3946
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_X2_BOTHEN_si = 3947
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_X2_BOTHEN_vi = 3948
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_X2_IDXEN_RTN_si = 3949
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_X2_IDXEN_RTN_vi = 3950
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_X2_IDXEN_si = 3951
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_X2_IDXEN_vi = 3952
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_X2_OFFEN_RTN_si = 3953
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_X2_OFFEN_RTN_vi = 3954
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_X2_OFFEN_si = 3955
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_X2_OFFEN_vi = 3956
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_X2_OFFSET_RTN_si = 3957
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_X2_OFFSET_RTN_vi = 3958
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SMIN_X2_OFFSET_si = 3959
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SMIN_X2_OFFSET_vi = 3960
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_ADDR64_RTN_si = 3961
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_ADDR64_si = 3962
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_BOTHEN_RTN_si = 3963
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_BOTHEN_RTN_vi = 3964
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_BOTHEN_si = 3965
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_BOTHEN_vi = 3966
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_IDXEN_RTN_si = 3967
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_IDXEN_RTN_vi = 3968
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_IDXEN_si = 3969
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_IDXEN_vi = 3970
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_OFFEN_RTN_si = 3971
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_OFFEN_RTN_vi = 3972
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_OFFEN_si = 3973
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_OFFEN_vi = 3974
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_OFFSET_RTN_si = 3975
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_OFFSET_RTN_vi = 3976
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_OFFSET_si = 3977
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_OFFSET_vi = 3978
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_X2_ADDR64_RTN_si = 3979
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_X2_ADDR64_si = 3980
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_X2_BOTHEN_RTN_si = 3981
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_X2_BOTHEN_RTN_vi = 3982
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_X2_BOTHEN_si = 3983
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_X2_BOTHEN_vi = 3984
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_X2_IDXEN_RTN_si = 3985
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_X2_IDXEN_RTN_vi = 3986
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_X2_IDXEN_si = 3987
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_X2_IDXEN_vi = 3988
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_X2_OFFEN_RTN_si = 3989
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_X2_OFFEN_RTN_vi = 3990
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_X2_OFFEN_si = 3991
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_X2_OFFEN_vi = 3992
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_X2_OFFSET_RTN_si = 3993
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_X2_OFFSET_RTN_vi = 3994
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SUB_X2_OFFSET_si = 3995
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SUB_X2_OFFSET_vi = 3996
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_ADDR64_RTN_si = 3997
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_ADDR64_si = 3998
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_BOTHEN_RTN_si = 3999
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_BOTHEN_RTN_vi = 4000
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_BOTHEN_si = 4001
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_BOTHEN_vi = 4002
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_IDXEN_RTN_si = 4003
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_IDXEN_RTN_vi = 4004
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_IDXEN_si = 4005
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_IDXEN_vi = 4006
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_OFFEN_RTN_si = 4007
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_OFFEN_RTN_vi = 4008
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_OFFEN_si = 4009
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_OFFEN_vi = 4010
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_OFFSET_RTN_si = 4011
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_OFFSET_RTN_vi = 4012
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_OFFSET_si = 4013
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_OFFSET_vi = 4014
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_X2_ADDR64_RTN_si = 4015
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_X2_ADDR64_si = 4016
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_X2_BOTHEN_RTN_si = 4017
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_X2_BOTHEN_RTN_vi = 4018
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_X2_BOTHEN_si = 4019
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_X2_BOTHEN_vi = 4020
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_X2_IDXEN_RTN_si = 4021
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_X2_IDXEN_RTN_vi = 4022
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_X2_IDXEN_si = 4023
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_X2_IDXEN_vi = 4024
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_X2_OFFEN_RTN_si = 4025
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_X2_OFFEN_RTN_vi = 4026
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_X2_OFFEN_si = 4027
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_X2_OFFEN_vi = 4028
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_X2_OFFSET_RTN_si = 4029
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_X2_OFFSET_RTN_vi = 4030
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_SWAP_X2_OFFSET_si = 4031
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_SWAP_X2_OFFSET_vi = 4032
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_ADDR64_RTN_si = 4033
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_ADDR64_si = 4034
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_BOTHEN_RTN_si = 4035
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_BOTHEN_RTN_vi = 4036
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_BOTHEN_si = 4037
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_BOTHEN_vi = 4038
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_IDXEN_RTN_si = 4039
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_IDXEN_RTN_vi = 4040
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_IDXEN_si = 4041
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_IDXEN_vi = 4042
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_OFFEN_RTN_si = 4043
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_OFFEN_RTN_vi = 4044
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_OFFEN_si = 4045
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_OFFEN_vi = 4046
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_OFFSET_RTN_si = 4047
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_OFFSET_RTN_vi = 4048
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_OFFSET_si = 4049
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_OFFSET_vi = 4050
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_X2_ADDR64_RTN_si = 4051
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_X2_ADDR64_si = 4052
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_X2_BOTHEN_RTN_si = 4053
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_X2_BOTHEN_RTN_vi = 4054
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_X2_BOTHEN_si = 4055
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_X2_BOTHEN_vi = 4056
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_X2_IDXEN_RTN_si = 4057
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_X2_IDXEN_RTN_vi = 4058
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_X2_IDXEN_si = 4059
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_X2_IDXEN_vi = 4060
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_X2_OFFEN_RTN_si = 4061
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_X2_OFFEN_RTN_vi = 4062
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_X2_OFFEN_si = 4063
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_X2_OFFEN_vi = 4064
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_X2_OFFSET_RTN_si = 4065
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_X2_OFFSET_RTN_vi = 4066
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMAX_X2_OFFSET_si = 4067
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMAX_X2_OFFSET_vi = 4068
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_ADDR64_RTN_si = 4069
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_ADDR64_si = 4070
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_BOTHEN_RTN_si = 4071
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_BOTHEN_RTN_vi = 4072
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_BOTHEN_si = 4073
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_BOTHEN_vi = 4074
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_IDXEN_RTN_si = 4075
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_IDXEN_RTN_vi = 4076
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_IDXEN_si = 4077
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_IDXEN_vi = 4078
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_OFFEN_RTN_si = 4079
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_OFFEN_RTN_vi = 4080
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_OFFEN_si = 4081
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_OFFEN_vi = 4082
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_OFFSET_RTN_si = 4083
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_OFFSET_RTN_vi = 4084
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_OFFSET_si = 4085
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_OFFSET_vi = 4086
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_X2_ADDR64_RTN_si = 4087
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_X2_ADDR64_si = 4088
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_X2_BOTHEN_RTN_si = 4089
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_X2_BOTHEN_RTN_vi = 4090
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_X2_BOTHEN_si = 4091
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_X2_BOTHEN_vi = 4092
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_X2_IDXEN_RTN_si = 4093
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_X2_IDXEN_RTN_vi = 4094
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_X2_IDXEN_si = 4095
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_X2_IDXEN_vi = 4096
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_X2_OFFEN_RTN_si = 4097
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_X2_OFFEN_RTN_vi = 4098
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_X2_OFFEN_si = 4099
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_X2_OFFEN_vi = 4100
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_X2_OFFSET_RTN_si = 4101
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_X2_OFFSET_RTN_vi = 4102
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_UMIN_X2_OFFSET_si = 4103
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_UMIN_X2_OFFSET_vi = 4104
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_ADDR64_RTN_si = 4105
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_ADDR64_si = 4106
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_BOTHEN_RTN_si = 4107
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_BOTHEN_RTN_vi = 4108
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_BOTHEN_si = 4109
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_BOTHEN_vi = 4110
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_IDXEN_RTN_si = 4111
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_IDXEN_RTN_vi = 4112
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_IDXEN_si = 4113
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_IDXEN_vi = 4114
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_OFFEN_RTN_si = 4115
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_OFFEN_RTN_vi = 4116
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_OFFEN_si = 4117
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_OFFEN_vi = 4118
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_OFFSET_RTN_si = 4119
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_OFFSET_RTN_vi = 4120
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_OFFSET_si = 4121
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_OFFSET_vi = 4122
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_X2_ADDR64_RTN_si = 4123
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_X2_ADDR64_si = 4124
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_X2_BOTHEN_RTN_si = 4125
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_X2_BOTHEN_RTN_vi = 4126
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_X2_BOTHEN_si = 4127
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_X2_BOTHEN_vi = 4128
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_X2_IDXEN_RTN_si = 4129
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_X2_IDXEN_RTN_vi = 4130
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_X2_IDXEN_si = 4131
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_X2_IDXEN_vi = 4132
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_X2_OFFEN_RTN_si = 4133
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_X2_OFFEN_RTN_vi = 4134
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_X2_OFFEN_si = 4135
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_X2_OFFEN_vi = 4136
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_X2_OFFSET_RTN_si = 4137
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_X2_OFFSET_RTN_vi = 4138
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_ATOMIC_XOR_X2_OFFSET_si = 4139
    Feature_isGCN | Feature_isVI | 0, // BUFFER_ATOMIC_XOR_X2_OFFSET_vi = 4140
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX2_ADDR64_si = 4141
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX2_BOTHEN_si = 4142
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_BOTHEN_vi = 4143
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX2_IDXEN_si = 4144
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_IDXEN_vi = 4145
    Feature_isVI | Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_LDS_BOTHEN_vi = 4146
    Feature_isVI | Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_LDS_IDXEN_vi = 4147
    Feature_isVI | Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_LDS_OFFEN_vi = 4148
    Feature_isVI | Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_LDS_OFFSET_vi = 4149
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX2_OFFEN_si = 4150
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_OFFEN_vi = 4151
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX2_OFFSET_si = 4152
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORDX2_OFFSET_vi = 4153
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX3_ADDR64_si = 4154
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX3_BOTHEN_si = 4155
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_BOTHEN_vi = 4156
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX3_IDXEN_si = 4157
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_IDXEN_vi = 4158
    Feature_isVI | Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_LDS_BOTHEN_vi = 4159
    Feature_isVI | Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_LDS_IDXEN_vi = 4160
    Feature_isVI | Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_LDS_OFFEN_vi = 4161
    Feature_isVI | Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_LDS_OFFSET_vi = 4162
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX3_OFFEN_si = 4163
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_OFFEN_vi = 4164
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX3_OFFSET_si = 4165
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORDX3_OFFSET_vi = 4166
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX4_ADDR64_si = 4167
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX4_BOTHEN_si = 4168
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_BOTHEN_vi = 4169
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX4_IDXEN_si = 4170
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_IDXEN_vi = 4171
    Feature_isVI | Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_LDS_BOTHEN_vi = 4172
    Feature_isVI | Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_LDS_IDXEN_vi = 4173
    Feature_isVI | Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_LDS_OFFEN_vi = 4174
    Feature_isVI | Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_LDS_OFFSET_vi = 4175
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX4_OFFEN_si = 4176
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_OFFEN_vi = 4177
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORDX4_OFFSET_si = 4178
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORDX4_OFFSET_vi = 4179
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORD_ADDR64_si = 4180
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORD_BOTHEN_si = 4181
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORD_BOTHEN_vi = 4182
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORD_IDXEN_si = 4183
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORD_IDXEN_vi = 4184
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORD_LDS_ADDR64_si = 4185
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORD_LDS_BOTHEN_si = 4186
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORD_LDS_BOTHEN_vi = 4187
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORD_LDS_IDXEN_si = 4188
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORD_LDS_IDXEN_vi = 4189
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORD_LDS_OFFEN_si = 4190
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORD_LDS_OFFEN_vi = 4191
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORD_LDS_OFFSET_si = 4192
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORD_LDS_OFFSET_vi = 4193
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORD_OFFEN_si = 4194
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORD_OFFEN_vi = 4195
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_DWORD_OFFSET_si = 4196
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_DWORD_OFFSET_vi = 4197
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_HI_X_BOTHEN_vi = 4198
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_HI_X_IDXEN_vi = 4199
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_HI_X_OFFEN_vi = 4200
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_HI_X_OFFSET_vi = 4201
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN_vi = 4202
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_IDXEN_vi = 4203
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_OFFEN_vi = 4204
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_OFFSET_vi = 4205
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80 = 4206
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_IDXEN_gfx80 = 4207
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFEN_gfx80 = 4208
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80 = 4209
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN_vi = 4210
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_IDXEN_vi = 4211
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_OFFEN_vi = 4212
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_OFFSET_vi = 4213
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_BOTHEN_gfx80 = 4214
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_IDXEN_gfx80 = 4215
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFEN_gfx80 = 4216
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFSET_gfx80 = 4217
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_XY_BOTHEN_vi = 4218
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_XY_IDXEN_vi = 4219
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_XY_OFFEN_vi = 4220
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_XY_OFFSET_vi = 4221
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_gfx80_BOTHEN_gfx80 = 4222
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_gfx80_IDXEN_gfx80 = 4223
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFEN_gfx80 = 4224
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFSET_gfx80 = 4225
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_X_BOTHEN_vi = 4226
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_X_IDXEN_vi = 4227
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_X_OFFEN_vi = 4228
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_D16_X_OFFSET_vi = 4229
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_gfx80_BOTHEN_gfx80 = 4230
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_gfx80_IDXEN_gfx80 = 4231
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_gfx80_OFFEN_gfx80 = 4232
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_LOAD_FORMAT_D16_X_gfx80_OFFSET_gfx80 = 4233
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XYZW_ADDR64_si = 4234
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XYZW_BOTHEN_si = 4235
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_XYZW_BOTHEN_vi = 4236
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XYZW_IDXEN_si = 4237
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_XYZW_IDXEN_vi = 4238
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XYZW_OFFEN_si = 4239
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_XYZW_OFFEN_vi = 4240
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XYZW_OFFSET_si = 4241
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_XYZW_OFFSET_vi = 4242
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XYZ_ADDR64_si = 4243
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XYZ_BOTHEN_si = 4244
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_XYZ_BOTHEN_vi = 4245
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XYZ_IDXEN_si = 4246
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_XYZ_IDXEN_vi = 4247
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XYZ_OFFEN_si = 4248
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_XYZ_OFFEN_vi = 4249
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XYZ_OFFSET_si = 4250
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_XYZ_OFFSET_vi = 4251
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XY_ADDR64_si = 4252
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XY_BOTHEN_si = 4253
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_XY_BOTHEN_vi = 4254
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XY_IDXEN_si = 4255
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_XY_IDXEN_vi = 4256
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XY_OFFEN_si = 4257
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_XY_OFFEN_vi = 4258
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_XY_OFFSET_si = 4259
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_XY_OFFSET_vi = 4260
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_X_ADDR64_si = 4261
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_X_BOTHEN_si = 4262
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_X_BOTHEN_vi = 4263
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_X_IDXEN_si = 4264
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_X_IDXEN_vi = 4265
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_X_LDS_ADDR64_si = 4266
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_X_LDS_BOTHEN_si = 4267
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_X_LDS_BOTHEN_vi = 4268
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_X_LDS_IDXEN_si = 4269
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_X_LDS_IDXEN_vi = 4270
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_X_LDS_OFFEN_si = 4271
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_X_LDS_OFFEN_vi = 4272
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_X_LDS_OFFSET_si = 4273
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_X_LDS_OFFSET_vi = 4274
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_X_OFFEN_si = 4275
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_X_OFFEN_vi = 4276
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_FORMAT_X_OFFSET_si = 4277
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_FORMAT_X_OFFSET_vi = 4278
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SBYTE_ADDR64_si = 4279
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SBYTE_BOTHEN_si = 4280
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_BOTHEN_vi = 4281
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_D16_BOTHEN_vi = 4282
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_D16_HI_BOTHEN_vi = 4283
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_D16_HI_IDXEN_vi = 4284
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_D16_HI_OFFEN_vi = 4285
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_D16_HI_OFFSET_vi = 4286
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_D16_IDXEN_vi = 4287
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_D16_OFFEN_vi = 4288
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_D16_OFFSET_vi = 4289
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SBYTE_IDXEN_si = 4290
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_IDXEN_vi = 4291
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SBYTE_LDS_ADDR64_si = 4292
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SBYTE_LDS_BOTHEN_si = 4293
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_LDS_BOTHEN_vi = 4294
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SBYTE_LDS_IDXEN_si = 4295
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_LDS_IDXEN_vi = 4296
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SBYTE_LDS_OFFEN_si = 4297
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_LDS_OFFEN_vi = 4298
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SBYTE_LDS_OFFSET_si = 4299
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_LDS_OFFSET_vi = 4300
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SBYTE_OFFEN_si = 4301
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_OFFEN_vi = 4302
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SBYTE_OFFSET_si = 4303
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SBYTE_OFFSET_vi = 4304
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SHORT_D16_BOTHEN_vi = 4305
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SHORT_D16_HI_BOTHEN_vi = 4306
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SHORT_D16_HI_IDXEN_vi = 4307
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SHORT_D16_HI_OFFEN_vi = 4308
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SHORT_D16_HI_OFFSET_vi = 4309
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SHORT_D16_IDXEN_vi = 4310
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SHORT_D16_OFFEN_vi = 4311
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_SHORT_D16_OFFSET_vi = 4312
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SSHORT_ADDR64_si = 4313
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SSHORT_BOTHEN_si = 4314
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SSHORT_BOTHEN_vi = 4315
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SSHORT_IDXEN_si = 4316
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SSHORT_IDXEN_vi = 4317
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SSHORT_LDS_ADDR64_si = 4318
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SSHORT_LDS_BOTHEN_si = 4319
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SSHORT_LDS_BOTHEN_vi = 4320
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SSHORT_LDS_IDXEN_si = 4321
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SSHORT_LDS_IDXEN_vi = 4322
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SSHORT_LDS_OFFEN_si = 4323
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SSHORT_LDS_OFFEN_vi = 4324
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SSHORT_LDS_OFFSET_si = 4325
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SSHORT_LDS_OFFSET_vi = 4326
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SSHORT_OFFEN_si = 4327
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SSHORT_OFFEN_vi = 4328
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_SSHORT_OFFSET_si = 4329
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_SSHORT_OFFSET_vi = 4330
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_UBYTE_ADDR64_si = 4331
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_UBYTE_BOTHEN_si = 4332
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_BOTHEN_vi = 4333
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_D16_BOTHEN_vi = 4334
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_D16_HI_BOTHEN_vi = 4335
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_D16_HI_IDXEN_vi = 4336
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_D16_HI_OFFEN_vi = 4337
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_D16_HI_OFFSET_vi = 4338
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_D16_IDXEN_vi = 4339
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_D16_OFFEN_vi = 4340
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_D16_OFFSET_vi = 4341
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_UBYTE_IDXEN_si = 4342
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_IDXEN_vi = 4343
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_UBYTE_LDS_ADDR64_si = 4344
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_UBYTE_LDS_BOTHEN_si = 4345
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_LDS_BOTHEN_vi = 4346
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_UBYTE_LDS_IDXEN_si = 4347
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_LDS_IDXEN_vi = 4348
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_UBYTE_LDS_OFFEN_si = 4349
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_LDS_OFFEN_vi = 4350
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_UBYTE_LDS_OFFSET_si = 4351
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_LDS_OFFSET_vi = 4352
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_UBYTE_OFFEN_si = 4353
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_OFFEN_vi = 4354
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_UBYTE_OFFSET_si = 4355
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_UBYTE_OFFSET_vi = 4356
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_USHORT_ADDR64_si = 4357
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_USHORT_BOTHEN_si = 4358
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_USHORT_BOTHEN_vi = 4359
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_USHORT_IDXEN_si = 4360
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_USHORT_IDXEN_vi = 4361
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_USHORT_LDS_ADDR64_si = 4362
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_USHORT_LDS_BOTHEN_si = 4363
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_USHORT_LDS_BOTHEN_vi = 4364
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_USHORT_LDS_IDXEN_si = 4365
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_USHORT_LDS_IDXEN_vi = 4366
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_USHORT_LDS_OFFEN_si = 4367
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_USHORT_LDS_OFFEN_vi = 4368
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_USHORT_LDS_OFFSET_si = 4369
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_USHORT_LDS_OFFSET_vi = 4370
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_USHORT_OFFEN_si = 4371
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_USHORT_OFFEN_vi = 4372
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_LOAD_USHORT_OFFSET_si = 4373
    Feature_isGCN | Feature_isVI | 0, // BUFFER_LOAD_USHORT_OFFSET_vi = 4374
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_BYTE_ADDR64_si = 4375
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_BYTE_BOTHEN_si = 4376
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_BYTE_BOTHEN_vi = 4377
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_STORE_BYTE_D16_HI_BOTHEN_vi = 4378
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_STORE_BYTE_D16_HI_IDXEN_vi = 4379
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_STORE_BYTE_D16_HI_OFFEN_vi = 4380
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_STORE_BYTE_D16_HI_OFFSET_vi = 4381
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_BYTE_IDXEN_si = 4382
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_BYTE_IDXEN_vi = 4383
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_BYTE_OFFEN_si = 4384
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_BYTE_OFFEN_vi = 4385
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_BYTE_OFFSET_si = 4386
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_BYTE_OFFSET_vi = 4387
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX2_ADDR64_si = 4388
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX2_BOTHEN_si = 4389
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORDX2_BOTHEN_vi = 4390
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX2_IDXEN_si = 4391
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORDX2_IDXEN_vi = 4392
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX2_OFFEN_si = 4393
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORDX2_OFFEN_vi = 4394
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX2_OFFSET_si = 4395
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORDX2_OFFSET_vi = 4396
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX3_ADDR64_si = 4397
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX3_BOTHEN_si = 4398
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORDX3_BOTHEN_vi = 4399
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX3_IDXEN_si = 4400
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORDX3_IDXEN_vi = 4401
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX3_OFFEN_si = 4402
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORDX3_OFFEN_vi = 4403
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX3_OFFSET_si = 4404
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORDX3_OFFSET_vi = 4405
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX4_ADDR64_si = 4406
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX4_BOTHEN_si = 4407
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORDX4_BOTHEN_vi = 4408
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX4_IDXEN_si = 4409
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORDX4_IDXEN_vi = 4410
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX4_OFFEN_si = 4411
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORDX4_OFFEN_vi = 4412
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORDX4_OFFSET_si = 4413
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORDX4_OFFSET_vi = 4414
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORD_ADDR64_si = 4415
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORD_BOTHEN_si = 4416
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORD_BOTHEN_vi = 4417
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORD_IDXEN_si = 4418
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORD_IDXEN_vi = 4419
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORD_OFFEN_si = 4420
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORD_OFFEN_vi = 4421
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_DWORD_OFFSET_si = 4422
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_DWORD_OFFSET_vi = 4423
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_HI_X_BOTHEN_vi = 4424
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_HI_X_IDXEN_vi = 4425
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_HI_X_OFFEN_vi = 4426
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_HI_X_OFFSET_vi = 4427
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_XYZW_BOTHEN_vi = 4428
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_XYZW_IDXEN_vi = 4429
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_XYZW_OFFEN_vi = 4430
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_XYZW_OFFSET_vi = 4431
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80 = 4432
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_gfx80_IDXEN_gfx80 = 4433
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFEN_gfx80 = 4434
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80 = 4435
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_XYZ_BOTHEN_vi = 4436
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_XYZ_IDXEN_vi = 4437
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_XYZ_OFFEN_vi = 4438
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_XYZ_OFFSET_vi = 4439
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_gfx80_BOTHEN_gfx80 = 4440
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_gfx80_IDXEN_gfx80 = 4441
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFEN_gfx80 = 4442
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFSET_gfx80 = 4443
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_XY_BOTHEN_vi = 4444
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_XY_IDXEN_vi = 4445
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_XY_OFFEN_vi = 4446
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_XY_OFFSET_vi = 4447
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_gfx80_BOTHEN_gfx80 = 4448
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_gfx80_IDXEN_gfx80 = 4449
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_gfx80_OFFEN_gfx80 = 4450
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_XY_gfx80_OFFSET_gfx80 = 4451
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_X_BOTHEN_vi = 4452
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_X_IDXEN_vi = 4453
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_X_OFFEN_vi = 4454
    Feature_HasPackedD16VMem | Feature_isVI | 0, // BUFFER_STORE_FORMAT_D16_X_OFFSET_vi = 4455
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_gfx80_BOTHEN_gfx80 = 4456
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_gfx80_IDXEN_gfx80 = 4457
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_gfx80_OFFEN_gfx80 = 4458
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // BUFFER_STORE_FORMAT_D16_X_gfx80_OFFSET_gfx80 = 4459
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XYZW_ADDR64_si = 4460
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XYZW_BOTHEN_si = 4461
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_XYZW_BOTHEN_vi = 4462
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XYZW_IDXEN_si = 4463
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_XYZW_IDXEN_vi = 4464
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XYZW_OFFEN_si = 4465
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_XYZW_OFFEN_vi = 4466
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XYZW_OFFSET_si = 4467
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_XYZW_OFFSET_vi = 4468
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XYZ_ADDR64_si = 4469
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XYZ_BOTHEN_si = 4470
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_XYZ_BOTHEN_vi = 4471
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XYZ_IDXEN_si = 4472
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_XYZ_IDXEN_vi = 4473
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XYZ_OFFEN_si = 4474
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_XYZ_OFFEN_vi = 4475
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XYZ_OFFSET_si = 4476
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_XYZ_OFFSET_vi = 4477
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XY_ADDR64_si = 4478
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XY_BOTHEN_si = 4479
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_XY_BOTHEN_vi = 4480
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XY_IDXEN_si = 4481
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_XY_IDXEN_vi = 4482
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XY_OFFEN_si = 4483
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_XY_OFFEN_vi = 4484
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_XY_OFFSET_si = 4485
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_XY_OFFSET_vi = 4486
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_X_ADDR64_si = 4487
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_X_BOTHEN_si = 4488
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_X_BOTHEN_vi = 4489
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_X_IDXEN_si = 4490
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_X_IDXEN_vi = 4491
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_X_OFFEN_si = 4492
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_X_OFFEN_vi = 4493
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_FORMAT_X_OFFSET_si = 4494
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_FORMAT_X_OFFSET_vi = 4495
    Feature_isVI | Feature_isVI | 0, // BUFFER_STORE_LDS_DWORD_vi = 4496
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_SHORT_ADDR64_si = 4497
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_SHORT_BOTHEN_si = 4498
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_SHORT_BOTHEN_vi = 4499
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_STORE_SHORT_D16_HI_BOTHEN_vi = 4500
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_STORE_SHORT_D16_HI_IDXEN_vi = 4501
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_STORE_SHORT_D16_HI_OFFEN_vi = 4502
    Feature_HasD16LoadStore | Feature_isVI | 0, // BUFFER_STORE_SHORT_D16_HI_OFFSET_vi = 4503
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_SHORT_IDXEN_si = 4504
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_SHORT_IDXEN_vi = 4505
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_SHORT_OFFEN_si = 4506
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_SHORT_OFFEN_vi = 4507
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_STORE_SHORT_OFFSET_si = 4508
    Feature_isGCN | Feature_isVI | 0, // BUFFER_STORE_SHORT_OFFSET_vi = 4509
    Feature_isSI | Feature_isSICI | 0, // BUFFER_WBINVL1_SC_si = 4510
    Feature_isCIVI | Feature_isCIOnly | 0, // BUFFER_WBINVL1_VOL_ci = 4511
    Feature_isCIVI | Feature_isVI | 0, // BUFFER_WBINVL1_VOL_vi = 4512
    Feature_isGCN | Feature_isSICI | 0, // BUFFER_WBINVL1_si = 4513
    Feature_isGCN | Feature_isVI | 0, // BUFFER_WBINVL1_vi = 4514
    Feature_isGCN | Feature_isVI | 0, // DS_ADD_F32_vi = 4515
    Feature_isGCN | Feature_isVI | 0, // DS_ADD_RTN_F32_vi = 4516
    Feature_isGCN | Feature_isSICI | 0, // DS_ADD_RTN_U32_si = 4517
    Feature_isGCN | Feature_isVI | 0, // DS_ADD_RTN_U32_vi = 4518
    Feature_isGCN | Feature_isSICI | 0, // DS_ADD_RTN_U64_si = 4519
    Feature_isGCN | Feature_isVI | 0, // DS_ADD_RTN_U64_vi = 4520
    Feature_isVI | Feature_isVI | 0, // DS_ADD_SRC2_F32_vi = 4521
    Feature_isGCN | Feature_isSICI | 0, // DS_ADD_SRC2_U32_si = 4522
    Feature_isGCN | Feature_isVI | 0, // DS_ADD_SRC2_U32_vi = 4523
    Feature_isGCN | Feature_isSICI | 0, // DS_ADD_SRC2_U64_si = 4524
    Feature_isGCN | Feature_isVI | 0, // DS_ADD_SRC2_U64_vi = 4525
    Feature_isGCN | Feature_isSICI | 0, // DS_ADD_U32_si = 4526
    Feature_isGCN | Feature_isVI | 0, // DS_ADD_U32_vi = 4527
    Feature_isGCN | Feature_isSICI | 0, // DS_ADD_U64_si = 4528
    Feature_isGCN | Feature_isVI | 0, // DS_ADD_U64_vi = 4529
    Feature_isGCN | Feature_isSICI | 0, // DS_AND_B32_si = 4530
    Feature_isGCN | Feature_isVI | 0, // DS_AND_B32_vi = 4531
    Feature_isGCN | Feature_isSICI | 0, // DS_AND_B64_si = 4532
    Feature_isGCN | Feature_isVI | 0, // DS_AND_B64_vi = 4533
    Feature_isGCN | Feature_isSICI | 0, // DS_AND_RTN_B32_si = 4534
    Feature_isGCN | Feature_isVI | 0, // DS_AND_RTN_B32_vi = 4535
    Feature_isGCN | Feature_isSICI | 0, // DS_AND_RTN_B64_si = 4536
    Feature_isGCN | Feature_isVI | 0, // DS_AND_RTN_B64_vi = 4537
    Feature_isGCN | Feature_isSICI | 0, // DS_AND_SRC2_B32_si = 4538
    Feature_isGCN | Feature_isVI | 0, // DS_AND_SRC2_B32_vi = 4539
    Feature_isGCN | Feature_isSICI | 0, // DS_AND_SRC2_B64_si = 4540
    Feature_isGCN | Feature_isVI | 0, // DS_AND_SRC2_B64_vi = 4541
    Feature_isGCN | Feature_isSICI | 0, // DS_APPEND_si = 4542
    Feature_isGCN | Feature_isVI | 0, // DS_APPEND_vi = 4543
    Feature_isVI | Feature_isVI | 0, // DS_BPERMUTE_B32_vi = 4544
    Feature_isGCN | Feature_isSICI | 0, // DS_CMPST_B32_si = 4545
    Feature_isGCN | Feature_isVI | 0, // DS_CMPST_B32_vi = 4546
    Feature_isGCN | Feature_isSICI | 0, // DS_CMPST_B64_si = 4547
    Feature_isGCN | Feature_isVI | 0, // DS_CMPST_B64_vi = 4548
    Feature_isGCN | Feature_isSICI | 0, // DS_CMPST_F32_si = 4549
    Feature_isGCN | Feature_isVI | 0, // DS_CMPST_F32_vi = 4550
    Feature_isGCN | Feature_isSICI | 0, // DS_CMPST_F64_si = 4551
    Feature_isGCN | Feature_isVI | 0, // DS_CMPST_F64_vi = 4552
    Feature_isGCN | Feature_isSICI | 0, // DS_CMPST_RTN_B32_si = 4553
    Feature_isGCN | Feature_isVI | 0, // DS_CMPST_RTN_B32_vi = 4554
    Feature_isGCN | Feature_isSICI | 0, // DS_CMPST_RTN_B64_si = 4555
    Feature_isGCN | Feature_isVI | 0, // DS_CMPST_RTN_B64_vi = 4556
    Feature_isGCN | Feature_isSICI | 0, // DS_CMPST_RTN_F32_si = 4557
    Feature_isGCN | Feature_isVI | 0, // DS_CMPST_RTN_F32_vi = 4558
    Feature_isGCN | Feature_isSICI | 0, // DS_CMPST_RTN_F64_si = 4559
    Feature_isGCN | Feature_isVI | 0, // DS_CMPST_RTN_F64_vi = 4560
    Feature_isCIVI | Feature_isSICI | 0, // DS_CONDXCHG32_RTN_B64_si = 4561
    Feature_isCIVI | Feature_isVI | 0, // DS_CONDXCHG32_RTN_B64_vi = 4562
    Feature_isGCN | Feature_isSICI | 0, // DS_CONSUME_si = 4563
    Feature_isGCN | Feature_isVI | 0, // DS_CONSUME_vi = 4564
    Feature_isGCN | Feature_isSICI | 0, // DS_DEC_RTN_U32_si = 4565
    Feature_isGCN | Feature_isVI | 0, // DS_DEC_RTN_U32_vi = 4566
    Feature_isGCN | Feature_isSICI | 0, // DS_DEC_RTN_U64_si = 4567
    Feature_isGCN | Feature_isVI | 0, // DS_DEC_RTN_U64_vi = 4568
    Feature_isGCN | Feature_isSICI | 0, // DS_DEC_SRC2_U32_si = 4569
    Feature_isGCN | Feature_isVI | 0, // DS_DEC_SRC2_U32_vi = 4570
    Feature_isGCN | Feature_isSICI | 0, // DS_DEC_SRC2_U64_si = 4571
    Feature_isGCN | Feature_isVI | 0, // DS_DEC_SRC2_U64_vi = 4572
    Feature_isGCN | Feature_isSICI | 0, // DS_DEC_U32_si = 4573
    Feature_isGCN | Feature_isVI | 0, // DS_DEC_U32_vi = 4574
    Feature_isGCN | Feature_isSICI | 0, // DS_DEC_U64_si = 4575
    Feature_isGCN | Feature_isVI | 0, // DS_DEC_U64_vi = 4576
    Feature_isGCN | Feature_isSICI | 0, // DS_GWS_BARRIER_si = 4577
    Feature_isGCN | Feature_isVI | 0, // DS_GWS_BARRIER_vi = 4578
    Feature_isGCN | Feature_isSICI | 0, // DS_GWS_INIT_si = 4579
    Feature_isGCN | Feature_isVI | 0, // DS_GWS_INIT_vi = 4580
    Feature_isGCN | Feature_isSICI | 0, // DS_GWS_SEMA_BR_si = 4581
    Feature_isGCN | Feature_isVI | 0, // DS_GWS_SEMA_BR_vi = 4582
    Feature_isGCN | Feature_isSICI | 0, // DS_GWS_SEMA_P_si = 4583
    Feature_isGCN | Feature_isVI | 0, // DS_GWS_SEMA_P_vi = 4584
    Feature_isCIVI | Feature_isSICI | 0, // DS_GWS_SEMA_RELEASE_ALL_si = 4585
    Feature_isCIVI | Feature_isVI | 0, // DS_GWS_SEMA_RELEASE_ALL_vi = 4586
    Feature_isGCN | Feature_isSICI | 0, // DS_GWS_SEMA_V_si = 4587
    Feature_isGCN | Feature_isVI | 0, // DS_GWS_SEMA_V_vi = 4588
    Feature_isGCN | Feature_isSICI | 0, // DS_INC_RTN_U32_si = 4589
    Feature_isGCN | Feature_isVI | 0, // DS_INC_RTN_U32_vi = 4590
    Feature_isGCN | Feature_isSICI | 0, // DS_INC_RTN_U64_si = 4591
    Feature_isGCN | Feature_isVI | 0, // DS_INC_RTN_U64_vi = 4592
    Feature_isGCN | Feature_isSICI | 0, // DS_INC_SRC2_U32_si = 4593
    Feature_isGCN | Feature_isVI | 0, // DS_INC_SRC2_U32_vi = 4594
    Feature_isGCN | Feature_isSICI | 0, // DS_INC_SRC2_U64_si = 4595
    Feature_isGCN | Feature_isVI | 0, // DS_INC_SRC2_U64_vi = 4596
    Feature_isGCN | Feature_isSICI | 0, // DS_INC_U32_si = 4597
    Feature_isGCN | Feature_isVI | 0, // DS_INC_U32_vi = 4598
    Feature_isGCN | Feature_isSICI | 0, // DS_INC_U64_si = 4599
    Feature_isGCN | Feature_isVI | 0, // DS_INC_U64_vi = 4600
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_F32_si = 4601
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_F32_vi = 4602
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_F64_si = 4603
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_F64_vi = 4604
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_I32_si = 4605
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_I32_vi = 4606
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_I64_si = 4607
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_I64_vi = 4608
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_RTN_F32_si = 4609
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_RTN_F32_vi = 4610
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_RTN_F64_si = 4611
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_RTN_F64_vi = 4612
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_RTN_I32_si = 4613
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_RTN_I32_vi = 4614
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_RTN_I64_si = 4615
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_RTN_I64_vi = 4616
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_RTN_U32_si = 4617
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_RTN_U32_vi = 4618
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_RTN_U64_si = 4619
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_RTN_U64_vi = 4620
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_SRC2_F32_si = 4621
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_SRC2_F32_vi = 4622
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_SRC2_F64_si = 4623
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_SRC2_F64_vi = 4624
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_SRC2_I32_si = 4625
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_SRC2_I32_vi = 4626
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_SRC2_I64_si = 4627
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_SRC2_I64_vi = 4628
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_SRC2_U32_si = 4629
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_SRC2_U32_vi = 4630
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_SRC2_U64_si = 4631
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_SRC2_U64_vi = 4632
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_U32_si = 4633
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_U32_vi = 4634
    Feature_isGCN | Feature_isSICI | 0, // DS_MAX_U64_si = 4635
    Feature_isGCN | Feature_isVI | 0, // DS_MAX_U64_vi = 4636
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_F32_si = 4637
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_F32_vi = 4638
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_F64_si = 4639
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_F64_vi = 4640
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_I32_si = 4641
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_I32_vi = 4642
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_I64_si = 4643
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_I64_vi = 4644
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_RTN_F32_si = 4645
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_RTN_F32_vi = 4646
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_RTN_F64_si = 4647
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_RTN_F64_vi = 4648
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_RTN_I32_si = 4649
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_RTN_I32_vi = 4650
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_RTN_I64_si = 4651
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_RTN_I64_vi = 4652
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_RTN_U32_si = 4653
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_RTN_U32_vi = 4654
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_RTN_U64_si = 4655
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_RTN_U64_vi = 4656
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_SRC2_F32_si = 4657
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_SRC2_F32_vi = 4658
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_SRC2_F64_si = 4659
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_SRC2_F64_vi = 4660
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_SRC2_I32_si = 4661
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_SRC2_I32_vi = 4662
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_SRC2_I64_si = 4663
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_SRC2_I64_vi = 4664
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_SRC2_U32_si = 4665
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_SRC2_U32_vi = 4666
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_SRC2_U64_si = 4667
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_SRC2_U64_vi = 4668
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_U32_si = 4669
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_U32_vi = 4670
    Feature_isGCN | Feature_isSICI | 0, // DS_MIN_U64_si = 4671
    Feature_isGCN | Feature_isVI | 0, // DS_MIN_U64_vi = 4672
    Feature_isGCN | Feature_isSICI | 0, // DS_MSKOR_B32_si = 4673
    Feature_isGCN | Feature_isVI | 0, // DS_MSKOR_B32_vi = 4674
    Feature_isGCN | Feature_isSICI | 0, // DS_MSKOR_B64_si = 4675
    Feature_isGCN | Feature_isVI | 0, // DS_MSKOR_B64_vi = 4676
    Feature_isGCN | Feature_isSICI | 0, // DS_MSKOR_RTN_B32_si = 4677
    Feature_isGCN | Feature_isVI | 0, // DS_MSKOR_RTN_B32_vi = 4678
    Feature_isGCN | Feature_isSICI | 0, // DS_MSKOR_RTN_B64_si = 4679
    Feature_isGCN | Feature_isVI | 0, // DS_MSKOR_RTN_B64_vi = 4680
    Feature_isCIVI | Feature_isSICI | 0, // DS_NOP_si = 4681
    Feature_isCIVI | Feature_isVI | 0, // DS_NOP_vi = 4682
    Feature_isGCN | Feature_isSICI | 0, // DS_ORDERED_COUNT_si = 4683
    Feature_isGCN | Feature_isVI | 0, // DS_ORDERED_COUNT_vi = 4684
    Feature_isGCN | Feature_isSICI | 0, // DS_OR_B32_si = 4685
    Feature_isGCN | Feature_isVI | 0, // DS_OR_B32_vi = 4686
    Feature_isGCN | Feature_isSICI | 0, // DS_OR_B64_si = 4687
    Feature_isGCN | Feature_isVI | 0, // DS_OR_B64_vi = 4688
    Feature_isGCN | Feature_isSICI | 0, // DS_OR_RTN_B32_si = 4689
    Feature_isGCN | Feature_isVI | 0, // DS_OR_RTN_B32_vi = 4690
    Feature_isGCN | Feature_isSICI | 0, // DS_OR_RTN_B64_si = 4691
    Feature_isGCN | Feature_isVI | 0, // DS_OR_RTN_B64_vi = 4692
    Feature_isGCN | Feature_isSICI | 0, // DS_OR_SRC2_B32_si = 4693
    Feature_isGCN | Feature_isVI | 0, // DS_OR_SRC2_B32_vi = 4694
    Feature_isGCN | Feature_isSICI | 0, // DS_OR_SRC2_B64_si = 4695
    Feature_isGCN | Feature_isVI | 0, // DS_OR_SRC2_B64_vi = 4696
    Feature_isVI | Feature_isVI | 0, // DS_PERMUTE_B32_vi = 4697
    Feature_isGCN | Feature_isSICI | 0, // DS_READ2ST64_B32_si = 4698
    Feature_isGCN | Feature_isVI | 0, // DS_READ2ST64_B32_vi = 4699
    Feature_isGCN | Feature_isSICI | 0, // DS_READ2ST64_B64_si = 4700
    Feature_isGCN | Feature_isVI | 0, // DS_READ2ST64_B64_vi = 4701
    Feature_isGCN | Feature_isSICI | 0, // DS_READ2_B32_si = 4702
    Feature_isGCN | Feature_isVI | 0, // DS_READ2_B32_vi = 4703
    Feature_isGCN | Feature_isSICI | 0, // DS_READ2_B64_si = 4704
    Feature_isGCN | Feature_isVI | 0, // DS_READ2_B64_vi = 4705
    Feature_HasDSAddTid | Feature_isVI | 0, // DS_READ_ADDTID_B32_vi = 4706
    Feature_isCIVI | Feature_isSICI | 0, // DS_READ_B128_si = 4707
    Feature_isCIVI | Feature_isVI | 0, // DS_READ_B128_vi = 4708
    Feature_isGCN | Feature_isSICI | 0, // DS_READ_B32_si = 4709
    Feature_isGCN | Feature_isVI | 0, // DS_READ_B32_vi = 4710
    Feature_isGCN | Feature_isSICI | 0, // DS_READ_B64_si = 4711
    Feature_isGCN | Feature_isVI | 0, // DS_READ_B64_vi = 4712
    Feature_isCIVI | Feature_isSICI | 0, // DS_READ_B96_si = 4713
    Feature_isCIVI | Feature_isVI | 0, // DS_READ_B96_vi = 4714
    Feature_isGCN | Feature_isSICI | 0, // DS_READ_I16_si = 4715
    Feature_isGCN | Feature_isVI | 0, // DS_READ_I16_vi = 4716
    Feature_HasD16LoadStore | Feature_isVI | 0, // DS_READ_I8_D16_HI_vi = 4717
    Feature_HasD16LoadStore | Feature_isVI | 0, // DS_READ_I8_D16_vi = 4718
    Feature_isGCN | Feature_isSICI | 0, // DS_READ_I8_si = 4719
    Feature_isGCN | Feature_isVI | 0, // DS_READ_I8_vi = 4720
    Feature_HasD16LoadStore | Feature_isVI | 0, // DS_READ_U16_D16_HI_vi = 4721
    Feature_HasD16LoadStore | Feature_isVI | 0, // DS_READ_U16_D16_vi = 4722
    Feature_isGCN | Feature_isSICI | 0, // DS_READ_U16_si = 4723
    Feature_isGCN | Feature_isVI | 0, // DS_READ_U16_vi = 4724
    Feature_HasD16LoadStore | Feature_isVI | 0, // DS_READ_U8_D16_HI_vi = 4725
    Feature_HasD16LoadStore | Feature_isVI | 0, // DS_READ_U8_D16_vi = 4726
    Feature_isGCN | Feature_isSICI | 0, // DS_READ_U8_si = 4727
    Feature_isGCN | Feature_isVI | 0, // DS_READ_U8_vi = 4728
    Feature_isGCN | Feature_isSICI | 0, // DS_RSUB_RTN_U32_si = 4729
    Feature_isGCN | Feature_isVI | 0, // DS_RSUB_RTN_U32_vi = 4730
    Feature_isGCN | Feature_isSICI | 0, // DS_RSUB_RTN_U64_si = 4731
    Feature_isGCN | Feature_isVI | 0, // DS_RSUB_RTN_U64_vi = 4732
    Feature_isGCN | Feature_isSICI | 0, // DS_RSUB_SRC2_U32_si = 4733
    Feature_isGCN | Feature_isVI | 0, // DS_RSUB_SRC2_U32_vi = 4734
    Feature_isGCN | Feature_isSICI | 0, // DS_RSUB_SRC2_U64_si = 4735
    Feature_isGCN | Feature_isVI | 0, // DS_RSUB_SRC2_U64_vi = 4736
    Feature_isGCN | Feature_isSICI | 0, // DS_RSUB_U32_si = 4737
    Feature_isGCN | Feature_isVI | 0, // DS_RSUB_U32_vi = 4738
    Feature_isGCN | Feature_isSICI | 0, // DS_RSUB_U64_si = 4739
    Feature_isGCN | Feature_isVI | 0, // DS_RSUB_U64_vi = 4740
    Feature_isGCN | Feature_isSICI | 0, // DS_SUB_RTN_U32_si = 4741
    Feature_isGCN | Feature_isVI | 0, // DS_SUB_RTN_U32_vi = 4742
    Feature_isGCN | Feature_isSICI | 0, // DS_SUB_RTN_U64_si = 4743
    Feature_isGCN | Feature_isVI | 0, // DS_SUB_RTN_U64_vi = 4744
    Feature_isGCN | Feature_isSICI | 0, // DS_SUB_SRC2_U32_si = 4745
    Feature_isGCN | Feature_isVI | 0, // DS_SUB_SRC2_U32_vi = 4746
    Feature_isGCN | Feature_isSICI | 0, // DS_SUB_SRC2_U64_si = 4747
    Feature_isGCN | Feature_isVI | 0, // DS_SUB_SRC2_U64_vi = 4748
    Feature_isGCN | Feature_isSICI | 0, // DS_SUB_U32_si = 4749
    Feature_isGCN | Feature_isVI | 0, // DS_SUB_U32_vi = 4750
    Feature_isGCN | Feature_isSICI | 0, // DS_SUB_U64_si = 4751
    Feature_isGCN | Feature_isVI | 0, // DS_SUB_U64_vi = 4752
    Feature_isGCN | Feature_isSICI | 0, // DS_SWIZZLE_B32_si = 4753
    Feature_isGCN | Feature_isVI | 0, // DS_SWIZZLE_B32_vi = 4754
    Feature_isCIVI | Feature_isSICI | 0, // DS_WRAP_RTN_B32_si = 4755
    Feature_isCIVI | Feature_isVI | 0, // DS_WRAP_RTN_B32_vi = 4756
    Feature_isGCN | Feature_isSICI | 0, // DS_WRITE2ST64_B32_si = 4757
    Feature_isGCN | Feature_isVI | 0, // DS_WRITE2ST64_B32_vi = 4758
    Feature_isGCN | Feature_isSICI | 0, // DS_WRITE2ST64_B64_si = 4759
    Feature_isGCN | Feature_isVI | 0, // DS_WRITE2ST64_B64_vi = 4760
    Feature_isGCN | Feature_isSICI | 0, // DS_WRITE2_B32_si = 4761
    Feature_isGCN | Feature_isVI | 0, // DS_WRITE2_B32_vi = 4762
    Feature_isGCN | Feature_isSICI | 0, // DS_WRITE2_B64_si = 4763
    Feature_isGCN | Feature_isVI | 0, // DS_WRITE2_B64_vi = 4764
    Feature_HasDSAddTid | Feature_isVI | 0, // DS_WRITE_ADDTID_B32_vi = 4765
    Feature_isCIVI | Feature_isSICI | 0, // DS_WRITE_B128_si = 4766
    Feature_isCIVI | Feature_isVI | 0, // DS_WRITE_B128_vi = 4767
    Feature_HasD16LoadStore | Feature_isVI | 0, // DS_WRITE_B16_D16_HI_vi = 4768
    Feature_isGCN | Feature_isSICI | 0, // DS_WRITE_B16_si = 4769
    Feature_isGCN | Feature_isVI | 0, // DS_WRITE_B16_vi = 4770
    Feature_isGCN | Feature_isSICI | 0, // DS_WRITE_B32_si = 4771
    Feature_isGCN | Feature_isVI | 0, // DS_WRITE_B32_vi = 4772
    Feature_isGCN | Feature_isSICI | 0, // DS_WRITE_B64_si = 4773
    Feature_isGCN | Feature_isVI | 0, // DS_WRITE_B64_vi = 4774
    Feature_HasD16LoadStore | Feature_isVI | 0, // DS_WRITE_B8_D16_HI_vi = 4775
    Feature_isGCN | Feature_isSICI | 0, // DS_WRITE_B8_si = 4776
    Feature_isGCN | Feature_isVI | 0, // DS_WRITE_B8_vi = 4777
    Feature_isCIVI | Feature_isSICI | 0, // DS_WRITE_B96_si = 4778
    Feature_isCIVI | Feature_isVI | 0, // DS_WRITE_B96_vi = 4779
    Feature_isGCN | Feature_isSICI | 0, // DS_WRITE_SRC2_B32_si = 4780
    Feature_isGCN | Feature_isVI | 0, // DS_WRITE_SRC2_B32_vi = 4781
    Feature_isGCN | Feature_isSICI | 0, // DS_WRITE_SRC2_B64_si = 4782
    Feature_isGCN | Feature_isVI | 0, // DS_WRITE_SRC2_B64_vi = 4783
    Feature_isGCN | Feature_isSICI | 0, // DS_WRXCHG2ST64_RTN_B32_si = 4784
    Feature_isGCN | Feature_isVI | 0, // DS_WRXCHG2ST64_RTN_B32_vi = 4785
    Feature_isGCN | Feature_isSICI | 0, // DS_WRXCHG2ST64_RTN_B64_si = 4786
    Feature_isGCN | Feature_isVI | 0, // DS_WRXCHG2ST64_RTN_B64_vi = 4787
    Feature_isGCN | Feature_isSICI | 0, // DS_WRXCHG2_RTN_B32_si = 4788
    Feature_isGCN | Feature_isVI | 0, // DS_WRXCHG2_RTN_B32_vi = 4789
    Feature_isGCN | Feature_isSICI | 0, // DS_WRXCHG2_RTN_B64_si = 4790
    Feature_isGCN | Feature_isVI | 0, // DS_WRXCHG2_RTN_B64_vi = 4791
    Feature_isGCN | Feature_isSICI | 0, // DS_WRXCHG_RTN_B32_si = 4792
    Feature_isGCN | Feature_isVI | 0, // DS_WRXCHG_RTN_B32_vi = 4793
    Feature_isGCN | Feature_isSICI | 0, // DS_WRXCHG_RTN_B64_si = 4794
    Feature_isGCN | Feature_isVI | 0, // DS_WRXCHG_RTN_B64_vi = 4795
    Feature_isGCN | Feature_isSICI | 0, // DS_XOR_B32_si = 4796
    Feature_isGCN | Feature_isVI | 0, // DS_XOR_B32_vi = 4797
    Feature_isGCN | Feature_isSICI | 0, // DS_XOR_B64_si = 4798
    Feature_isGCN | Feature_isVI | 0, // DS_XOR_B64_vi = 4799
    Feature_isGCN | Feature_isSICI | 0, // DS_XOR_RTN_B32_si = 4800
    Feature_isGCN | Feature_isVI | 0, // DS_XOR_RTN_B32_vi = 4801
    Feature_isGCN | Feature_isSICI | 0, // DS_XOR_RTN_B64_si = 4802
    Feature_isGCN | Feature_isVI | 0, // DS_XOR_RTN_B64_vi = 4803
    Feature_isGCN | Feature_isSICI | 0, // DS_XOR_SRC2_B32_si = 4804
    Feature_isGCN | Feature_isVI | 0, // DS_XOR_SRC2_B32_vi = 4805
    Feature_isGCN | Feature_isSICI | 0, // DS_XOR_SRC2_B64_si = 4806
    Feature_isGCN | Feature_isVI | 0, // DS_XOR_SRC2_B64_vi = 4807
    Feature_isGCN | Feature_isSICI | 0, // EXP_DONE_si = 4808
    Feature_isGCN | Feature_isVI | 0, // EXP_DONE_vi = 4809
    Feature_isGCN | Feature_isSICI | 0, // EXP_si = 4810
    Feature_isGCN | Feature_isVI | 0, // EXP_vi = 4811
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_ADD_RTN_ci = 4812
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_ADD_RTN_vi = 4813
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_ADD_X2_RTN_ci = 4814
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_ADD_X2_RTN_vi = 4815
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_ADD_X2_ci = 4816
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_ADD_X2_vi = 4817
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_ADD_ci = 4818
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_ADD_vi = 4819
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_AND_RTN_ci = 4820
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_AND_RTN_vi = 4821
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_AND_X2_RTN_ci = 4822
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_AND_X2_RTN_vi = 4823
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_AND_X2_ci = 4824
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_AND_X2_vi = 4825
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_AND_ci = 4826
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_AND_vi = 4827
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_CMPSWAP_RTN_ci = 4828
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_CMPSWAP_RTN_vi = 4829
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_CMPSWAP_X2_RTN_ci = 4830
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_CMPSWAP_X2_RTN_vi = 4831
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_CMPSWAP_X2_ci = 4832
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_CMPSWAP_X2_vi = 4833
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_CMPSWAP_ci = 4834
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_CMPSWAP_vi = 4835
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_DEC_RTN_ci = 4836
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_DEC_RTN_vi = 4837
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_DEC_X2_RTN_ci = 4838
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_DEC_X2_RTN_vi = 4839
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_DEC_X2_ci = 4840
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_DEC_X2_vi = 4841
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_DEC_ci = 4842
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_DEC_vi = 4843
    Feature_isCIOnly | 0, // FLAT_ATOMIC_FCMPSWAP_RTN_ci = 4844
    Feature_isCIOnly | 0, // FLAT_ATOMIC_FCMPSWAP_X2_RTN_ci = 4845
    Feature_isCIOnly | 0, // FLAT_ATOMIC_FCMPSWAP_X2_ci = 4846
    Feature_isCIOnly | 0, // FLAT_ATOMIC_FCMPSWAP_ci = 4847
    Feature_isCIOnly | 0, // FLAT_ATOMIC_FMAX_RTN_ci = 4848
    Feature_isCIOnly | 0, // FLAT_ATOMIC_FMAX_X2_RTN_ci = 4849
    Feature_isCIOnly | 0, // FLAT_ATOMIC_FMAX_X2_ci = 4850
    Feature_isCIOnly | 0, // FLAT_ATOMIC_FMAX_ci = 4851
    Feature_isCIOnly | 0, // FLAT_ATOMIC_FMIN_RTN_ci = 4852
    Feature_isCIOnly | 0, // FLAT_ATOMIC_FMIN_X2_RTN_ci = 4853
    Feature_isCIOnly | 0, // FLAT_ATOMIC_FMIN_X2_ci = 4854
    Feature_isCIOnly | 0, // FLAT_ATOMIC_FMIN_ci = 4855
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_INC_RTN_ci = 4856
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_INC_RTN_vi = 4857
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_INC_X2_RTN_ci = 4858
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_INC_X2_RTN_vi = 4859
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_INC_X2_ci = 4860
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_INC_X2_vi = 4861
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_INC_ci = 4862
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_INC_vi = 4863
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_OR_RTN_ci = 4864
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_OR_RTN_vi = 4865
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_OR_X2_RTN_ci = 4866
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_OR_X2_RTN_vi = 4867
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_OR_X2_ci = 4868
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_OR_X2_vi = 4869
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_OR_ci = 4870
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_OR_vi = 4871
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SMAX_RTN_ci = 4872
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SMAX_RTN_vi = 4873
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SMAX_X2_RTN_ci = 4874
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SMAX_X2_RTN_vi = 4875
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SMAX_X2_ci = 4876
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SMAX_X2_vi = 4877
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SMAX_ci = 4878
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SMAX_vi = 4879
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SMIN_RTN_ci = 4880
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SMIN_RTN_vi = 4881
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SMIN_X2_RTN_ci = 4882
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SMIN_X2_RTN_vi = 4883
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SMIN_X2_ci = 4884
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SMIN_X2_vi = 4885
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SMIN_ci = 4886
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SMIN_vi = 4887
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SUB_RTN_ci = 4888
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SUB_RTN_vi = 4889
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SUB_X2_RTN_ci = 4890
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SUB_X2_RTN_vi = 4891
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SUB_X2_ci = 4892
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SUB_X2_vi = 4893
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SUB_ci = 4894
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SUB_vi = 4895
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SWAP_RTN_ci = 4896
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SWAP_RTN_vi = 4897
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SWAP_X2_RTN_ci = 4898
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SWAP_X2_RTN_vi = 4899
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SWAP_X2_ci = 4900
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SWAP_X2_vi = 4901
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_SWAP_ci = 4902
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_SWAP_vi = 4903
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_UMAX_RTN_ci = 4904
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_UMAX_RTN_vi = 4905
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_UMAX_X2_RTN_ci = 4906
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_UMAX_X2_RTN_vi = 4907
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_UMAX_X2_ci = 4908
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_UMAX_X2_vi = 4909
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_UMAX_ci = 4910
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_UMAX_vi = 4911
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_UMIN_RTN_ci = 4912
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_UMIN_RTN_vi = 4913
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_UMIN_X2_RTN_ci = 4914
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_UMIN_X2_RTN_vi = 4915
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_UMIN_X2_ci = 4916
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_UMIN_X2_vi = 4917
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_UMIN_ci = 4918
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_UMIN_vi = 4919
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_XOR_RTN_ci = 4920
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_XOR_RTN_vi = 4921
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_XOR_X2_RTN_ci = 4922
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_XOR_X2_RTN_vi = 4923
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_XOR_X2_ci = 4924
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_XOR_X2_vi = 4925
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_ATOMIC_XOR_ci = 4926
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_ATOMIC_XOR_vi = 4927
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_LOAD_DWORDX2_ci = 4928
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_LOAD_DWORDX2_vi = 4929
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_LOAD_DWORDX3_ci = 4930
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_LOAD_DWORDX3_vi = 4931
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_LOAD_DWORDX4_ci = 4932
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_LOAD_DWORDX4_vi = 4933
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_LOAD_DWORD_ci = 4934
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_LOAD_DWORD_vi = 4935
    Feature_HasD16LoadStore | Feature_isVI | 0, // FLAT_LOAD_SBYTE_D16_HI_vi = 4936
    Feature_HasD16LoadStore | Feature_isVI | 0, // FLAT_LOAD_SBYTE_D16_vi = 4937
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_LOAD_SBYTE_ci = 4938
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_LOAD_SBYTE_vi = 4939
    Feature_HasD16LoadStore | Feature_isVI | 0, // FLAT_LOAD_SHORT_D16_HI_vi = 4940
    Feature_HasD16LoadStore | Feature_isVI | 0, // FLAT_LOAD_SHORT_D16_vi = 4941
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_LOAD_SSHORT_ci = 4942
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_LOAD_SSHORT_vi = 4943
    Feature_HasD16LoadStore | Feature_isVI | 0, // FLAT_LOAD_UBYTE_D16_HI_vi = 4944
    Feature_HasD16LoadStore | Feature_isVI | 0, // FLAT_LOAD_UBYTE_D16_vi = 4945
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_LOAD_UBYTE_ci = 4946
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_LOAD_UBYTE_vi = 4947
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_LOAD_USHORT_ci = 4948
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_LOAD_USHORT_vi = 4949
    Feature_HasD16LoadStore | Feature_isVI | 0, // FLAT_STORE_BYTE_D16_HI_vi = 4950
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_STORE_BYTE_ci = 4951
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_STORE_BYTE_vi = 4952
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_STORE_DWORDX2_ci = 4953
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_STORE_DWORDX2_vi = 4954
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_STORE_DWORDX3_ci = 4955
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_STORE_DWORDX3_vi = 4956
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_STORE_DWORDX4_ci = 4957
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_STORE_DWORDX4_vi = 4958
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_STORE_DWORD_ci = 4959
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_STORE_DWORD_vi = 4960
    Feature_HasD16LoadStore | Feature_isVI | 0, // FLAT_STORE_SHORT_D16_HI_vi = 4961
    Feature_HasFlatAddressSpace | Feature_isCIOnly | 0, // FLAT_STORE_SHORT_ci = 4962
    Feature_HasFlatAddressSpace | Feature_isVI | 0, // FLAT_STORE_SHORT_vi = 4963
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_ADD_RTN_vi = 4964
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_ADD_SADDR_RTN_vi = 4965
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_ADD_SADDR_vi = 4966
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_ADD_X2_RTN_vi = 4967
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_ADD_X2_SADDR_RTN_vi = 4968
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_ADD_X2_SADDR_vi = 4969
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_ADD_X2_vi = 4970
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_ADD_vi = 4971
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_AND_RTN_vi = 4972
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_AND_SADDR_RTN_vi = 4973
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_AND_SADDR_vi = 4974
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_AND_X2_RTN_vi = 4975
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_AND_X2_SADDR_RTN_vi = 4976
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_AND_X2_SADDR_vi = 4977
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_AND_X2_vi = 4978
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_AND_vi = 4979
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_CMPSWAP_RTN_vi = 4980
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_CMPSWAP_SADDR_RTN_vi = 4981
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_CMPSWAP_SADDR_vi = 4982
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_CMPSWAP_X2_RTN_vi = 4983
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_CMPSWAP_X2_SADDR_RTN_vi = 4984
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_CMPSWAP_X2_SADDR_vi = 4985
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_CMPSWAP_X2_vi = 4986
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_CMPSWAP_vi = 4987
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_DEC_RTN_vi = 4988
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_DEC_SADDR_RTN_vi = 4989
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_DEC_SADDR_vi = 4990
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_DEC_X2_RTN_vi = 4991
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_DEC_X2_SADDR_RTN_vi = 4992
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_DEC_X2_SADDR_vi = 4993
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_DEC_X2_vi = 4994
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_DEC_vi = 4995
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_INC_RTN_vi = 4996
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_INC_SADDR_RTN_vi = 4997
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_INC_SADDR_vi = 4998
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_INC_X2_RTN_vi = 4999
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_INC_X2_SADDR_RTN_vi = 5000
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_INC_X2_SADDR_vi = 5001
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_INC_X2_vi = 5002
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_INC_vi = 5003
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_OR_RTN_vi = 5004
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_OR_SADDR_RTN_vi = 5005
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_OR_SADDR_vi = 5006
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_OR_X2_RTN_vi = 5007
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_OR_X2_SADDR_RTN_vi = 5008
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_OR_X2_SADDR_vi = 5009
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_OR_X2_vi = 5010
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_OR_vi = 5011
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMAX_RTN_vi = 5012
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMAX_SADDR_RTN_vi = 5013
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMAX_SADDR_vi = 5014
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMAX_X2_RTN_vi = 5015
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMAX_X2_SADDR_RTN_vi = 5016
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMAX_X2_SADDR_vi = 5017
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMAX_X2_vi = 5018
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMAX_vi = 5019
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMIN_RTN_vi = 5020
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMIN_SADDR_RTN_vi = 5021
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMIN_SADDR_vi = 5022
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMIN_X2_RTN_vi = 5023
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMIN_X2_SADDR_RTN_vi = 5024
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMIN_X2_SADDR_vi = 5025
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMIN_X2_vi = 5026
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SMIN_vi = 5027
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SUB_RTN_vi = 5028
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SUB_SADDR_RTN_vi = 5029
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SUB_SADDR_vi = 5030
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SUB_X2_RTN_vi = 5031
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SUB_X2_SADDR_RTN_vi = 5032
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SUB_X2_SADDR_vi = 5033
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SUB_X2_vi = 5034
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SUB_vi = 5035
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SWAP_RTN_vi = 5036
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SWAP_SADDR_RTN_vi = 5037
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SWAP_SADDR_vi = 5038
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SWAP_X2_RTN_vi = 5039
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SWAP_X2_SADDR_RTN_vi = 5040
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SWAP_X2_SADDR_vi = 5041
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SWAP_X2_vi = 5042
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_SWAP_vi = 5043
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMAX_RTN_vi = 5044
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMAX_SADDR_RTN_vi = 5045
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMAX_SADDR_vi = 5046
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMAX_X2_RTN_vi = 5047
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMAX_X2_SADDR_RTN_vi = 5048
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMAX_X2_SADDR_vi = 5049
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMAX_X2_vi = 5050
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMAX_vi = 5051
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMIN_RTN_vi = 5052
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMIN_SADDR_RTN_vi = 5053
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMIN_SADDR_vi = 5054
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMIN_X2_RTN_vi = 5055
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMIN_X2_SADDR_RTN_vi = 5056
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMIN_X2_SADDR_vi = 5057
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMIN_X2_vi = 5058
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_UMIN_vi = 5059
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_XOR_RTN_vi = 5060
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_XOR_SADDR_RTN_vi = 5061
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_XOR_SADDR_vi = 5062
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_XOR_X2_RTN_vi = 5063
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_XOR_X2_SADDR_RTN_vi = 5064
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_XOR_X2_SADDR_vi = 5065
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_XOR_X2_vi = 5066
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_ATOMIC_XOR_vi = 5067
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_DWORDX2_SADDR_vi = 5068
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_DWORDX2_vi = 5069
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_DWORDX3_SADDR_vi = 5070
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_DWORDX3_vi = 5071
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_DWORDX4_SADDR_vi = 5072
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_DWORDX4_vi = 5073
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_DWORD_SADDR_vi = 5074
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_DWORD_vi = 5075
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_SBYTE_D16_HI_SADDR_vi = 5076
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_SBYTE_D16_HI_vi = 5077
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_SBYTE_D16_SADDR_vi = 5078
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_SBYTE_D16_vi = 5079
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_SBYTE_SADDR_vi = 5080
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_SBYTE_vi = 5081
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_SHORT_D16_HI_SADDR_vi = 5082
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_SHORT_D16_HI_vi = 5083
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_SHORT_D16_SADDR_vi = 5084
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_SHORT_D16_vi = 5085
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_SSHORT_SADDR_vi = 5086
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_SSHORT_vi = 5087
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_UBYTE_D16_HI_SADDR_vi = 5088
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_UBYTE_D16_HI_vi = 5089
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_UBYTE_D16_SADDR_vi = 5090
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_UBYTE_D16_vi = 5091
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_UBYTE_SADDR_vi = 5092
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_UBYTE_vi = 5093
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_USHORT_SADDR_vi = 5094
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_LOAD_USHORT_vi = 5095
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_BYTE_D16_HI_SADDR_vi = 5096
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_BYTE_D16_HI_vi = 5097
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_BYTE_SADDR_vi = 5098
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_BYTE_vi = 5099
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_DWORDX2_SADDR_vi = 5100
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_DWORDX2_vi = 5101
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_DWORDX3_SADDR_vi = 5102
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_DWORDX3_vi = 5103
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_DWORDX4_SADDR_vi = 5104
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_DWORDX4_vi = 5105
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_DWORD_SADDR_vi = 5106
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_DWORD_vi = 5107
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_SHORT_D16_HI_SADDR_vi = 5108
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_SHORT_D16_HI_vi = 5109
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_SHORT_SADDR_vi = 5110
    Feature_HasFlatGlobalInsts | Feature_isVI | 0, // GLOBAL_STORE_SHORT_vi = 5111
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_ADD_V1_V1_si = 5112
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_ADD_V1_V1_vi = 5113
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_ADD_V1_V2_si = 5114
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_ADD_V1_V2_vi = 5115
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_ADD_V1_V3_si = 5116
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_ADD_V1_V3_vi = 5117
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_ADD_V1_V4_si = 5118
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_ADD_V1_V4_vi = 5119
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_ADD_V2_V1_si = 5120
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_ADD_V2_V1_vi = 5121
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_ADD_V2_V2_si = 5122
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_ADD_V2_V2_vi = 5123
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_ADD_V2_V3_si = 5124
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_ADD_V2_V3_vi = 5125
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_ADD_V2_V4_si = 5126
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_ADD_V2_V4_vi = 5127
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_AND_V1_V1_si = 5128
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_AND_V1_V1_vi = 5129
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_AND_V1_V2_si = 5130
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_AND_V1_V2_vi = 5131
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_AND_V1_V3_si = 5132
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_AND_V1_V3_vi = 5133
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_AND_V1_V4_si = 5134
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_AND_V1_V4_vi = 5135
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_AND_V2_V1_si = 5136
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_AND_V2_V1_vi = 5137
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_AND_V2_V2_si = 5138
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_AND_V2_V2_vi = 5139
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_AND_V2_V3_si = 5140
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_AND_V2_V3_vi = 5141
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_AND_V2_V4_si = 5142
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_AND_V2_V4_vi = 5143
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_CMPSWAP_V1_V1_si = 5144
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_CMPSWAP_V1_V1_vi = 5145
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_CMPSWAP_V1_V2_si = 5146
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_CMPSWAP_V1_V2_vi = 5147
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_CMPSWAP_V1_V3_si = 5148
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_CMPSWAP_V1_V3_vi = 5149
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_CMPSWAP_V1_V4_si = 5150
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_CMPSWAP_V1_V4_vi = 5151
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_CMPSWAP_V2_V1_si = 5152
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_CMPSWAP_V2_V1_vi = 5153
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_CMPSWAP_V2_V2_si = 5154
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_CMPSWAP_V2_V2_vi = 5155
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_CMPSWAP_V2_V3_si = 5156
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_CMPSWAP_V2_V3_vi = 5157
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_CMPSWAP_V2_V4_si = 5158
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_CMPSWAP_V2_V4_vi = 5159
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_DEC_V1_V1_si = 5160
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_DEC_V1_V1_vi = 5161
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_DEC_V1_V2_si = 5162
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_DEC_V1_V2_vi = 5163
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_DEC_V1_V3_si = 5164
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_DEC_V1_V3_vi = 5165
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_DEC_V1_V4_si = 5166
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_DEC_V1_V4_vi = 5167
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_DEC_V2_V1_si = 5168
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_DEC_V2_V1_vi = 5169
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_DEC_V2_V2_si = 5170
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_DEC_V2_V2_vi = 5171
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_DEC_V2_V3_si = 5172
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_DEC_V2_V3_vi = 5173
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_DEC_V2_V4_si = 5174
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_DEC_V2_V4_vi = 5175
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_INC_V1_V1_si = 5176
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_INC_V1_V1_vi = 5177
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_INC_V1_V2_si = 5178
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_INC_V1_V2_vi = 5179
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_INC_V1_V3_si = 5180
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_INC_V1_V3_vi = 5181
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_INC_V1_V4_si = 5182
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_INC_V1_V4_vi = 5183
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_INC_V2_V1_si = 5184
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_INC_V2_V1_vi = 5185
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_INC_V2_V2_si = 5186
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_INC_V2_V2_vi = 5187
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_INC_V2_V3_si = 5188
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_INC_V2_V3_vi = 5189
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_INC_V2_V4_si = 5190
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_INC_V2_V4_vi = 5191
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_OR_V1_V1_si = 5192
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_OR_V1_V1_vi = 5193
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_OR_V1_V2_si = 5194
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_OR_V1_V2_vi = 5195
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_OR_V1_V3_si = 5196
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_OR_V1_V3_vi = 5197
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_OR_V1_V4_si = 5198
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_OR_V1_V4_vi = 5199
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_OR_V2_V1_si = 5200
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_OR_V2_V1_vi = 5201
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_OR_V2_V2_si = 5202
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_OR_V2_V2_vi = 5203
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_OR_V2_V3_si = 5204
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_OR_V2_V3_vi = 5205
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_OR_V2_V4_si = 5206
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_OR_V2_V4_vi = 5207
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMAX_V1_V1_si = 5208
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMAX_V1_V1_vi = 5209
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMAX_V1_V2_si = 5210
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMAX_V1_V2_vi = 5211
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMAX_V1_V3_si = 5212
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMAX_V1_V3_vi = 5213
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMAX_V1_V4_si = 5214
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMAX_V1_V4_vi = 5215
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMAX_V2_V1_si = 5216
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMAX_V2_V1_vi = 5217
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMAX_V2_V2_si = 5218
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMAX_V2_V2_vi = 5219
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMAX_V2_V3_si = 5220
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMAX_V2_V3_vi = 5221
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMAX_V2_V4_si = 5222
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMAX_V2_V4_vi = 5223
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMIN_V1_V1_si = 5224
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMIN_V1_V1_vi = 5225
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMIN_V1_V2_si = 5226
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMIN_V1_V2_vi = 5227
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMIN_V1_V3_si = 5228
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMIN_V1_V3_vi = 5229
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMIN_V1_V4_si = 5230
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMIN_V1_V4_vi = 5231
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMIN_V2_V1_si = 5232
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMIN_V2_V1_vi = 5233
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMIN_V2_V2_si = 5234
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMIN_V2_V2_vi = 5235
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMIN_V2_V3_si = 5236
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMIN_V2_V3_vi = 5237
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SMIN_V2_V4_si = 5238
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SMIN_V2_V4_vi = 5239
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SUB_V1_V1_si = 5240
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SUB_V1_V1_vi = 5241
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SUB_V1_V2_si = 5242
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SUB_V1_V2_vi = 5243
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SUB_V1_V3_si = 5244
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SUB_V1_V3_vi = 5245
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SUB_V1_V4_si = 5246
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SUB_V1_V4_vi = 5247
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SUB_V2_V1_si = 5248
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SUB_V2_V1_vi = 5249
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SUB_V2_V2_si = 5250
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SUB_V2_V2_vi = 5251
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SUB_V2_V3_si = 5252
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SUB_V2_V3_vi = 5253
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SUB_V2_V4_si = 5254
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SUB_V2_V4_vi = 5255
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SWAP_V1_V1_si = 5256
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SWAP_V1_V1_vi = 5257
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SWAP_V1_V2_si = 5258
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SWAP_V1_V2_vi = 5259
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SWAP_V1_V3_si = 5260
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SWAP_V1_V3_vi = 5261
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SWAP_V1_V4_si = 5262
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SWAP_V1_V4_vi = 5263
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SWAP_V2_V1_si = 5264
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SWAP_V2_V1_vi = 5265
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SWAP_V2_V2_si = 5266
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SWAP_V2_V2_vi = 5267
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SWAP_V2_V3_si = 5268
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SWAP_V2_V3_vi = 5269
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_SWAP_V2_V4_si = 5270
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_SWAP_V2_V4_vi = 5271
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMAX_V1_V1_si = 5272
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMAX_V1_V1_vi = 5273
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMAX_V1_V2_si = 5274
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMAX_V1_V2_vi = 5275
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMAX_V1_V3_si = 5276
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMAX_V1_V3_vi = 5277
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMAX_V1_V4_si = 5278
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMAX_V1_V4_vi = 5279
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMAX_V2_V1_si = 5280
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMAX_V2_V1_vi = 5281
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMAX_V2_V2_si = 5282
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMAX_V2_V2_vi = 5283
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMAX_V2_V3_si = 5284
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMAX_V2_V3_vi = 5285
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMAX_V2_V4_si = 5286
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMAX_V2_V4_vi = 5287
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMIN_V1_V1_si = 5288
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMIN_V1_V1_vi = 5289
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMIN_V1_V2_si = 5290
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMIN_V1_V2_vi = 5291
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMIN_V1_V3_si = 5292
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMIN_V1_V3_vi = 5293
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMIN_V1_V4_si = 5294
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMIN_V1_V4_vi = 5295
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMIN_V2_V1_si = 5296
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMIN_V2_V1_vi = 5297
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMIN_V2_V2_si = 5298
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMIN_V2_V2_vi = 5299
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMIN_V2_V3_si = 5300
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMIN_V2_V3_vi = 5301
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_UMIN_V2_V4_si = 5302
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_UMIN_V2_V4_vi = 5303
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_XOR_V1_V1_si = 5304
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_XOR_V1_V1_vi = 5305
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_XOR_V1_V2_si = 5306
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_XOR_V1_V2_vi = 5307
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_XOR_V1_V3_si = 5308
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_XOR_V1_V3_vi = 5309
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_XOR_V1_V4_si = 5310
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_XOR_V1_V4_vi = 5311
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_XOR_V2_V1_si = 5312
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_XOR_V2_V1_vi = 5313
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_XOR_V2_V2_si = 5314
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_XOR_V2_V2_vi = 5315
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_XOR_V2_V3_si = 5316
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_XOR_V2_V3_vi = 5317
    Feature_isGCN | Feature_isSICI | 0, // IMAGE_ATOMIC_XOR_V2_V4_si = 5318
    Feature_isGCN | Feature_isVI | 0, // IMAGE_ATOMIC_XOR_V2_V4_vi = 5319
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_O_V2_V3 = 5320
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_O_V2_V4 = 5321
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_O_V2_V8 = 5322
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_O_V4_V3 = 5323
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_O_V4_V4 = 5324
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_O_V4_V8 = 5325
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_O_V8_V3 = 5326
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_O_V8_V4 = 5327
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_O_V8_V8 = 5328
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_V2_V2 = 5329
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_V2_V3 = 5330
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_V2_V4 = 5331
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_V2_V8 = 5332
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_V4_V2 = 5333
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_V4_V3 = 5334
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_V4_V4 = 5335
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_V4_V8 = 5336
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_V8_V2 = 5337
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_V8_V3 = 5338
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_V8_V4 = 5339
    Feature_isGCN | 0, // IMAGE_GATHER4_B_CL_V8_V8 = 5340
    Feature_isGCN | 0, // IMAGE_GATHER4_B_O_V2_V3 = 5341
    Feature_isGCN | 0, // IMAGE_GATHER4_B_O_V2_V4 = 5342
    Feature_isGCN | 0, // IMAGE_GATHER4_B_O_V2_V8 = 5343
    Feature_isGCN | 0, // IMAGE_GATHER4_B_O_V4_V3 = 5344
    Feature_isGCN | 0, // IMAGE_GATHER4_B_O_V4_V4 = 5345
    Feature_isGCN | 0, // IMAGE_GATHER4_B_O_V4_V8 = 5346
    Feature_isGCN | 0, // IMAGE_GATHER4_B_O_V8_V3 = 5347
    Feature_isGCN | 0, // IMAGE_GATHER4_B_O_V8_V4 = 5348
    Feature_isGCN | 0, // IMAGE_GATHER4_B_O_V8_V8 = 5349
    Feature_isGCN | 0, // IMAGE_GATHER4_B_V2_V2 = 5350
    Feature_isGCN | 0, // IMAGE_GATHER4_B_V2_V3 = 5351
    Feature_isGCN | 0, // IMAGE_GATHER4_B_V2_V4 = 5352
    Feature_isGCN | 0, // IMAGE_GATHER4_B_V4_V2 = 5353
    Feature_isGCN | 0, // IMAGE_GATHER4_B_V4_V3 = 5354
    Feature_isGCN | 0, // IMAGE_GATHER4_B_V4_V4 = 5355
    Feature_isGCN | 0, // IMAGE_GATHER4_B_V8_V2 = 5356
    Feature_isGCN | 0, // IMAGE_GATHER4_B_V8_V3 = 5357
    Feature_isGCN | 0, // IMAGE_GATHER4_B_V8_V4 = 5358
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_O_V2_V2 = 5359
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_O_V2_V3 = 5360
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_O_V2_V4 = 5361
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_O_V2_V8 = 5362
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_O_V4_V2 = 5363
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_O_V4_V3 = 5364
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_O_V4_V4 = 5365
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_O_V4_V8 = 5366
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_O_V8_V2 = 5367
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_O_V8_V3 = 5368
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_O_V8_V4 = 5369
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_O_V8_V8 = 5370
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_V2_V1 = 5371
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_V2_V2 = 5372
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_V2_V3 = 5373
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_V2_V4 = 5374
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_V4_V1 = 5375
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_V4_V2 = 5376
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_V4_V3 = 5377
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_V4_V4 = 5378
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_V8_V1 = 5379
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_V8_V2 = 5380
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_V8_V3 = 5381
    Feature_isGCN | 0, // IMAGE_GATHER4_CL_V8_V4 = 5382
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_O_V2_V4 = 5383
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_O_V2_V8 = 5384
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_O_V4_V4 = 5385
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_O_V4_V8 = 5386
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_O_V8_V4 = 5387
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_O_V8_V8 = 5388
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_V2_V3 = 5389
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_V2_V4 = 5390
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_V2_V8 = 5391
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_V4_V3 = 5392
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_V4_V4 = 5393
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_V4_V8 = 5394
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_V8_V3 = 5395
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_V8_V4 = 5396
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_CL_V8_V8 = 5397
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_O_V2_V4 = 5398
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_O_V2_V8 = 5399
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_O_V4_V4 = 5400
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_O_V4_V8 = 5401
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_O_V8_V4 = 5402
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_O_V8_V8 = 5403
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_V2_V3 = 5404
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_V2_V4 = 5405
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_V2_V8 = 5406
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_V4_V3 = 5407
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_V4_V4 = 5408
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_V4_V8 = 5409
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_V8_V3 = 5410
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_V8_V4 = 5411
    Feature_isGCN | 0, // IMAGE_GATHER4_C_B_V8_V8 = 5412
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_O_V2_V3 = 5413
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_O_V2_V4 = 5414
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_O_V2_V8 = 5415
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_O_V4_V3 = 5416
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_O_V4_V4 = 5417
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_O_V4_V8 = 5418
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_O_V8_V3 = 5419
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_O_V8_V4 = 5420
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_O_V8_V8 = 5421
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_V2_V2 = 5422
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_V2_V3 = 5423
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_V2_V4 = 5424
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_V2_V8 = 5425
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_V4_V2 = 5426
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_V4_V3 = 5427
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_V4_V4 = 5428
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_V4_V8 = 5429
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_V8_V2 = 5430
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_V8_V3 = 5431
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_V8_V4 = 5432
    Feature_isGCN | 0, // IMAGE_GATHER4_C_CL_V8_V8 = 5433
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_O_V2_V3 = 5434
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_O_V2_V4 = 5435
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_O_V2_V8 = 5436
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_O_V4_V3 = 5437
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_O_V4_V4 = 5438
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_O_V4_V8 = 5439
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_O_V8_V3 = 5440
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_O_V8_V4 = 5441
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_O_V8_V8 = 5442
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_V2_V2 = 5443
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_V2_V3 = 5444
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_V2_V4 = 5445
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_V4_V2 = 5446
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_V4_V3 = 5447
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_V4_V4 = 5448
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_V8_V2 = 5449
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_V8_V3 = 5450
    Feature_isGCN | 0, // IMAGE_GATHER4_C_LZ_V8_V4 = 5451
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_O_V2_V3 = 5452
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_O_V2_V4 = 5453
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_O_V2_V8 = 5454
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_O_V4_V3 = 5455
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_O_V4_V4 = 5456
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_O_V4_V8 = 5457
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_O_V8_V3 = 5458
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_O_V8_V4 = 5459
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_O_V8_V8 = 5460
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_V2_V2 = 5461
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_V2_V3 = 5462
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_V2_V4 = 5463
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_V2_V8 = 5464
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_V4_V2 = 5465
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_V4_V3 = 5466
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_V4_V4 = 5467
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_V4_V8 = 5468
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_V8_V2 = 5469
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_V8_V3 = 5470
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_V8_V4 = 5471
    Feature_isGCN | 0, // IMAGE_GATHER4_C_L_V8_V8 = 5472
    Feature_isGCN | 0, // IMAGE_GATHER4_C_O_V2_V3 = 5473
    Feature_isGCN | 0, // IMAGE_GATHER4_C_O_V2_V4 = 5474
    Feature_isGCN | 0, // IMAGE_GATHER4_C_O_V2_V8 = 5475
    Feature_isGCN | 0, // IMAGE_GATHER4_C_O_V4_V3 = 5476
    Feature_isGCN | 0, // IMAGE_GATHER4_C_O_V4_V4 = 5477
    Feature_isGCN | 0, // IMAGE_GATHER4_C_O_V4_V8 = 5478
    Feature_isGCN | 0, // IMAGE_GATHER4_C_O_V8_V3 = 5479
    Feature_isGCN | 0, // IMAGE_GATHER4_C_O_V8_V4 = 5480
    Feature_isGCN | 0, // IMAGE_GATHER4_C_O_V8_V8 = 5481
    Feature_isGCN | 0, // IMAGE_GATHER4_C_V2_V2 = 5482
    Feature_isGCN | 0, // IMAGE_GATHER4_C_V2_V3 = 5483
    Feature_isGCN | 0, // IMAGE_GATHER4_C_V2_V4 = 5484
    Feature_isGCN | 0, // IMAGE_GATHER4_C_V4_V2 = 5485
    Feature_isGCN | 0, // IMAGE_GATHER4_C_V4_V3 = 5486
    Feature_isGCN | 0, // IMAGE_GATHER4_C_V4_V4 = 5487
    Feature_isGCN | 0, // IMAGE_GATHER4_C_V8_V2 = 5488
    Feature_isGCN | 0, // IMAGE_GATHER4_C_V8_V3 = 5489
    Feature_isGCN | 0, // IMAGE_GATHER4_C_V8_V4 = 5490
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_O_V2_V2 = 5491
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_O_V2_V3 = 5492
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_O_V2_V4 = 5493
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_O_V4_V2 = 5494
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_O_V4_V3 = 5495
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_O_V4_V4 = 5496
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_O_V8_V2 = 5497
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_O_V8_V3 = 5498
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_O_V8_V4 = 5499
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_V2_V1 = 5500
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_V2_V2 = 5501
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_V2_V3 = 5502
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_V2_V4 = 5503
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_V4_V1 = 5504
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_V4_V2 = 5505
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_V4_V3 = 5506
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_V4_V4 = 5507
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_V8_V1 = 5508
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_V8_V2 = 5509
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_V8_V3 = 5510
    Feature_isGCN | 0, // IMAGE_GATHER4_LZ_V8_V4 = 5511
    Feature_isGCN | 0, // IMAGE_GATHER4_L_O_V2_V2 = 5512
    Feature_isGCN | 0, // IMAGE_GATHER4_L_O_V2_V3 = 5513
    Feature_isGCN | 0, // IMAGE_GATHER4_L_O_V2_V4 = 5514
    Feature_isGCN | 0, // IMAGE_GATHER4_L_O_V2_V8 = 5515
    Feature_isGCN | 0, // IMAGE_GATHER4_L_O_V4_V2 = 5516
    Feature_isGCN | 0, // IMAGE_GATHER4_L_O_V4_V3 = 5517
    Feature_isGCN | 0, // IMAGE_GATHER4_L_O_V4_V4 = 5518
    Feature_isGCN | 0, // IMAGE_GATHER4_L_O_V4_V8 = 5519
    Feature_isGCN | 0, // IMAGE_GATHER4_L_O_V8_V2 = 5520
    Feature_isGCN | 0, // IMAGE_GATHER4_L_O_V8_V3 = 5521
    Feature_isGCN | 0, // IMAGE_GATHER4_L_O_V8_V4 = 5522
    Feature_isGCN | 0, // IMAGE_GATHER4_L_O_V8_V8 = 5523
    Feature_isGCN | 0, // IMAGE_GATHER4_L_V2_V1 = 5524
    Feature_isGCN | 0, // IMAGE_GATHER4_L_V2_V2 = 5525
    Feature_isGCN | 0, // IMAGE_GATHER4_L_V2_V3 = 5526
    Feature_isGCN | 0, // IMAGE_GATHER4_L_V2_V4 = 5527
    Feature_isGCN | 0, // IMAGE_GATHER4_L_V4_V1 = 5528
    Feature_isGCN | 0, // IMAGE_GATHER4_L_V4_V2 = 5529
    Feature_isGCN | 0, // IMAGE_GATHER4_L_V4_V3 = 5530
    Feature_isGCN | 0, // IMAGE_GATHER4_L_V4_V4 = 5531
    Feature_isGCN | 0, // IMAGE_GATHER4_L_V8_V1 = 5532
    Feature_isGCN | 0, // IMAGE_GATHER4_L_V8_V2 = 5533
    Feature_isGCN | 0, // IMAGE_GATHER4_L_V8_V3 = 5534
    Feature_isGCN | 0, // IMAGE_GATHER4_L_V8_V4 = 5535
    Feature_isGCN | 0, // IMAGE_GATHER4_O_V2_V2 = 5536
    Feature_isGCN | 0, // IMAGE_GATHER4_O_V2_V3 = 5537
    Feature_isGCN | 0, // IMAGE_GATHER4_O_V2_V4 = 5538
    Feature_isGCN | 0, // IMAGE_GATHER4_O_V4_V2 = 5539
    Feature_isGCN | 0, // IMAGE_GATHER4_O_V4_V3 = 5540
    Feature_isGCN | 0, // IMAGE_GATHER4_O_V4_V4 = 5541
    Feature_isGCN | 0, // IMAGE_GATHER4_O_V8_V2 = 5542
    Feature_isGCN | 0, // IMAGE_GATHER4_O_V8_V3 = 5543
    Feature_isGCN | 0, // IMAGE_GATHER4_O_V8_V4 = 5544
    Feature_isGCN | 0, // IMAGE_GATHER4_V2_V1 = 5545
    Feature_isGCN | 0, // IMAGE_GATHER4_V2_V2 = 5546
    Feature_isGCN | 0, // IMAGE_GATHER4_V2_V3 = 5547
    Feature_isGCN | 0, // IMAGE_GATHER4_V2_V4 = 5548
    Feature_isGCN | 0, // IMAGE_GATHER4_V4_V1 = 5549
    Feature_isGCN | 0, // IMAGE_GATHER4_V4_V2 = 5550
    Feature_isGCN | 0, // IMAGE_GATHER4_V4_V3 = 5551
    Feature_isGCN | 0, // IMAGE_GATHER4_V4_V4 = 5552
    Feature_isGCN | 0, // IMAGE_GATHER4_V8_V1 = 5553
    Feature_isGCN | 0, // IMAGE_GATHER4_V8_V2 = 5554
    Feature_isGCN | 0, // IMAGE_GATHER4_V8_V3 = 5555
    Feature_isGCN | 0, // IMAGE_GATHER4_V8_V4 = 5556
    Feature_isGCN | 0, // IMAGE_GET_LOD_V1_V1 = 5557
    Feature_isGCN | 0, // IMAGE_GET_LOD_V1_V2 = 5558
    Feature_isGCN | 0, // IMAGE_GET_LOD_V1_V3 = 5559
    Feature_isGCN | 0, // IMAGE_GET_LOD_V1_V4 = 5560
    Feature_isGCN | 0, // IMAGE_GET_LOD_V2_V1 = 5561
    Feature_isGCN | 0, // IMAGE_GET_LOD_V2_V2 = 5562
    Feature_isGCN | 0, // IMAGE_GET_LOD_V2_V3 = 5563
    Feature_isGCN | 0, // IMAGE_GET_LOD_V2_V4 = 5564
    Feature_isGCN | 0, // IMAGE_GET_LOD_V3_V1 = 5565
    Feature_isGCN | 0, // IMAGE_GET_LOD_V3_V2 = 5566
    Feature_isGCN | 0, // IMAGE_GET_LOD_V3_V3 = 5567
    Feature_isGCN | 0, // IMAGE_GET_LOD_V3_V4 = 5568
    Feature_isGCN | 0, // IMAGE_GET_LOD_V4_V1 = 5569
    Feature_isGCN | 0, // IMAGE_GET_LOD_V4_V2 = 5570
    Feature_isGCN | 0, // IMAGE_GET_LOD_V4_V3 = 5571
    Feature_isGCN | 0, // IMAGE_GET_LOD_V4_V4 = 5572
    Feature_isGCN | 0, // IMAGE_GET_LOD_V8_V1 = 5573
    Feature_isGCN | 0, // IMAGE_GET_LOD_V8_V2 = 5574
    Feature_isGCN | 0, // IMAGE_GET_LOD_V8_V3 = 5575
    Feature_isGCN | 0, // IMAGE_GET_LOD_V8_V4 = 5576
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V1_V1 = 5577
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V1_V2 = 5578
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V1_V3 = 5579
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V1_V4 = 5580
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V2_V1 = 5581
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V2_V2 = 5582
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V2_V3 = 5583
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V2_V4 = 5584
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V3_V1 = 5585
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V3_V2 = 5586
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V3_V3 = 5587
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V3_V4 = 5588
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V4_V1 = 5589
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V4_V2 = 5590
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V4_V3 = 5591
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V4_V4 = 5592
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V8_V1 = 5593
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V8_V2 = 5594
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V8_V3 = 5595
    Feature_isGCN | 0, // IMAGE_GET_RESINFO_V8_V4 = 5596
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V1_V1 = 5597
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V1_V2 = 5598
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V1_V3 = 5599
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V1_V4 = 5600
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V2_V1 = 5601
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V2_V2 = 5602
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V2_V3 = 5603
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V2_V4 = 5604
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V3_V1 = 5605
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V3_V2 = 5606
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V3_V3 = 5607
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V3_V4 = 5608
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V4_V1 = 5609
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V4_V2 = 5610
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V4_V3 = 5611
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V4_V4 = 5612
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V8_V1 = 5613
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V8_V2 = 5614
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V8_V3 = 5615
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_SGN_V8_V4 = 5616
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V1_V1 = 5617
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V1_V2 = 5618
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V1_V3 = 5619
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V1_V4 = 5620
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V2_V1 = 5621
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V2_V2 = 5622
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V2_V3 = 5623
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V2_V4 = 5624
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V3_V1 = 5625
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V3_V2 = 5626
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V3_V3 = 5627
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V3_V4 = 5628
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V4_V1 = 5629
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V4_V2 = 5630
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V4_V3 = 5631
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V4_V4 = 5632
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V8_V1 = 5633
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V8_V2 = 5634
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V8_V3 = 5635
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_PCK_V8_V4 = 5636
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V1_V1 = 5637
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V1_V2 = 5638
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V1_V3 = 5639
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V1_V4 = 5640
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V2_V1 = 5641
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V2_V2 = 5642
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V2_V3 = 5643
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V2_V4 = 5644
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V3_V1 = 5645
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V3_V2 = 5646
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V3_V3 = 5647
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V3_V4 = 5648
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V4_V1 = 5649
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V4_V2 = 5650
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V4_V3 = 5651
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V4_V4 = 5652
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V8_V1 = 5653
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V8_V2 = 5654
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V8_V3 = 5655
    Feature_isGCN | 0, // IMAGE_LOAD_MIP_V8_V4 = 5656
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V1_V1 = 5657
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V1_V2 = 5658
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V1_V3 = 5659
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V1_V4 = 5660
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V2_V1 = 5661
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V2_V2 = 5662
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V2_V3 = 5663
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V2_V4 = 5664
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V3_V1 = 5665
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V3_V2 = 5666
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V3_V3 = 5667
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V3_V4 = 5668
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V4_V1 = 5669
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V4_V2 = 5670
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V4_V3 = 5671
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V4_V4 = 5672
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V8_V1 = 5673
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V8_V2 = 5674
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V8_V3 = 5675
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_SGN_V8_V4 = 5676
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V1_V1 = 5677
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V1_V2 = 5678
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V1_V3 = 5679
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V1_V4 = 5680
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V2_V1 = 5681
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V2_V2 = 5682
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V2_V3 = 5683
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V2_V4 = 5684
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V3_V1 = 5685
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V3_V2 = 5686
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V3_V3 = 5687
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V3_V4 = 5688
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V4_V1 = 5689
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V4_V2 = 5690
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V4_V3 = 5691
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V4_V4 = 5692
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V8_V1 = 5693
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V8_V2 = 5694
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V8_V3 = 5695
    Feature_isGCN | 0, // IMAGE_LOAD_PCK_V8_V4 = 5696
    Feature_isGCN | 0, // IMAGE_LOAD_V1_V1 = 5697
    Feature_isGCN | 0, // IMAGE_LOAD_V1_V2 = 5698
    Feature_isGCN | 0, // IMAGE_LOAD_V1_V3 = 5699
    Feature_isGCN | 0, // IMAGE_LOAD_V1_V4 = 5700
    Feature_isGCN | 0, // IMAGE_LOAD_V2_V1 = 5701
    Feature_isGCN | 0, // IMAGE_LOAD_V2_V2 = 5702
    Feature_isGCN | 0, // IMAGE_LOAD_V2_V3 = 5703
    Feature_isGCN | 0, // IMAGE_LOAD_V2_V4 = 5704
    Feature_isGCN | 0, // IMAGE_LOAD_V3_V1 = 5705
    Feature_isGCN | 0, // IMAGE_LOAD_V3_V2 = 5706
    Feature_isGCN | 0, // IMAGE_LOAD_V3_V3 = 5707
    Feature_isGCN | 0, // IMAGE_LOAD_V3_V4 = 5708
    Feature_isGCN | 0, // IMAGE_LOAD_V4_V1 = 5709
    Feature_isGCN | 0, // IMAGE_LOAD_V4_V2 = 5710
    Feature_isGCN | 0, // IMAGE_LOAD_V4_V3 = 5711
    Feature_isGCN | 0, // IMAGE_LOAD_V4_V4 = 5712
    Feature_isGCN | 0, // IMAGE_LOAD_V8_V1 = 5713
    Feature_isGCN | 0, // IMAGE_LOAD_V8_V2 = 5714
    Feature_isGCN | 0, // IMAGE_LOAD_V8_V3 = 5715
    Feature_isGCN | 0, // IMAGE_LOAD_V8_V4 = 5716
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V1_V3 = 5717
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V1_V4 = 5718
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V1_V8 = 5719
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V2_V3 = 5720
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V2_V4 = 5721
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V2_V8 = 5722
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V3_V3 = 5723
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V3_V4 = 5724
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V3_V8 = 5725
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V4_V3 = 5726
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V4_V4 = 5727
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V4_V8 = 5728
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V8_V3 = 5729
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V8_V4 = 5730
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_O_V8_V8 = 5731
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V1_V2 = 5732
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V1_V3 = 5733
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V1_V4 = 5734
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V1_V8 = 5735
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V2_V2 = 5736
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V2_V3 = 5737
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V2_V4 = 5738
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V2_V8 = 5739
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V3_V2 = 5740
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V3_V3 = 5741
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V3_V4 = 5742
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V3_V8 = 5743
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V4_V2 = 5744
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V4_V3 = 5745
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V4_V4 = 5746
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V4_V8 = 5747
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V8_V2 = 5748
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V8_V3 = 5749
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V8_V4 = 5750
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_CL_V8_V8 = 5751
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V1_V3 = 5752
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V1_V4 = 5753
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V1_V8 = 5754
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V2_V3 = 5755
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V2_V4 = 5756
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V2_V8 = 5757
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V3_V3 = 5758
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V3_V4 = 5759
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V3_V8 = 5760
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V4_V3 = 5761
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V4_V4 = 5762
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V4_V8 = 5763
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V8_V3 = 5764
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V8_V4 = 5765
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_O_V8_V8 = 5766
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V1_V2 = 5767
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V1_V3 = 5768
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V1_V4 = 5769
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V2_V2 = 5770
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V2_V3 = 5771
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V2_V4 = 5772
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V3_V2 = 5773
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V3_V3 = 5774
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V3_V4 = 5775
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V4_V2 = 5776
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V4_V3 = 5777
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V4_V4 = 5778
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V8_V2 = 5779
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V8_V3 = 5780
    Feature_isGCN | 0, // IMAGE_SAMPLE_B_V8_V4 = 5781
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V1_V16 = 5782
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V1_V3 = 5783
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V1_V4 = 5784
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V1_V8 = 5785
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V2_V16 = 5786
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V2_V3 = 5787
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V2_V4 = 5788
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V2_V8 = 5789
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V3_V16 = 5790
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V3_V3 = 5791
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V3_V4 = 5792
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V3_V8 = 5793
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V4_V16 = 5794
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V4_V3 = 5795
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V4_V4 = 5796
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V4_V8 = 5797
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V8_V16 = 5798
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V8_V3 = 5799
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V8_V4 = 5800
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_O_V8_V8 = 5801
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V1_V16 = 5802
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V1_V2 = 5803
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V1_V3 = 5804
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V1_V4 = 5805
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V1_V8 = 5806
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V2_V16 = 5807
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V2_V2 = 5808
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V2_V3 = 5809
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V2_V4 = 5810
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V2_V8 = 5811
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V3_V16 = 5812
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V3_V2 = 5813
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V3_V3 = 5814
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V3_V4 = 5815
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V3_V8 = 5816
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V4_V16 = 5817
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V4_V2 = 5818
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V4_V3 = 5819
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V4_V4 = 5820
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V4_V8 = 5821
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V8_V16 = 5822
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V8_V2 = 5823
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V8_V3 = 5824
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V8_V4 = 5825
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_CL_V8_V8 = 5826
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V1_V16 = 5827
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V1_V3 = 5828
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V1_V4 = 5829
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V1_V8 = 5830
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V2_V16 = 5831
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V2_V3 = 5832
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V2_V4 = 5833
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V2_V8 = 5834
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V3_V16 = 5835
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V3_V3 = 5836
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V3_V4 = 5837
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V3_V8 = 5838
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V4_V16 = 5839
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V4_V3 = 5840
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V4_V4 = 5841
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V4_V8 = 5842
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V8_V16 = 5843
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V8_V3 = 5844
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V8_V4 = 5845
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_O_V8_V8 = 5846
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V1_V16 = 5847
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V1_V2 = 5848
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V1_V3 = 5849
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V1_V4 = 5850
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V1_V8 = 5851
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V2_V16 = 5852
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V2_V2 = 5853
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V2_V3 = 5854
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V2_V4 = 5855
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V2_V8 = 5856
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V3_V16 = 5857
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V3_V2 = 5858
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V3_V3 = 5859
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V3_V4 = 5860
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V3_V8 = 5861
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V4_V16 = 5862
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V4_V2 = 5863
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V4_V3 = 5864
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V4_V4 = 5865
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V4_V8 = 5866
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V8_V16 = 5867
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V8_V2 = 5868
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V8_V3 = 5869
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V8_V4 = 5870
    Feature_isGCN | 0, // IMAGE_SAMPLE_CD_V8_V8 = 5871
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V1_V2 = 5872
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V1_V3 = 5873
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V1_V4 = 5874
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V1_V8 = 5875
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V2_V2 = 5876
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V2_V3 = 5877
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V2_V4 = 5878
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V2_V8 = 5879
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V3_V2 = 5880
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V3_V3 = 5881
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V3_V4 = 5882
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V3_V8 = 5883
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V4_V2 = 5884
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V4_V3 = 5885
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V4_V4 = 5886
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V4_V8 = 5887
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V8_V2 = 5888
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V8_V3 = 5889
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V8_V4 = 5890
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_O_V8_V8 = 5891
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V1_V1 = 5892
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V1_V2 = 5893
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V1_V3 = 5894
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V1_V4 = 5895
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V2_V1 = 5896
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V2_V2 = 5897
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V2_V3 = 5898
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V2_V4 = 5899
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V3_V1 = 5900
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V3_V2 = 5901
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V3_V3 = 5902
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V3_V4 = 5903
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V4_V1 = 5904
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V4_V2 = 5905
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V4_V3 = 5906
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V4_V4 = 5907
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V8_V1 = 5908
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V8_V2 = 5909
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V8_V3 = 5910
    Feature_isGCN | 0, // IMAGE_SAMPLE_CL_V8_V4 = 5911
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_O_V1_V4 = 5912
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_O_V1_V8 = 5913
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_O_V2_V4 = 5914
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_O_V2_V8 = 5915
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_O_V3_V4 = 5916
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_O_V3_V8 = 5917
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_O_V4_V4 = 5918
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_O_V4_V8 = 5919
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_O_V8_V4 = 5920
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_O_V8_V8 = 5921
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V1_V3 = 5922
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V1_V4 = 5923
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V1_V8 = 5924
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V2_V3 = 5925
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V2_V4 = 5926
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V2_V8 = 5927
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V3_V3 = 5928
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V3_V4 = 5929
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V3_V8 = 5930
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V4_V3 = 5931
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V4_V4 = 5932
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V4_V8 = 5933
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V8_V3 = 5934
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V8_V4 = 5935
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_CL_V8_V8 = 5936
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_O_V1_V4 = 5937
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_O_V1_V8 = 5938
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_O_V2_V4 = 5939
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_O_V2_V8 = 5940
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_O_V3_V4 = 5941
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_O_V3_V8 = 5942
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_O_V4_V4 = 5943
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_O_V4_V8 = 5944
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_O_V8_V4 = 5945
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_O_V8_V8 = 5946
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V1_V3 = 5947
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V1_V4 = 5948
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V1_V8 = 5949
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V2_V3 = 5950
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V2_V4 = 5951
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V2_V8 = 5952
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V3_V3 = 5953
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V3_V4 = 5954
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V3_V8 = 5955
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V4_V3 = 5956
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V4_V4 = 5957
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V4_V8 = 5958
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V8_V3 = 5959
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V8_V4 = 5960
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_B_V8_V8 = 5961
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V1_V16 = 5962
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V1_V4 = 5963
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V1_V8 = 5964
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V2_V16 = 5965
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V2_V4 = 5966
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V2_V8 = 5967
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V3_V16 = 5968
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V3_V4 = 5969
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V3_V8 = 5970
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V4_V16 = 5971
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V4_V4 = 5972
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V4_V8 = 5973
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V8_V16 = 5974
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V8_V4 = 5975
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_O_V8_V8 = 5976
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V1_V16 = 5977
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V1_V3 = 5978
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V1_V4 = 5979
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V1_V8 = 5980
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V2_V16 = 5981
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V2_V3 = 5982
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V2_V4 = 5983
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V2_V8 = 5984
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V3_V16 = 5985
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V3_V3 = 5986
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V3_V4 = 5987
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V3_V8 = 5988
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V4_V16 = 5989
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V4_V3 = 5990
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V4_V4 = 5991
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V4_V8 = 5992
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V8_V16 = 5993
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V8_V3 = 5994
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V8_V4 = 5995
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_CL_V8_V8 = 5996
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V1_V16 = 5997
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V1_V4 = 5998
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V1_V8 = 5999
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V2_V16 = 6000
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V2_V4 = 6001
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V2_V8 = 6002
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V3_V16 = 6003
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V3_V4 = 6004
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V3_V8 = 6005
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V4_V16 = 6006
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V4_V4 = 6007
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V4_V8 = 6008
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V8_V16 = 6009
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V8_V4 = 6010
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_O_V8_V8 = 6011
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V1_V16 = 6012
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V1_V3 = 6013
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V1_V4 = 6014
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V1_V8 = 6015
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V2_V16 = 6016
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V2_V3 = 6017
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V2_V4 = 6018
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V2_V8 = 6019
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V3_V16 = 6020
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V3_V3 = 6021
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V3_V4 = 6022
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V3_V8 = 6023
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V4_V16 = 6024
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V4_V3 = 6025
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V4_V4 = 6026
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V4_V8 = 6027
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V8_V16 = 6028
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V8_V3 = 6029
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V8_V4 = 6030
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CD_V8_V8 = 6031
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V1_V3 = 6032
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V1_V4 = 6033
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V1_V8 = 6034
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V2_V3 = 6035
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V2_V4 = 6036
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V2_V8 = 6037
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V3_V3 = 6038
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V3_V4 = 6039
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V3_V8 = 6040
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V4_V3 = 6041
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V4_V4 = 6042
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V4_V8 = 6043
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V8_V3 = 6044
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V8_V4 = 6045
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_O_V8_V8 = 6046
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V1_V2 = 6047
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V1_V3 = 6048
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V1_V4 = 6049
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V1_V8 = 6050
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V2_V2 = 6051
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V2_V3 = 6052
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V2_V4 = 6053
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V2_V8 = 6054
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V3_V2 = 6055
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V3_V3 = 6056
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V3_V4 = 6057
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V3_V8 = 6058
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V4_V2 = 6059
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V4_V3 = 6060
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V4_V4 = 6061
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V4_V8 = 6062
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V8_V2 = 6063
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V8_V3 = 6064
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V8_V4 = 6065
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_CL_V8_V8 = 6066
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V1_V16 = 6067
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V1_V4 = 6068
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V1_V8 = 6069
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V2_V16 = 6070
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V2_V4 = 6071
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V2_V8 = 6072
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V3_V16 = 6073
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V3_V4 = 6074
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V3_V8 = 6075
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V4_V16 = 6076
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V4_V4 = 6077
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V4_V8 = 6078
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V8_V16 = 6079
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V8_V4 = 6080
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_O_V8_V8 = 6081
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V1_V16 = 6082
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V1_V3 = 6083
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V1_V4 = 6084
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V1_V8 = 6085
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V2_V16 = 6086
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V2_V3 = 6087
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V2_V4 = 6088
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V2_V8 = 6089
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V3_V16 = 6090
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V3_V3 = 6091
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V3_V4 = 6092
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V3_V8 = 6093
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V4_V16 = 6094
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V4_V3 = 6095
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V4_V4 = 6096
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V4_V8 = 6097
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V8_V16 = 6098
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V8_V3 = 6099
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V8_V4 = 6100
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_CL_V8_V8 = 6101
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V1_V16 = 6102
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V1_V4 = 6103
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V1_V8 = 6104
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V2_V16 = 6105
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V2_V4 = 6106
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V2_V8 = 6107
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V3_V16 = 6108
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V3_V4 = 6109
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V3_V8 = 6110
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V4_V16 = 6111
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V4_V4 = 6112
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V4_V8 = 6113
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V8_V16 = 6114
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V8_V4 = 6115
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_O_V8_V8 = 6116
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V1_V16 = 6117
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V1_V3 = 6118
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V1_V4 = 6119
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V1_V8 = 6120
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V2_V16 = 6121
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V2_V3 = 6122
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V2_V4 = 6123
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V2_V8 = 6124
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V3_V16 = 6125
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V3_V3 = 6126
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V3_V4 = 6127
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V3_V8 = 6128
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V4_V16 = 6129
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V4_V3 = 6130
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V4_V4 = 6131
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V4_V8 = 6132
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V8_V16 = 6133
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V8_V3 = 6134
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V8_V4 = 6135
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_D_V8_V8 = 6136
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V1_V3 = 6137
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V1_V4 = 6138
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V1_V8 = 6139
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V2_V3 = 6140
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V2_V4 = 6141
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V2_V8 = 6142
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V3_V3 = 6143
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V3_V4 = 6144
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V3_V8 = 6145
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V4_V3 = 6146
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V4_V4 = 6147
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V4_V8 = 6148
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V8_V3 = 6149
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V8_V4 = 6150
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_O_V8_V8 = 6151
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V1_V2 = 6152
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V1_V3 = 6153
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V1_V4 = 6154
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V2_V2 = 6155
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V2_V3 = 6156
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V2_V4 = 6157
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V3_V2 = 6158
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V3_V3 = 6159
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V3_V4 = 6160
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V4_V2 = 6161
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V4_V3 = 6162
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V4_V4 = 6163
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V8_V2 = 6164
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V8_V3 = 6165
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_LZ_V8_V4 = 6166
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V1_V3 = 6167
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V1_V4 = 6168
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V1_V8 = 6169
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V2_V3 = 6170
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V2_V4 = 6171
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V2_V8 = 6172
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V3_V3 = 6173
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V3_V4 = 6174
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V3_V8 = 6175
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V4_V3 = 6176
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V4_V4 = 6177
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V4_V8 = 6178
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V8_V3 = 6179
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V8_V4 = 6180
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_O_V8_V8 = 6181
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V1_V2 = 6182
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V1_V3 = 6183
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V1_V4 = 6184
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V1_V8 = 6185
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V2_V2 = 6186
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V2_V3 = 6187
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V2_V4 = 6188
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V2_V8 = 6189
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V3_V2 = 6190
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V3_V3 = 6191
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V3_V4 = 6192
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V3_V8 = 6193
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V4_V2 = 6194
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V4_V3 = 6195
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V4_V4 = 6196
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V4_V8 = 6197
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V8_V2 = 6198
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V8_V3 = 6199
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V8_V4 = 6200
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_L_V8_V8 = 6201
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V1_V3 = 6202
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V1_V4 = 6203
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V1_V8 = 6204
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V2_V3 = 6205
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V2_V4 = 6206
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V2_V8 = 6207
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V3_V3 = 6208
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V3_V4 = 6209
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V3_V8 = 6210
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V4_V3 = 6211
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V4_V4 = 6212
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V4_V8 = 6213
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V8_V3 = 6214
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V8_V4 = 6215
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_O_V8_V8 = 6216
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V1_V2 = 6217
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V1_V3 = 6218
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V1_V4 = 6219
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V2_V2 = 6220
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V2_V3 = 6221
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V2_V4 = 6222
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V3_V2 = 6223
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V3_V3 = 6224
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V3_V4 = 6225
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V4_V2 = 6226
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V4_V3 = 6227
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V4_V4 = 6228
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V8_V2 = 6229
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V8_V3 = 6230
    Feature_isGCN | 0, // IMAGE_SAMPLE_C_V8_V4 = 6231
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V1_V16 = 6232
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V1_V3 = 6233
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V1_V4 = 6234
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V1_V8 = 6235
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V2_V16 = 6236
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V2_V3 = 6237
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V2_V4 = 6238
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V2_V8 = 6239
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V3_V16 = 6240
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V3_V3 = 6241
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V3_V4 = 6242
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V3_V8 = 6243
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V4_V16 = 6244
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V4_V3 = 6245
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V4_V4 = 6246
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V4_V8 = 6247
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V8_V16 = 6248
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V8_V3 = 6249
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V8_V4 = 6250
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_O_V8_V8 = 6251
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V1_V16 = 6252
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V1_V2 = 6253
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V1_V3 = 6254
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V1_V4 = 6255
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V1_V8 = 6256
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V2_V16 = 6257
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V2_V2 = 6258
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V2_V3 = 6259
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V2_V4 = 6260
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V2_V8 = 6261
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V3_V16 = 6262
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V3_V2 = 6263
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V3_V3 = 6264
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V3_V4 = 6265
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V3_V8 = 6266
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V4_V16 = 6267
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V4_V2 = 6268
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V4_V3 = 6269
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V4_V4 = 6270
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V4_V8 = 6271
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V8_V16 = 6272
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V8_V2 = 6273
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V8_V3 = 6274
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V8_V4 = 6275
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_CL_V8_V8 = 6276
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V1_V16 = 6277
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V1_V3 = 6278
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V1_V4 = 6279
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V1_V8 = 6280
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V2_V16 = 6281
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V2_V3 = 6282
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V2_V4 = 6283
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V2_V8 = 6284
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V3_V16 = 6285
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V3_V3 = 6286
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V3_V4 = 6287
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V3_V8 = 6288
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V4_V16 = 6289
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V4_V3 = 6290
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V4_V4 = 6291
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V4_V8 = 6292
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V8_V16 = 6293
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V8_V3 = 6294
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V8_V4 = 6295
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_O_V8_V8 = 6296
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V1_V16 = 6297
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V1_V2 = 6298
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V1_V3 = 6299
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V1_V4 = 6300
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V1_V8 = 6301
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V2_V16 = 6302
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V2_V2 = 6303
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V2_V3 = 6304
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V2_V4 = 6305
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V2_V8 = 6306
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V3_V16 = 6307
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V3_V2 = 6308
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V3_V3 = 6309
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V3_V4 = 6310
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V3_V8 = 6311
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V4_V16 = 6312
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V4_V2 = 6313
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V4_V3 = 6314
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V4_V4 = 6315
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V4_V8 = 6316
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V8_V16 = 6317
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V8_V2 = 6318
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V8_V3 = 6319
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V8_V4 = 6320
    Feature_isGCN | 0, // IMAGE_SAMPLE_D_V8_V8 = 6321
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V1_V2 = 6322
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V1_V3 = 6323
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V1_V4 = 6324
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V2_V2 = 6325
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V2_V3 = 6326
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V2_V4 = 6327
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V3_V2 = 6328
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V3_V3 = 6329
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V3_V4 = 6330
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V4_V2 = 6331
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V4_V3 = 6332
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V4_V4 = 6333
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V8_V2 = 6334
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V8_V3 = 6335
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_O_V8_V4 = 6336
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V1_V1 = 6337
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V1_V2 = 6338
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V1_V3 = 6339
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V1_V4 = 6340
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V2_V1 = 6341
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V2_V2 = 6342
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V2_V3 = 6343
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V2_V4 = 6344
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V3_V1 = 6345
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V3_V2 = 6346
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V3_V3 = 6347
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V3_V4 = 6348
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V4_V1 = 6349
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V4_V2 = 6350
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V4_V3 = 6351
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V4_V4 = 6352
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V8_V1 = 6353
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V8_V2 = 6354
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V8_V3 = 6355
    Feature_isGCN | 0, // IMAGE_SAMPLE_LZ_V8_V4 = 6356
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V1_V2 = 6357
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V1_V3 = 6358
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V1_V4 = 6359
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V1_V8 = 6360
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V2_V2 = 6361
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V2_V3 = 6362
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V2_V4 = 6363
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V2_V8 = 6364
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V3_V2 = 6365
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V3_V3 = 6366
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V3_V4 = 6367
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V3_V8 = 6368
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V4_V2 = 6369
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V4_V3 = 6370
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V4_V4 = 6371
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V4_V8 = 6372
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V8_V2 = 6373
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V8_V3 = 6374
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V8_V4 = 6375
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_O_V8_V8 = 6376
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V1_V1 = 6377
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V1_V2 = 6378
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V1_V3 = 6379
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V1_V4 = 6380
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V2_V1 = 6381
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V2_V2 = 6382
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V2_V3 = 6383
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V2_V4 = 6384
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V3_V1 = 6385
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V3_V2 = 6386
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V3_V3 = 6387
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V3_V4 = 6388
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V4_V1 = 6389
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V4_V2 = 6390
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V4_V3 = 6391
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V4_V4 = 6392
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V8_V1 = 6393
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V8_V2 = 6394
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V8_V3 = 6395
    Feature_isGCN | 0, // IMAGE_SAMPLE_L_V8_V4 = 6396
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V1_V2 = 6397
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V1_V3 = 6398
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V1_V4 = 6399
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V2_V2 = 6400
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V2_V3 = 6401
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V2_V4 = 6402
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V3_V2 = 6403
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V3_V3 = 6404
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V3_V4 = 6405
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V4_V2 = 6406
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V4_V3 = 6407
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V4_V4 = 6408
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V8_V2 = 6409
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V8_V3 = 6410
    Feature_isGCN | 0, // IMAGE_SAMPLE_O_V8_V4 = 6411
    Feature_isGCN | 0, // IMAGE_SAMPLE_V1_V1 = 6412
    Feature_isGCN | 0, // IMAGE_SAMPLE_V1_V2 = 6413
    Feature_isGCN | 0, // IMAGE_SAMPLE_V1_V3 = 6414
    Feature_isGCN | 0, // IMAGE_SAMPLE_V1_V4 = 6415
    Feature_isGCN | 0, // IMAGE_SAMPLE_V2_V1 = 6416
    Feature_isGCN | 0, // IMAGE_SAMPLE_V2_V2 = 6417
    Feature_isGCN | 0, // IMAGE_SAMPLE_V2_V3 = 6418
    Feature_isGCN | 0, // IMAGE_SAMPLE_V2_V4 = 6419
    Feature_isGCN | 0, // IMAGE_SAMPLE_V3_V1 = 6420
    Feature_isGCN | 0, // IMAGE_SAMPLE_V3_V2 = 6421
    Feature_isGCN | 0, // IMAGE_SAMPLE_V3_V3 = 6422
    Feature_isGCN | 0, // IMAGE_SAMPLE_V3_V4 = 6423
    Feature_isGCN | 0, // IMAGE_SAMPLE_V4_V1 = 6424
    Feature_isGCN | 0, // IMAGE_SAMPLE_V4_V2 = 6425
    Feature_isGCN | 0, // IMAGE_SAMPLE_V4_V3 = 6426
    Feature_isGCN | 0, // IMAGE_SAMPLE_V4_V4 = 6427
    Feature_isGCN | 0, // IMAGE_SAMPLE_V8_V1 = 6428
    Feature_isGCN | 0, // IMAGE_SAMPLE_V8_V2 = 6429
    Feature_isGCN | 0, // IMAGE_SAMPLE_V8_V3 = 6430
    Feature_isGCN | 0, // IMAGE_SAMPLE_V8_V4 = 6431
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V1_V1 = 6432
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V1_V2 = 6433
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V1_V3 = 6434
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V1_V4 = 6435
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V2_V1 = 6436
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V2_V2 = 6437
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V2_V3 = 6438
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V2_V4 = 6439
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V3_V1 = 6440
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V3_V2 = 6441
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V3_V3 = 6442
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V3_V4 = 6443
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V4_V1 = 6444
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V4_V2 = 6445
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V4_V3 = 6446
    Feature_isGCN | 0, // IMAGE_STORE_MIP_PCK_V4_V4 = 6447
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V1_V1 = 6448
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V1_V2 = 6449
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V1_V3 = 6450
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V1_V4 = 6451
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V2_V1 = 6452
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V2_V2 = 6453
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V2_V3 = 6454
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V2_V4 = 6455
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V3_V1 = 6456
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V3_V2 = 6457
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V3_V3 = 6458
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V3_V4 = 6459
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V4_V1 = 6460
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V4_V2 = 6461
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V4_V3 = 6462
    Feature_isGCN | 0, // IMAGE_STORE_MIP_V4_V4 = 6463
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V1_V1 = 6464
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V1_V2 = 6465
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V1_V3 = 6466
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V1_V4 = 6467
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V2_V1 = 6468
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V2_V2 = 6469
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V2_V3 = 6470
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V2_V4 = 6471
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V3_V1 = 6472
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V3_V2 = 6473
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V3_V3 = 6474
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V3_V4 = 6475
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V4_V1 = 6476
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V4_V2 = 6477
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V4_V3 = 6478
    Feature_isGCN | 0, // IMAGE_STORE_PCK_V4_V4 = 6479
    Feature_isGCN | 0, // IMAGE_STORE_V1_V1 = 6480
    Feature_isGCN | 0, // IMAGE_STORE_V1_V2 = 6481
    Feature_isGCN | 0, // IMAGE_STORE_V1_V3 = 6482
    Feature_isGCN | 0, // IMAGE_STORE_V1_V4 = 6483
    Feature_isGCN | 0, // IMAGE_STORE_V2_V1 = 6484
    Feature_isGCN | 0, // IMAGE_STORE_V2_V2 = 6485
    Feature_isGCN | 0, // IMAGE_STORE_V2_V3 = 6486
    Feature_isGCN | 0, // IMAGE_STORE_V2_V4 = 6487
    Feature_isGCN | 0, // IMAGE_STORE_V3_V1 = 6488
    Feature_isGCN | 0, // IMAGE_STORE_V3_V2 = 6489
    Feature_isGCN | 0, // IMAGE_STORE_V3_V3 = 6490
    Feature_isGCN | 0, // IMAGE_STORE_V3_V4 = 6491
    Feature_isGCN | 0, // IMAGE_STORE_V4_V1 = 6492
    Feature_isGCN | 0, // IMAGE_STORE_V4_V2 = 6493
    Feature_isGCN | 0, // IMAGE_STORE_V4_V3 = 6494
    Feature_isGCN | 0, // IMAGE_STORE_V4_V4 = 6495
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_DWORDX2_SADDR_vi = 6496
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_DWORDX2_vi = 6497
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_DWORDX3_SADDR_vi = 6498
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_DWORDX3_vi = 6499
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_DWORDX4_SADDR_vi = 6500
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_DWORDX4_vi = 6501
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_DWORD_SADDR_vi = 6502
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_DWORD_vi = 6503
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_SBYTE_D16_HI_SADDR_vi = 6504
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_SBYTE_D16_HI_vi = 6505
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_SBYTE_D16_SADDR_vi = 6506
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_SBYTE_D16_vi = 6507
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_SBYTE_SADDR_vi = 6508
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_SBYTE_vi = 6509
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_SHORT_D16_HI_SADDR_vi = 6510
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_SHORT_D16_HI_vi = 6511
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_SHORT_D16_SADDR_vi = 6512
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_SHORT_D16_vi = 6513
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_SSHORT_SADDR_vi = 6514
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_SSHORT_vi = 6515
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_UBYTE_D16_HI_SADDR_vi = 6516
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_UBYTE_D16_HI_vi = 6517
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_UBYTE_D16_SADDR_vi = 6518
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_UBYTE_D16_vi = 6519
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_UBYTE_SADDR_vi = 6520
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_UBYTE_vi = 6521
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_USHORT_SADDR_vi = 6522
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_LOAD_USHORT_vi = 6523
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_BYTE_D16_HI_SADDR_vi = 6524
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_BYTE_D16_HI_vi = 6525
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_BYTE_SADDR_vi = 6526
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_BYTE_vi = 6527
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_DWORDX2_SADDR_vi = 6528
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_DWORDX2_vi = 6529
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_DWORDX3_SADDR_vi = 6530
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_DWORDX3_vi = 6531
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_DWORDX4_SADDR_vi = 6532
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_DWORDX4_vi = 6533
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_DWORD_SADDR_vi = 6534
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_DWORD_vi = 6535
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_SHORT_D16_HI_SADDR_vi = 6536
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_SHORT_D16_HI_vi = 6537
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_SHORT_SADDR_vi = 6538
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // SCRATCH_STORE_SHORT_vi = 6539
    Feature_isGCN | Feature_isSICI | 0, // S_ABSDIFF_I32_si = 6540
    Feature_isGCN | Feature_isVI | 0, // S_ABSDIFF_I32_vi = 6541
    Feature_isGCN | Feature_isSICI | 0, // S_ABS_I32_si = 6542
    Feature_isGCN | Feature_isVI | 0, // S_ABS_I32_vi = 6543
    Feature_isGCN | Feature_isSICI | 0, // S_ADDC_U32_si = 6544
    Feature_isGCN | Feature_isVI | 0, // S_ADDC_U32_vi = 6545
    Feature_isGCN | Feature_isSICI | 0, // S_ADDK_I32_si = 6546
    Feature_isGCN | Feature_isVI | 0, // S_ADDK_I32_vi = 6547
    Feature_isGCN | Feature_isSICI | 0, // S_ADD_I32_si = 6548
    Feature_isGCN | Feature_isVI | 0, // S_ADD_I32_vi = 6549
    Feature_isGCN | Feature_isSICI | 0, // S_ADD_U32_si = 6550
    Feature_isGCN | Feature_isVI | 0, // S_ADD_U32_vi = 6551
    Feature_isGFX9 | Feature_isVI | 0, // S_ANDN1_SAVEEXEC_B64_vi = 6552
    Feature_isGFX9 | Feature_isVI | 0, // S_ANDN1_WREXEC_B64_vi = 6553
    Feature_isGCN | Feature_isSICI | 0, // S_ANDN2_B32_si = 6554
    Feature_isGCN | Feature_isVI | 0, // S_ANDN2_B32_vi = 6555
    Feature_isGCN | Feature_isSICI | 0, // S_ANDN2_B64_si = 6556
    Feature_isGCN | Feature_isVI | 0, // S_ANDN2_B64_vi = 6557
    Feature_isGCN | Feature_isSICI | 0, // S_ANDN2_SAVEEXEC_B64_si = 6558
    Feature_isGCN | Feature_isVI | 0, // S_ANDN2_SAVEEXEC_B64_vi = 6559
    Feature_isGFX9 | Feature_isVI | 0, // S_ANDN2_WREXEC_B64_vi = 6560
    Feature_isGCN | Feature_isSICI | 0, // S_AND_B32_si = 6561
    Feature_isGCN | Feature_isVI | 0, // S_AND_B32_vi = 6562
    Feature_isGCN | Feature_isSICI | 0, // S_AND_B64_si = 6563
    Feature_isGCN | Feature_isVI | 0, // S_AND_B64_vi = 6564
    Feature_isGCN | Feature_isSICI | 0, // S_AND_SAVEEXEC_B64_si = 6565
    Feature_isGCN | Feature_isVI | 0, // S_AND_SAVEEXEC_B64_vi = 6566
    Feature_isGCN | Feature_isSICI | 0, // S_ASHR_I32_si = 6567
    Feature_isGCN | Feature_isVI | 0, // S_ASHR_I32_vi = 6568
    Feature_isGCN | Feature_isSICI | 0, // S_ASHR_I64_si = 6569
    Feature_isGCN | Feature_isVI | 0, // S_ASHR_I64_vi = 6570
    Feature_isVI | Feature_isVI | 0, // S_ATC_PROBE_BUFFER_IMM_vi = 6571
    Feature_isVI | Feature_isVI | 0, // S_ATC_PROBE_BUFFER_SGPR_vi = 6572
    Feature_isVI | Feature_isVI | 0, // S_ATC_PROBE_IMM_vi = 6573
    Feature_isVI | Feature_isVI | 0, // S_ATC_PROBE_SGPR_vi = 6574
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_ADD_IMM_RTN_vi = 6575
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_ADD_IMM_vi = 6576
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_ADD_SGPR_RTN_vi = 6577
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_ADD_SGPR_vi = 6578
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_ADD_X2_IMM_RTN_vi = 6579
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_ADD_X2_IMM_vi = 6580
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_ADD_X2_SGPR_RTN_vi = 6581
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_ADD_X2_SGPR_vi = 6582
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_AND_IMM_RTN_vi = 6583
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_AND_IMM_vi = 6584
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_AND_SGPR_RTN_vi = 6585
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_AND_SGPR_vi = 6586
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_AND_X2_IMM_RTN_vi = 6587
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_AND_X2_IMM_vi = 6588
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_AND_X2_SGPR_RTN_vi = 6589
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_AND_X2_SGPR_vi = 6590
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_CMPSWAP_IMM_RTN_vi = 6591
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_CMPSWAP_IMM_vi = 6592
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_CMPSWAP_SGPR_RTN_vi = 6593
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_CMPSWAP_SGPR_vi = 6594
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_CMPSWAP_X2_IMM_RTN_vi = 6595
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_CMPSWAP_X2_IMM_vi = 6596
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_CMPSWAP_X2_SGPR_RTN_vi = 6597
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_CMPSWAP_X2_SGPR_vi = 6598
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_DEC_IMM_RTN_vi = 6599
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_DEC_IMM_vi = 6600
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_DEC_SGPR_RTN_vi = 6601
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_DEC_SGPR_vi = 6602
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_DEC_X2_IMM_RTN_vi = 6603
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_DEC_X2_IMM_vi = 6604
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_DEC_X2_SGPR_RTN_vi = 6605
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_DEC_X2_SGPR_vi = 6606
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_INC_IMM_RTN_vi = 6607
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_INC_IMM_vi = 6608
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_INC_SGPR_RTN_vi = 6609
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_INC_SGPR_vi = 6610
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_INC_X2_IMM_RTN_vi = 6611
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_INC_X2_IMM_vi = 6612
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_INC_X2_SGPR_RTN_vi = 6613
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_INC_X2_SGPR_vi = 6614
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_OR_IMM_RTN_vi = 6615
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_OR_IMM_vi = 6616
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_OR_SGPR_RTN_vi = 6617
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_OR_SGPR_vi = 6618
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_OR_X2_IMM_RTN_vi = 6619
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_OR_X2_IMM_vi = 6620
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_OR_X2_SGPR_RTN_vi = 6621
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_OR_X2_SGPR_vi = 6622
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMAX_IMM_RTN_vi = 6623
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMAX_IMM_vi = 6624
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMAX_SGPR_RTN_vi = 6625
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMAX_SGPR_vi = 6626
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMAX_X2_IMM_RTN_vi = 6627
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMAX_X2_IMM_vi = 6628
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMAX_X2_SGPR_RTN_vi = 6629
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMAX_X2_SGPR_vi = 6630
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMIN_IMM_RTN_vi = 6631
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMIN_IMM_vi = 6632
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMIN_SGPR_RTN_vi = 6633
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMIN_SGPR_vi = 6634
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMIN_X2_IMM_RTN_vi = 6635
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMIN_X2_IMM_vi = 6636
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMIN_X2_SGPR_RTN_vi = 6637
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SMIN_X2_SGPR_vi = 6638
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SUB_IMM_RTN_vi = 6639
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SUB_IMM_vi = 6640
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SUB_SGPR_RTN_vi = 6641
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SUB_SGPR_vi = 6642
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SUB_X2_IMM_RTN_vi = 6643
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SUB_X2_IMM_vi = 6644
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SUB_X2_SGPR_RTN_vi = 6645
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SUB_X2_SGPR_vi = 6646
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SWAP_IMM_RTN_vi = 6647
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SWAP_IMM_vi = 6648
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SWAP_SGPR_RTN_vi = 6649
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SWAP_SGPR_vi = 6650
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SWAP_X2_IMM_RTN_vi = 6651
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SWAP_X2_IMM_vi = 6652
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SWAP_X2_SGPR_RTN_vi = 6653
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_SWAP_X2_SGPR_vi = 6654
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMAX_IMM_RTN_vi = 6655
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMAX_IMM_vi = 6656
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMAX_SGPR_RTN_vi = 6657
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMAX_SGPR_vi = 6658
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMAX_X2_IMM_RTN_vi = 6659
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMAX_X2_IMM_vi = 6660
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMAX_X2_SGPR_RTN_vi = 6661
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMAX_X2_SGPR_vi = 6662
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMIN_IMM_RTN_vi = 6663
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMIN_IMM_vi = 6664
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMIN_SGPR_RTN_vi = 6665
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMIN_SGPR_vi = 6666
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMIN_X2_IMM_RTN_vi = 6667
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMIN_X2_IMM_vi = 6668
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMIN_X2_SGPR_RTN_vi = 6669
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_UMIN_X2_SGPR_vi = 6670
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_XOR_IMM_RTN_vi = 6671
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_XOR_IMM_vi = 6672
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_XOR_SGPR_RTN_vi = 6673
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_XOR_SGPR_vi = 6674
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_XOR_X2_IMM_RTN_vi = 6675
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_XOR_X2_IMM_vi = 6676
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_XOR_X2_SGPR_RTN_vi = 6677
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_ATOMIC_XOR_X2_SGPR_vi = 6678
    Feature_isGCN | 0, // S_BARRIER = 6679
    Feature_isGCN | Feature_isSICI | 0, // S_BCNT0_I32_B32_si = 6680
    Feature_isGCN | Feature_isVI | 0, // S_BCNT0_I32_B32_vi = 6681
    Feature_isGCN | Feature_isSICI | 0, // S_BCNT0_I32_B64_si = 6682
    Feature_isGCN | Feature_isVI | 0, // S_BCNT0_I32_B64_vi = 6683
    Feature_isGCN | Feature_isSICI | 0, // S_BCNT1_I32_B32_si = 6684
    Feature_isGCN | Feature_isVI | 0, // S_BCNT1_I32_B32_vi = 6685
    Feature_isGCN | Feature_isSICI | 0, // S_BCNT1_I32_B64_si = 6686
    Feature_isGCN | Feature_isVI | 0, // S_BCNT1_I32_B64_vi = 6687
    Feature_isGCN | Feature_isSICI | 0, // S_BFE_I32_si = 6688
    Feature_isGCN | Feature_isVI | 0, // S_BFE_I32_vi = 6689
    Feature_isGCN | Feature_isSICI | 0, // S_BFE_I64_si = 6690
    Feature_isGCN | Feature_isVI | 0, // S_BFE_I64_vi = 6691
    Feature_isGCN | Feature_isSICI | 0, // S_BFE_U32_si = 6692
    Feature_isGCN | Feature_isVI | 0, // S_BFE_U32_vi = 6693
    Feature_isGCN | Feature_isSICI | 0, // S_BFE_U64_si = 6694
    Feature_isGCN | Feature_isVI | 0, // S_BFE_U64_vi = 6695
    Feature_isGCN | Feature_isSICI | 0, // S_BFM_B32_si = 6696
    Feature_isGCN | Feature_isVI | 0, // S_BFM_B32_vi = 6697
    Feature_isGCN | Feature_isSICI | 0, // S_BFM_B64_si = 6698
    Feature_isGCN | Feature_isVI | 0, // S_BFM_B64_vi = 6699
    Feature_isGCN | 0, // S_BITCMP0_B32 = 6700
    Feature_isGCN | 0, // S_BITCMP0_B64 = 6701
    Feature_isGCN | 0, // S_BITCMP1_B32 = 6702
    Feature_isGCN | 0, // S_BITCMP1_B64 = 6703
    Feature_isGFX9 | Feature_isVI | 0, // S_BITREPLICATE_B64_B32_vi = 6704
    Feature_isGCN | Feature_isSICI | 0, // S_BITSET0_B32_si = 6705
    Feature_isGCN | Feature_isVI | 0, // S_BITSET0_B32_vi = 6706
    Feature_isGCN | Feature_isSICI | 0, // S_BITSET0_B64_si = 6707
    Feature_isGCN | Feature_isVI | 0, // S_BITSET0_B64_vi = 6708
    Feature_isGCN | Feature_isSICI | 0, // S_BITSET1_B32_si = 6709
    Feature_isGCN | Feature_isVI | 0, // S_BITSET1_B32_vi = 6710
    Feature_isGCN | Feature_isSICI | 0, // S_BITSET1_B64_si = 6711
    Feature_isGCN | Feature_isVI | 0, // S_BITSET1_B64_vi = 6712
    Feature_isGCN | 0, // S_BRANCH = 6713
    Feature_isGCN | Feature_isSICI | 0, // S_BREV_B32_si = 6714
    Feature_isGCN | Feature_isVI | 0, // S_BREV_B32_vi = 6715
    Feature_isGCN | Feature_isSICI | 0, // S_BREV_B64_si = 6716
    Feature_isGCN | Feature_isVI | 0, // S_BREV_B64_vi = 6717
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_ADD_IMM_RTN_vi = 6718
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_ADD_IMM_vi = 6719
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_ADD_SGPR_RTN_vi = 6720
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_ADD_SGPR_vi = 6721
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_ADD_X2_IMM_RTN_vi = 6722
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_ADD_X2_IMM_vi = 6723
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_ADD_X2_SGPR_RTN_vi = 6724
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_ADD_X2_SGPR_vi = 6725
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_AND_IMM_RTN_vi = 6726
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_AND_IMM_vi = 6727
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_AND_SGPR_RTN_vi = 6728
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_AND_SGPR_vi = 6729
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_AND_X2_IMM_RTN_vi = 6730
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_AND_X2_IMM_vi = 6731
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_AND_X2_SGPR_RTN_vi = 6732
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_AND_X2_SGPR_vi = 6733
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_CMPSWAP_IMM_RTN_vi = 6734
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_CMPSWAP_IMM_vi = 6735
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_CMPSWAP_SGPR_RTN_vi = 6736
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_CMPSWAP_SGPR_vi = 6737
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_CMPSWAP_X2_IMM_RTN_vi = 6738
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_CMPSWAP_X2_IMM_vi = 6739
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_CMPSWAP_X2_SGPR_RTN_vi = 6740
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_CMPSWAP_X2_SGPR_vi = 6741
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_DEC_IMM_RTN_vi = 6742
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_DEC_IMM_vi = 6743
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_DEC_SGPR_RTN_vi = 6744
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_DEC_SGPR_vi = 6745
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_DEC_X2_IMM_RTN_vi = 6746
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_DEC_X2_IMM_vi = 6747
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_DEC_X2_SGPR_RTN_vi = 6748
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_DEC_X2_SGPR_vi = 6749
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_INC_IMM_RTN_vi = 6750
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_INC_IMM_vi = 6751
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_INC_SGPR_RTN_vi = 6752
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_INC_SGPR_vi = 6753
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_INC_X2_IMM_RTN_vi = 6754
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_INC_X2_IMM_vi = 6755
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_INC_X2_SGPR_RTN_vi = 6756
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_INC_X2_SGPR_vi = 6757
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_OR_IMM_RTN_vi = 6758
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_OR_IMM_vi = 6759
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_OR_SGPR_RTN_vi = 6760
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_OR_SGPR_vi = 6761
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_OR_X2_IMM_RTN_vi = 6762
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_OR_X2_IMM_vi = 6763
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_OR_X2_SGPR_RTN_vi = 6764
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_OR_X2_SGPR_vi = 6765
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMAX_IMM_RTN_vi = 6766
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMAX_IMM_vi = 6767
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMAX_SGPR_RTN_vi = 6768
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMAX_SGPR_vi = 6769
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMAX_X2_IMM_RTN_vi = 6770
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMAX_X2_IMM_vi = 6771
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMAX_X2_SGPR_RTN_vi = 6772
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMAX_X2_SGPR_vi = 6773
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMIN_IMM_RTN_vi = 6774
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMIN_IMM_vi = 6775
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMIN_SGPR_RTN_vi = 6776
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMIN_SGPR_vi = 6777
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMIN_X2_IMM_RTN_vi = 6778
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMIN_X2_IMM_vi = 6779
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMIN_X2_SGPR_RTN_vi = 6780
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SMIN_X2_SGPR_vi = 6781
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SUB_IMM_RTN_vi = 6782
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SUB_IMM_vi = 6783
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SUB_SGPR_RTN_vi = 6784
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SUB_SGPR_vi = 6785
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SUB_X2_IMM_RTN_vi = 6786
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SUB_X2_IMM_vi = 6787
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SUB_X2_SGPR_RTN_vi = 6788
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SUB_X2_SGPR_vi = 6789
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SWAP_IMM_RTN_vi = 6790
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SWAP_IMM_vi = 6791
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SWAP_SGPR_RTN_vi = 6792
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SWAP_SGPR_vi = 6793
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SWAP_X2_IMM_RTN_vi = 6794
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SWAP_X2_IMM_vi = 6795
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SWAP_X2_SGPR_RTN_vi = 6796
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_SWAP_X2_SGPR_vi = 6797
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMAX_IMM_RTN_vi = 6798
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMAX_IMM_vi = 6799
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMAX_SGPR_RTN_vi = 6800
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMAX_SGPR_vi = 6801
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMAX_X2_IMM_RTN_vi = 6802
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMAX_X2_IMM_vi = 6803
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMAX_X2_SGPR_RTN_vi = 6804
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMAX_X2_SGPR_vi = 6805
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMIN_IMM_RTN_vi = 6806
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMIN_IMM_vi = 6807
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMIN_SGPR_RTN_vi = 6808
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMIN_SGPR_vi = 6809
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMIN_X2_IMM_RTN_vi = 6810
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMIN_X2_IMM_vi = 6811
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMIN_X2_SGPR_RTN_vi = 6812
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_UMIN_X2_SGPR_vi = 6813
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_XOR_IMM_RTN_vi = 6814
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_XOR_IMM_vi = 6815
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_XOR_SGPR_RTN_vi = 6816
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_XOR_SGPR_vi = 6817
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_XOR_X2_IMM_RTN_vi = 6818
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_XOR_X2_IMM_vi = 6819
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_XOR_X2_SGPR_RTN_vi = 6820
    Feature_HasScalarAtomics | Feature_isVI | 0, // S_BUFFER_ATOMIC_XOR_X2_SGPR_vi = 6821
    Feature_isGCN | Feature_isCIOnly | 0, // S_BUFFER_LOAD_DWORDX16_IMM_ci = 6822
    Feature_isGCN | Feature_isSICI | 0, // S_BUFFER_LOAD_DWORDX16_IMM_si = 6823
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_LOAD_DWORDX16_IMM_vi = 6824
    Feature_isGCN | Feature_isSICI | 0, // S_BUFFER_LOAD_DWORDX16_SGPR_si = 6825
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_LOAD_DWORDX16_SGPR_vi = 6826
    Feature_isGCN | Feature_isCIOnly | 0, // S_BUFFER_LOAD_DWORDX2_IMM_ci = 6827
    Feature_isGCN | Feature_isSICI | 0, // S_BUFFER_LOAD_DWORDX2_IMM_si = 6828
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_LOAD_DWORDX2_IMM_vi = 6829
    Feature_isGCN | Feature_isSICI | 0, // S_BUFFER_LOAD_DWORDX2_SGPR_si = 6830
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_LOAD_DWORDX2_SGPR_vi = 6831
    Feature_isGCN | Feature_isCIOnly | 0, // S_BUFFER_LOAD_DWORDX4_IMM_ci = 6832
    Feature_isGCN | Feature_isSICI | 0, // S_BUFFER_LOAD_DWORDX4_IMM_si = 6833
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_LOAD_DWORDX4_IMM_vi = 6834
    Feature_isGCN | Feature_isSICI | 0, // S_BUFFER_LOAD_DWORDX4_SGPR_si = 6835
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_LOAD_DWORDX4_SGPR_vi = 6836
    Feature_isGCN | Feature_isCIOnly | 0, // S_BUFFER_LOAD_DWORDX8_IMM_ci = 6837
    Feature_isGCN | Feature_isSICI | 0, // S_BUFFER_LOAD_DWORDX8_IMM_si = 6838
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_LOAD_DWORDX8_IMM_vi = 6839
    Feature_isGCN | Feature_isSICI | 0, // S_BUFFER_LOAD_DWORDX8_SGPR_si = 6840
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_LOAD_DWORDX8_SGPR_vi = 6841
    Feature_isGCN | Feature_isCIOnly | 0, // S_BUFFER_LOAD_DWORD_IMM_ci = 6842
    Feature_isGCN | Feature_isSICI | 0, // S_BUFFER_LOAD_DWORD_IMM_si = 6843
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_LOAD_DWORD_IMM_vi = 6844
    Feature_isGCN | Feature_isSICI | 0, // S_BUFFER_LOAD_DWORD_SGPR_si = 6845
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_LOAD_DWORD_SGPR_vi = 6846
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_STORE_DWORDX2_IMM_vi = 6847
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_STORE_DWORDX2_SGPR_vi = 6848
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_STORE_DWORDX4_IMM_vi = 6849
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_STORE_DWORDX4_SGPR_vi = 6850
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_STORE_DWORD_IMM_vi = 6851
    Feature_isGCN | Feature_isVI | 0, // S_BUFFER_STORE_DWORD_SGPR_vi = 6852
    Feature_isGFX9 | Feature_isVI | 0, // S_CALL_B64_vi = 6853
    Feature_isGCN | 0, // S_CBRANCH_CDBGSYS = 6854
    Feature_isGCN | 0, // S_CBRANCH_CDBGSYS_AND_USER = 6855
    Feature_isGCN | 0, // S_CBRANCH_CDBGSYS_OR_USER = 6856
    Feature_isGCN | 0, // S_CBRANCH_CDBGUSER = 6857
    Feature_isGCN | 0, // S_CBRANCH_EXECNZ = 6858
    Feature_isGCN | 0, // S_CBRANCH_EXECZ = 6859
    Feature_isGCN | Feature_isSICI | 0, // S_CBRANCH_G_FORK_si = 6860
    Feature_isGCN | Feature_isVI | 0, // S_CBRANCH_G_FORK_vi = 6861
    Feature_isGCN | Feature_isSICI | 0, // S_CBRANCH_I_FORK_si = 6862
    Feature_isGCN | Feature_isVI | 0, // S_CBRANCH_I_FORK_vi = 6863
    Feature_isGCN | Feature_isSICI | 0, // S_CBRANCH_JOIN_si = 6864
    Feature_isGCN | Feature_isVI | 0, // S_CBRANCH_JOIN_vi = 6865
    Feature_isGCN | 0, // S_CBRANCH_SCC0 = 6866
    Feature_isGCN | 0, // S_CBRANCH_SCC1 = 6867
    Feature_isGCN | 0, // S_CBRANCH_VCCNZ = 6868
    Feature_isGCN | 0, // S_CBRANCH_VCCZ = 6869
    Feature_isGCN | Feature_isSICI | 0, // S_CMOVK_I32_si = 6870
    Feature_isGCN | Feature_isVI | 0, // S_CMOVK_I32_vi = 6871
    Feature_isGCN | Feature_isSICI | 0, // S_CMOV_B32_si = 6872
    Feature_isGCN | Feature_isVI | 0, // S_CMOV_B32_vi = 6873
    Feature_isGCN | Feature_isSICI | 0, // S_CMOV_B64_si = 6874
    Feature_isGCN | Feature_isVI | 0, // S_CMOV_B64_vi = 6875
    Feature_isGCN | Feature_isSICI | 0, // S_CMPK_EQ_I32_si = 6876
    Feature_isGCN | Feature_isVI | 0, // S_CMPK_EQ_I32_vi = 6877
    Feature_isGCN | Feature_isSICI | 0, // S_CMPK_EQ_U32_si = 6878
    Feature_isGCN | Feature_isVI | 0, // S_CMPK_EQ_U32_vi = 6879
    Feature_isGCN | Feature_isSICI | 0, // S_CMPK_GE_I32_si = 6880
    Feature_isGCN | Feature_isVI | 0, // S_CMPK_GE_I32_vi = 6881
    Feature_isGCN | Feature_isSICI | 0, // S_CMPK_GE_U32_si = 6882
    Feature_isGCN | Feature_isVI | 0, // S_CMPK_GE_U32_vi = 6883
    Feature_isGCN | Feature_isSICI | 0, // S_CMPK_GT_I32_si = 6884
    Feature_isGCN | Feature_isVI | 0, // S_CMPK_GT_I32_vi = 6885
    Feature_isGCN | Feature_isSICI | 0, // S_CMPK_GT_U32_si = 6886
    Feature_isGCN | Feature_isVI | 0, // S_CMPK_GT_U32_vi = 6887
    Feature_isGCN | Feature_isSICI | 0, // S_CMPK_LE_I32_si = 6888
    Feature_isGCN | Feature_isVI | 0, // S_CMPK_LE_I32_vi = 6889
    Feature_isGCN | Feature_isSICI | 0, // S_CMPK_LE_U32_si = 6890
    Feature_isGCN | Feature_isVI | 0, // S_CMPK_LE_U32_vi = 6891
    Feature_isGCN | Feature_isSICI | 0, // S_CMPK_LG_I32_si = 6892
    Feature_isGCN | Feature_isVI | 0, // S_CMPK_LG_I32_vi = 6893
    Feature_isGCN | Feature_isSICI | 0, // S_CMPK_LG_U32_si = 6894
    Feature_isGCN | Feature_isVI | 0, // S_CMPK_LG_U32_vi = 6895
    Feature_isGCN | Feature_isSICI | 0, // S_CMPK_LT_I32_si = 6896
    Feature_isGCN | Feature_isVI | 0, // S_CMPK_LT_I32_vi = 6897
    Feature_isGCN | Feature_isSICI | 0, // S_CMPK_LT_U32_si = 6898
    Feature_isGCN | Feature_isVI | 0, // S_CMPK_LT_U32_vi = 6899
    Feature_isGCN | 0, // S_CMP_EQ_I32 = 6900
    Feature_isGCN | 0, // S_CMP_EQ_U32 = 6901
    Feature_isVI | 0, // S_CMP_EQ_U64 = 6902
    Feature_isGCN | 0, // S_CMP_GE_I32 = 6903
    Feature_isGCN | 0, // S_CMP_GE_U32 = 6904
    Feature_isGCN | 0, // S_CMP_GT_I32 = 6905
    Feature_isGCN | 0, // S_CMP_GT_U32 = 6906
    Feature_isGCN | 0, // S_CMP_LE_I32 = 6907
    Feature_isGCN | 0, // S_CMP_LE_U32 = 6908
    Feature_isGCN | 0, // S_CMP_LG_I32 = 6909
    Feature_isGCN | 0, // S_CMP_LG_U32 = 6910
    Feature_isVI | 0, // S_CMP_LG_U64 = 6911
    Feature_isGCN | 0, // S_CMP_LT_I32 = 6912
    Feature_isGCN | 0, // S_CMP_LT_U32 = 6913
    Feature_isGCN | Feature_isSICI | 0, // S_CSELECT_B32_si = 6914
    Feature_isGCN | Feature_isVI | 0, // S_CSELECT_B32_vi = 6915
    Feature_isGCN | Feature_isSICI | 0, // S_CSELECT_B64_si = 6916
    Feature_isGCN | Feature_isVI | 0, // S_CSELECT_B64_vi = 6917
    Feature_isGFX9 | Feature_isVI | 0, // S_DCACHE_DISCARD_IMM_vi = 6918
    Feature_isGFX9 | Feature_isVI | 0, // S_DCACHE_DISCARD_SGPR_vi = 6919
    Feature_isGFX9 | Feature_isVI | 0, // S_DCACHE_DISCARD_X2_IMM_vi = 6920
    Feature_isGFX9 | Feature_isVI | 0, // S_DCACHE_DISCARD_X2_SGPR_vi = 6921
    Feature_isCIVI | Feature_isCIOnly | 0, // S_DCACHE_INV_VOL_ci = 6922
    Feature_isCIVI | Feature_isVI | 0, // S_DCACHE_INV_VOL_vi = 6923
    Feature_isGCN | Feature_isSICI | 0, // S_DCACHE_INV_si = 6924
    Feature_isGCN | Feature_isVI | 0, // S_DCACHE_INV_vi = 6925
    Feature_isVI | Feature_isVI | 0, // S_DCACHE_WB_VOL_vi = 6926
    Feature_isVI | Feature_isVI | 0, // S_DCACHE_WB_vi = 6927
    Feature_isGCN | 0, // S_DECPERFLEVEL = 6928
    Feature_isGCN | 0, // S_ENDPGM = 6929
    Feature_isGFX9 | 0, // S_ENDPGM_ORDERED_PS_DONE = 6930
    Feature_isVI | 0, // S_ENDPGM_SAVED = 6931
    Feature_isGCN | Feature_isSICI | 0, // S_FF0_I32_B32_si = 6932
    Feature_isGCN | Feature_isVI | 0, // S_FF0_I32_B32_vi = 6933
    Feature_isGCN | Feature_isSICI | 0, // S_FF0_I32_B64_si = 6934
    Feature_isGCN | Feature_isVI | 0, // S_FF0_I32_B64_vi = 6935
    Feature_isGCN | Feature_isSICI | 0, // S_FF1_I32_B32_si = 6936
    Feature_isGCN | Feature_isVI | 0, // S_FF1_I32_B32_vi = 6937
    Feature_isGCN | Feature_isSICI | 0, // S_FF1_I32_B64_si = 6938
    Feature_isGCN | Feature_isVI | 0, // S_FF1_I32_B64_vi = 6939
    Feature_isGCN | Feature_isSICI | 0, // S_FLBIT_I32_B32_si = 6940
    Feature_isGCN | Feature_isVI | 0, // S_FLBIT_I32_B32_vi = 6941
    Feature_isGCN | Feature_isSICI | 0, // S_FLBIT_I32_B64_si = 6942
    Feature_isGCN | Feature_isVI | 0, // S_FLBIT_I32_B64_vi = 6943
    Feature_isGCN | Feature_isSICI | 0, // S_FLBIT_I32_I64_si = 6944
    Feature_isGCN | Feature_isVI | 0, // S_FLBIT_I32_I64_vi = 6945
    Feature_isGCN | Feature_isSICI | 0, // S_FLBIT_I32_si = 6946
    Feature_isGCN | Feature_isVI | 0, // S_FLBIT_I32_vi = 6947
    Feature_isGCN | Feature_isSICI | 0, // S_GETPC_B64_si = 6948
    Feature_isGCN | Feature_isVI | 0, // S_GETPC_B64_vi = 6949
    Feature_isGCN | Feature_isSICI | 0, // S_GETREG_B32_si = 6950
    Feature_isGCN | Feature_isVI | 0, // S_GETREG_B32_vi = 6951
    Feature_isGCN | 0, // S_ICACHE_INV = 6952
    Feature_isGCN | 0, // S_INCPERFLEVEL = 6953
    Feature_isGCN | Feature_isCIOnly | 0, // S_LOAD_DWORDX16_IMM_ci = 6954
    Feature_isGCN | Feature_isSICI | 0, // S_LOAD_DWORDX16_IMM_si = 6955
    Feature_isGCN | Feature_isVI | 0, // S_LOAD_DWORDX16_IMM_vi = 6956
    Feature_isGCN | Feature_isSICI | 0, // S_LOAD_DWORDX16_SGPR_si = 6957
    Feature_isGCN | Feature_isVI | 0, // S_LOAD_DWORDX16_SGPR_vi = 6958
    Feature_isGCN | Feature_isCIOnly | 0, // S_LOAD_DWORDX2_IMM_ci = 6959
    Feature_isGCN | Feature_isSICI | 0, // S_LOAD_DWORDX2_IMM_si = 6960
    Feature_isGCN | Feature_isVI | 0, // S_LOAD_DWORDX2_IMM_vi = 6961
    Feature_isGCN | Feature_isSICI | 0, // S_LOAD_DWORDX2_SGPR_si = 6962
    Feature_isGCN | Feature_isVI | 0, // S_LOAD_DWORDX2_SGPR_vi = 6963
    Feature_isGCN | Feature_isCIOnly | 0, // S_LOAD_DWORDX4_IMM_ci = 6964
    Feature_isGCN | Feature_isSICI | 0, // S_LOAD_DWORDX4_IMM_si = 6965
    Feature_isGCN | Feature_isVI | 0, // S_LOAD_DWORDX4_IMM_vi = 6966
    Feature_isGCN | Feature_isSICI | 0, // S_LOAD_DWORDX4_SGPR_si = 6967
    Feature_isGCN | Feature_isVI | 0, // S_LOAD_DWORDX4_SGPR_vi = 6968
    Feature_isGCN | Feature_isCIOnly | 0, // S_LOAD_DWORDX8_IMM_ci = 6969
    Feature_isGCN | Feature_isSICI | 0, // S_LOAD_DWORDX8_IMM_si = 6970
    Feature_isGCN | Feature_isVI | 0, // S_LOAD_DWORDX8_IMM_vi = 6971
    Feature_isGCN | Feature_isSICI | 0, // S_LOAD_DWORDX8_SGPR_si = 6972
    Feature_isGCN | Feature_isVI | 0, // S_LOAD_DWORDX8_SGPR_vi = 6973
    Feature_isGCN | Feature_isCIOnly | 0, // S_LOAD_DWORD_IMM_ci = 6974
    Feature_isGCN | Feature_isSICI | 0, // S_LOAD_DWORD_IMM_si = 6975
    Feature_isGCN | Feature_isVI | 0, // S_LOAD_DWORD_IMM_vi = 6976
    Feature_isGCN | Feature_isSICI | 0, // S_LOAD_DWORD_SGPR_si = 6977
    Feature_isGCN | Feature_isVI | 0, // S_LOAD_DWORD_SGPR_vi = 6978
    Feature_isGFX9 | Feature_isVI | 0, // S_LSHL1_ADD_U32_vi = 6979
    Feature_isGFX9 | Feature_isVI | 0, // S_LSHL2_ADD_U32_vi = 6980
    Feature_isGFX9 | Feature_isVI | 0, // S_LSHL3_ADD_U32_vi = 6981
    Feature_isGFX9 | Feature_isVI | 0, // S_LSHL4_ADD_U32_vi = 6982
    Feature_isGCN | Feature_isSICI | 0, // S_LSHL_B32_si = 6983
    Feature_isGCN | Feature_isVI | 0, // S_LSHL_B32_vi = 6984
    Feature_isGCN | Feature_isSICI | 0, // S_LSHL_B64_si = 6985
    Feature_isGCN | Feature_isVI | 0, // S_LSHL_B64_vi = 6986
    Feature_isGCN | Feature_isSICI | 0, // S_LSHR_B32_si = 6987
    Feature_isGCN | Feature_isVI | 0, // S_LSHR_B32_vi = 6988
    Feature_isGCN | Feature_isSICI | 0, // S_LSHR_B64_si = 6989
    Feature_isGCN | Feature_isVI | 0, // S_LSHR_B64_vi = 6990
    Feature_isGCN | Feature_isSICI | 0, // S_MAX_I32_si = 6991
    Feature_isGCN | Feature_isVI | 0, // S_MAX_I32_vi = 6992
    Feature_isGCN | Feature_isSICI | 0, // S_MAX_U32_si = 6993
    Feature_isGCN | Feature_isVI | 0, // S_MAX_U32_vi = 6994
    Feature_isVI | Feature_isVI | 0, // S_MEMREALTIME_vi = 6995
    Feature_isGCN | Feature_isSICI | 0, // S_MEMTIME_si = 6996
    Feature_isGCN | Feature_isVI | 0, // S_MEMTIME_vi = 6997
    Feature_isGCN | Feature_isSICI | 0, // S_MIN_I32_si = 6998
    Feature_isGCN | Feature_isVI | 0, // S_MIN_I32_vi = 6999
    Feature_isGCN | Feature_isSICI | 0, // S_MIN_U32_si = 7000
    Feature_isGCN | Feature_isVI | 0, // S_MIN_U32_vi = 7001
    Feature_isGCN | Feature_isSICI | 0, // S_MOVK_I32_si = 7002
    Feature_isGCN | Feature_isVI | 0, // S_MOVK_I32_vi = 7003
    Feature_isGCN | Feature_isSICI | 0, // S_MOVRELD_B32_si = 7004
    Feature_isGCN | Feature_isVI | 0, // S_MOVRELD_B32_vi = 7005
    Feature_isGCN | Feature_isSICI | 0, // S_MOVRELD_B64_si = 7006
    Feature_isGCN | Feature_isVI | 0, // S_MOVRELD_B64_vi = 7007
    Feature_isGCN | Feature_isSICI | 0, // S_MOVRELS_B32_si = 7008
    Feature_isGCN | Feature_isVI | 0, // S_MOVRELS_B32_vi = 7009
    Feature_isGCN | Feature_isSICI | 0, // S_MOVRELS_B64_si = 7010
    Feature_isGCN | Feature_isVI | 0, // S_MOVRELS_B64_vi = 7011
    Feature_isGCN | Feature_isSICI | 0, // S_MOV_B32_si = 7012
    Feature_isGCN | Feature_isVI | 0, // S_MOV_B32_vi = 7013
    Feature_isGCN | Feature_isSICI | 0, // S_MOV_B64_si = 7014
    Feature_isGCN | Feature_isVI | 0, // S_MOV_B64_vi = 7015
    Feature_isGCN | Feature_isSICI | 0, // S_MOV_FED_B32_si = 7016
    Feature_isGCN | Feature_isVI | 0, // S_MOV_FED_B32_vi = 7017
    Feature_isGCN | Feature_isSICI | 0, // S_MOV_REGRD_B32_si = 7018
    Feature_isGCN | Feature_isVI | 0, // S_MOV_REGRD_B32_vi = 7019
    Feature_isGCN | Feature_isSICI | 0, // S_MULK_I32_si = 7020
    Feature_isGCN | Feature_isVI | 0, // S_MULK_I32_vi = 7021
    Feature_isGFX9 | Feature_isVI | 0, // S_MUL_HI_I32_vi = 7022
    Feature_isGFX9 | Feature_isVI | 0, // S_MUL_HI_U32_vi = 7023
    Feature_isGCN | Feature_isSICI | 0, // S_MUL_I32_si = 7024
    Feature_isGCN | Feature_isVI | 0, // S_MUL_I32_vi = 7025
    Feature_isGCN | Feature_isSICI | 0, // S_NAND_B32_si = 7026
    Feature_isGCN | Feature_isVI | 0, // S_NAND_B32_vi = 7027
    Feature_isGCN | Feature_isSICI | 0, // S_NAND_B64_si = 7028
    Feature_isGCN | Feature_isVI | 0, // S_NAND_B64_vi = 7029
    Feature_isGCN | Feature_isSICI | 0, // S_NAND_SAVEEXEC_B64_si = 7030
    Feature_isGCN | Feature_isVI | 0, // S_NAND_SAVEEXEC_B64_vi = 7031
    Feature_isGCN | 0, // S_NOP = 7032
    Feature_isGCN | Feature_isSICI | 0, // S_NOR_B32_si = 7033
    Feature_isGCN | Feature_isVI | 0, // S_NOR_B32_vi = 7034
    Feature_isGCN | Feature_isSICI | 0, // S_NOR_B64_si = 7035
    Feature_isGCN | Feature_isVI | 0, // S_NOR_B64_vi = 7036
    Feature_isGCN | Feature_isSICI | 0, // S_NOR_SAVEEXEC_B64_si = 7037
    Feature_isGCN | Feature_isVI | 0, // S_NOR_SAVEEXEC_B64_vi = 7038
    Feature_isGCN | Feature_isSICI | 0, // S_NOT_B32_si = 7039
    Feature_isGCN | Feature_isVI | 0, // S_NOT_B32_vi = 7040
    Feature_isGCN | Feature_isSICI | 0, // S_NOT_B64_si = 7041
    Feature_isGCN | Feature_isVI | 0, // S_NOT_B64_vi = 7042
    Feature_isGFX9 | Feature_isVI | 0, // S_ORN1_SAVEEXEC_B64_vi = 7043
    Feature_isGCN | Feature_isSICI | 0, // S_ORN2_B32_si = 7044
    Feature_isGCN | Feature_isVI | 0, // S_ORN2_B32_vi = 7045
    Feature_isGCN | Feature_isSICI | 0, // S_ORN2_B64_si = 7046
    Feature_isGCN | Feature_isVI | 0, // S_ORN2_B64_vi = 7047
    Feature_isGCN | Feature_isSICI | 0, // S_ORN2_SAVEEXEC_B64_si = 7048
    Feature_isGCN | Feature_isVI | 0, // S_ORN2_SAVEEXEC_B64_vi = 7049
    Feature_isGCN | Feature_isSICI | 0, // S_OR_B32_si = 7050
    Feature_isGCN | Feature_isVI | 0, // S_OR_B32_vi = 7051
    Feature_isGCN | Feature_isSICI | 0, // S_OR_B64_si = 7052
    Feature_isGCN | Feature_isVI | 0, // S_OR_B64_vi = 7053
    Feature_isGCN | Feature_isSICI | 0, // S_OR_SAVEEXEC_B64_si = 7054
    Feature_isGCN | Feature_isVI | 0, // S_OR_SAVEEXEC_B64_vi = 7055
    Feature_isGFX9 | Feature_isVI | 0, // S_PACK_HH_B32_B16_vi = 7056
    Feature_isGFX9 | Feature_isVI | 0, // S_PACK_LH_B32_B16_vi = 7057
    Feature_isGFX9 | Feature_isVI | 0, // S_PACK_LL_B32_B16_vi = 7058
    Feature_isGCN | Feature_isSICI | 0, // S_QUADMASK_B32_si = 7059
    Feature_isGCN | Feature_isVI | 0, // S_QUADMASK_B32_vi = 7060
    Feature_isGCN | Feature_isSICI | 0, // S_QUADMASK_B64_si = 7061
    Feature_isGCN | Feature_isVI | 0, // S_QUADMASK_B64_vi = 7062
    Feature_isGCN | Feature_isSICI | 0, // S_RFE_B64_si = 7063
    Feature_isGCN | Feature_isVI | 0, // S_RFE_B64_vi = 7064
    Feature_isVI | Feature_isVI | 0, // S_RFE_RESTORE_B64_vi = 7065
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // S_SCRATCH_LOAD_DWORDX2_IMM_vi = 7066
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // S_SCRATCH_LOAD_DWORDX2_SGPR_vi = 7067
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // S_SCRATCH_LOAD_DWORDX4_IMM_vi = 7068
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // S_SCRATCH_LOAD_DWORDX4_SGPR_vi = 7069
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // S_SCRATCH_LOAD_DWORD_IMM_vi = 7070
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // S_SCRATCH_LOAD_DWORD_SGPR_vi = 7071
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // S_SCRATCH_STORE_DWORDX2_IMM_vi = 7072
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // S_SCRATCH_STORE_DWORDX2_SGPR_vi = 7073
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // S_SCRATCH_STORE_DWORDX4_IMM_vi = 7074
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // S_SCRATCH_STORE_DWORDX4_SGPR_vi = 7075
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // S_SCRATCH_STORE_DWORD_IMM_vi = 7076
    Feature_HasFlatScratchInsts | Feature_isVI | 0, // S_SCRATCH_STORE_DWORD_SGPR_vi = 7077
    Feature_isGCN | 0, // S_SENDMSG = 7078
    Feature_isGCN | 0, // S_SENDMSGHALT = 7079
    Feature_isGCN | 0, // S_SETHALT = 7080
    Feature_isGCN | 0, // S_SETKILL = 7081
    Feature_isGCN | Feature_isSICI | 0, // S_SETPC_B64_si = 7082
    Feature_isGCN | Feature_isVI | 0, // S_SETPC_B64_vi = 7083
    Feature_isGCN | 0, // S_SETPRIO = 7084
    Feature_isGCN | Feature_isSICI | 0, // S_SETREG_B32_si = 7085
    Feature_isGCN | Feature_isVI | 0, // S_SETREG_B32_vi = 7086
    Feature_isGCN | Feature_isSICI | 0, // S_SETREG_IMM32_B32_si = 7087
    Feature_isGCN | Feature_isVI | 0, // S_SETREG_IMM32_B32_vi = 7088
    Feature_isGCN | 0, // S_SETVSKIP = 7089
    Feature_HasVGPRIndexMode | Feature_isVI | 0, // S_SET_GPR_IDX_IDX_vi = 7090
    Feature_HasVGPRIndexMode | 0, // S_SET_GPR_IDX_MODE = 7091
    Feature_HasVGPRIndexMode | 0, // S_SET_GPR_IDX_OFF = 7092
    Feature_HasVGPRIndexMode | 0, // S_SET_GPR_IDX_ON = 7093
    Feature_isGCN | Feature_isSICI | 0, // S_SEXT_I32_I16_si = 7094
    Feature_isGCN | Feature_isVI | 0, // S_SEXT_I32_I16_vi = 7095
    Feature_isGCN | Feature_isSICI | 0, // S_SEXT_I32_I8_si = 7096
    Feature_isGCN | Feature_isVI | 0, // S_SEXT_I32_I8_vi = 7097
    Feature_isGCN | 0, // S_SLEEP = 7098
    Feature_isGCN | Feature_isVI | 0, // S_STORE_DWORDX2_IMM_vi = 7099
    Feature_isGCN | Feature_isVI | 0, // S_STORE_DWORDX2_SGPR_vi = 7100
    Feature_isGCN | Feature_isVI | 0, // S_STORE_DWORDX4_IMM_vi = 7101
    Feature_isGCN | Feature_isVI | 0, // S_STORE_DWORDX4_SGPR_vi = 7102
    Feature_isGCN | Feature_isVI | 0, // S_STORE_DWORD_IMM_vi = 7103
    Feature_isGCN | Feature_isVI | 0, // S_STORE_DWORD_SGPR_vi = 7104
    Feature_isGCN | Feature_isSICI | 0, // S_SUBB_U32_si = 7105
    Feature_isGCN | Feature_isVI | 0, // S_SUBB_U32_vi = 7106
    Feature_isGCN | Feature_isSICI | 0, // S_SUB_I32_si = 7107
    Feature_isGCN | Feature_isVI | 0, // S_SUB_I32_vi = 7108
    Feature_isGCN | Feature_isSICI | 0, // S_SUB_U32_si = 7109
    Feature_isGCN | Feature_isVI | 0, // S_SUB_U32_vi = 7110
    Feature_isGCN | Feature_isSICI | 0, // S_SWAPPC_B64_si = 7111
    Feature_isGCN | Feature_isVI | 0, // S_SWAPPC_B64_vi = 7112
    Feature_isGCN | 0, // S_TRAP = 7113
    Feature_isGCN | 0, // S_TTRACEDATA = 7114
    Feature_isGCN | 0, // S_WAITCNT = 7115
    Feature_isVI | 0, // S_WAKEUP = 7116
    Feature_isGCN | Feature_isSICI | 0, // S_WQM_B32_si = 7117
    Feature_isGCN | Feature_isVI | 0, // S_WQM_B32_vi = 7118
    Feature_isGCN | Feature_isSICI | 0, // S_WQM_B64_si = 7119
    Feature_isGCN | Feature_isVI | 0, // S_WQM_B64_vi = 7120
    Feature_isGCN | Feature_isSICI | 0, // S_XNOR_B32_si = 7121
    Feature_isGCN | Feature_isVI | 0, // S_XNOR_B32_vi = 7122
    Feature_isGCN | Feature_isSICI | 0, // S_XNOR_B64_si = 7123
    Feature_isGCN | Feature_isVI | 0, // S_XNOR_B64_vi = 7124
    Feature_isGCN | Feature_isSICI | 0, // S_XNOR_SAVEEXEC_B64_si = 7125
    Feature_isGCN | Feature_isVI | 0, // S_XNOR_SAVEEXEC_B64_vi = 7126
    Feature_isGCN | Feature_isSICI | 0, // S_XOR_B32_si = 7127
    Feature_isGCN | Feature_isVI | 0, // S_XOR_B32_vi = 7128
    Feature_isGCN | Feature_isSICI | 0, // S_XOR_B64_si = 7129
    Feature_isGCN | Feature_isVI | 0, // S_XOR_B64_vi = 7130
    Feature_isGCN | Feature_isSICI | 0, // S_XOR_SAVEEXEC_B64_si = 7131
    Feature_isGCN | Feature_isVI | 0, // S_XOR_SAVEEXEC_B64_vi = 7132
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_BOTHEN_vi = 7133
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_IDXEN_vi = 7134
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_OFFEN_vi = 7135
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_OFFSET_vi = 7136
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80 = 7137
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_IDXEN_gfx80 = 7138
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFEN_gfx80 = 7139
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80 = 7140
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_BOTHEN_vi = 7141
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_IDXEN_vi = 7142
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_OFFEN_vi = 7143
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_OFFSET_vi = 7144
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_BOTHEN_gfx80 = 7145
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_IDXEN_gfx80 = 7146
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFEN_gfx80 = 7147
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XYZ_gfx80_OFFSET_gfx80 = 7148
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_XY_BOTHEN_vi = 7149
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_XY_IDXEN_vi = 7150
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_XY_OFFEN_vi = 7151
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_XY_OFFSET_vi = 7152
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_gfx80_BOTHEN_gfx80 = 7153
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_gfx80_IDXEN_gfx80 = 7154
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFEN_gfx80 = 7155
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_XY_gfx80_OFFSET_gfx80 = 7156
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_X_BOTHEN_vi = 7157
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_X_IDXEN_vi = 7158
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_X_OFFEN_vi = 7159
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_D16_X_OFFSET_vi = 7160
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_gfx80_BOTHEN_gfx80 = 7161
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_gfx80_IDXEN_gfx80 = 7162
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_gfx80_OFFEN_gfx80 = 7163
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_LOAD_FORMAT_D16_X_gfx80_OFFSET_gfx80 = 7164
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XYZW_ADDR64_si = 7165
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XYZW_BOTHEN_si = 7166
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_XYZW_BOTHEN_vi = 7167
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XYZW_IDXEN_si = 7168
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_XYZW_IDXEN_vi = 7169
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XYZW_OFFEN_si = 7170
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_XYZW_OFFEN_vi = 7171
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XYZW_OFFSET_si = 7172
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_XYZW_OFFSET_vi = 7173
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XYZ_ADDR64_si = 7174
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XYZ_BOTHEN_si = 7175
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_XYZ_BOTHEN_vi = 7176
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XYZ_IDXEN_si = 7177
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_XYZ_IDXEN_vi = 7178
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XYZ_OFFEN_si = 7179
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_XYZ_OFFEN_vi = 7180
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XYZ_OFFSET_si = 7181
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_XYZ_OFFSET_vi = 7182
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XY_ADDR64_si = 7183
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XY_BOTHEN_si = 7184
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_XY_BOTHEN_vi = 7185
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XY_IDXEN_si = 7186
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_XY_IDXEN_vi = 7187
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XY_OFFEN_si = 7188
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_XY_OFFEN_vi = 7189
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_XY_OFFSET_si = 7190
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_XY_OFFSET_vi = 7191
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_X_ADDR64_si = 7192
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_X_BOTHEN_si = 7193
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_X_BOTHEN_vi = 7194
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_X_IDXEN_si = 7195
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_X_IDXEN_vi = 7196
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_X_OFFEN_si = 7197
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_X_OFFEN_vi = 7198
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_LOAD_FORMAT_X_OFFSET_si = 7199
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_LOAD_FORMAT_X_OFFSET_vi = 7200
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_BOTHEN_vi = 7201
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_IDXEN_vi = 7202
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_OFFEN_vi = 7203
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_OFFSET_vi = 7204
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_BOTHEN_gfx80 = 7205
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_IDXEN_gfx80 = 7206
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFEN_gfx80 = 7207
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZW_gfx80_OFFSET_gfx80 = 7208
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_BOTHEN_vi = 7209
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_IDXEN_vi = 7210
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_OFFEN_vi = 7211
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_OFFSET_vi = 7212
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_BOTHEN_gfx80 = 7213
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_IDXEN_gfx80 = 7214
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFEN_gfx80 = 7215
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XYZ_gfx80_OFFSET_gfx80 = 7216
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_XY_BOTHEN_vi = 7217
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_XY_IDXEN_vi = 7218
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_XY_OFFEN_vi = 7219
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_XY_OFFSET_vi = 7220
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_gfx80_BOTHEN_gfx80 = 7221
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_gfx80_IDXEN_gfx80 = 7222
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_gfx80_OFFEN_gfx80 = 7223
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_XY_gfx80_OFFSET_gfx80 = 7224
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_X_BOTHEN_vi = 7225
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_X_IDXEN_vi = 7226
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_X_OFFEN_vi = 7227
    Feature_HasPackedD16VMem | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_D16_X_OFFSET_vi = 7228
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_gfx80_BOTHEN_gfx80 = 7229
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_gfx80_IDXEN_gfx80 = 7230
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_gfx80_OFFEN_gfx80 = 7231
    Feature_HasUnpackedD16VMem | Feature_HasUnpackedD16VMem | 0, // TBUFFER_STORE_FORMAT_D16_X_gfx80_OFFSET_gfx80 = 7232
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XYZW_ADDR64_si = 7233
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XYZW_BOTHEN_si = 7234
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_XYZW_BOTHEN_vi = 7235
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XYZW_IDXEN_si = 7236
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_XYZW_IDXEN_vi = 7237
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XYZW_OFFEN_si = 7238
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_XYZW_OFFEN_vi = 7239
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XYZW_OFFSET_si = 7240
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_XYZW_OFFSET_vi = 7241
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XYZ_ADDR64_si = 7242
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XYZ_BOTHEN_si = 7243
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_XYZ_BOTHEN_vi = 7244
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XYZ_IDXEN_si = 7245
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_XYZ_IDXEN_vi = 7246
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XYZ_OFFEN_si = 7247
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_XYZ_OFFEN_vi = 7248
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XYZ_OFFSET_si = 7249
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_XYZ_OFFSET_vi = 7250
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XY_ADDR64_si = 7251
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XY_BOTHEN_si = 7252
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_XY_BOTHEN_vi = 7253
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XY_IDXEN_si = 7254
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_XY_IDXEN_vi = 7255
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XY_OFFEN_si = 7256
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_XY_OFFEN_vi = 7257
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_XY_OFFSET_si = 7258
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_XY_OFFSET_vi = 7259
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_X_ADDR64_si = 7260
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_X_BOTHEN_si = 7261
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_X_BOTHEN_vi = 7262
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_X_IDXEN_si = 7263
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_X_IDXEN_vi = 7264
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_X_OFFEN_si = 7265
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_X_OFFEN_vi = 7266
    Feature_isGCN | Feature_isSICI | 0, // TBUFFER_STORE_FORMAT_X_OFFSET_si = 7267
    Feature_isGCN | Feature_isVI | 0, // TBUFFER_STORE_FORMAT_X_OFFSET_vi = 7268
    Feature_isGFX9 | Feature_isVI | 0, // V_ADD3_U32_vi = 7269
    Feature_isGCN | Feature_HasDPP | Feature_isGFX9 | 0, // V_ADDC_CO_U32_dpp_gfx9 = 7270
    Feature_isGCN | Feature_isGFX9 | 0, // V_ADDC_CO_U32_e32_gfx9 = 7271
    Feature_isGCN | Feature_isGFX9 | 0, // V_ADDC_CO_U32_e64_gfx9 = 7272
    Feature_HasSDWA9 | Feature_HasSDWA9 | Feature_isGFX9 | 0, // V_ADDC_CO_U32_sdwa_gfx9 = 7273
    Feature_isGCN | Feature_HasDPP | Feature_isVIOnly | 0, // V_ADDC_U32_dpp_vi = 7274
    Feature_isGCN | Feature_isSICI | 0, // V_ADDC_U32_e32_si = 7275
    Feature_isGCN | Feature_isVIOnly | 0, // V_ADDC_U32_e32_vi = 7276
    Feature_isGCN | Feature_isSICI | 0, // V_ADDC_U32_e64_si = 7277
    Feature_isGCN | Feature_isVIOnly | 0, // V_ADDC_U32_e64_vi = 7278
    Feature_isGCN | Feature_HasSDWA | Feature_isVIOnly | 0, // V_ADDC_U32_sdwa_vi = 7279
    Feature_isGCN | Feature_HasDPP | Feature_isGFX9 | 0, // V_ADD_CO_U32_dpp_gfx9 = 7280
    Feature_isGCN | Feature_isGFX9 | 0, // V_ADD_CO_U32_e32_gfx9 = 7281
    Feature_isGCN | Feature_isGFX9 | 0, // V_ADD_CO_U32_e64_gfx9 = 7282
    Feature_HasSDWA9 | Feature_HasSDWA9 | Feature_isGFX9 | 0, // V_ADD_CO_U32_sdwa_gfx9 = 7283
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_ADD_F16_dpp_vi = 7284
    Feature_Has16BitInsts | Feature_isVI | 0, // V_ADD_F16_e32_vi = 7285
    Feature_Has16BitInsts | Feature_isVI | 0, // V_ADD_F16_e64_vi = 7286
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_ADD_F16_sdwa_gfx9 = 7287
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_ADD_F16_sdwa_vi = 7288
    Feature_isGCN | Feature_HasDPP | 0, // V_ADD_F32_dpp_vi = 7289
    Feature_isGCN | Feature_isSICI | 0, // V_ADD_F32_e32_si = 7290
    Feature_isGCN | Feature_isVI | 0, // V_ADD_F32_e32_vi = 7291
    Feature_isGCN | Feature_isSICI | 0, // V_ADD_F32_e64_si = 7292
    Feature_isGCN | Feature_isVI | 0, // V_ADD_F32_e64_vi = 7293
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_ADD_F32_sdwa_gfx9 = 7294
    Feature_isGCN | Feature_HasSDWA | 0, // V_ADD_F32_sdwa_vi = 7295
    Feature_isGCN | Feature_isSICI | 0, // V_ADD_F64_si = 7296
    Feature_isGCN | Feature_isVI | 0, // V_ADD_F64_vi = 7297
    Feature_isGFX9 | Feature_isVI | 0, // V_ADD_I16_vi = 7298
    Feature_isGCN | Feature_isSICI | 0, // V_ADD_I32_e32_si = 7299
    Feature_isGCN | Feature_isSICI | 0, // V_ADD_I32_e64_si = 7300
    Feature_isGFX9 | Feature_isGFX9 | 0, // V_ADD_I32_gfx9_gfx9 = 7301
    Feature_isGFX9 | Feature_isVI | 0, // V_ADD_LSHL_U32_vi = 7302
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_ADD_U16_dpp_vi = 7303
    Feature_Has16BitInsts | Feature_isVI | 0, // V_ADD_U16_e32_vi = 7304
    Feature_Has16BitInsts | Feature_isVI | 0, // V_ADD_U16_e64_vi = 7305
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_ADD_U16_sdwa_gfx9 = 7306
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_ADD_U16_sdwa_vi = 7307
    Feature_HasAddNoCarryInsts | Feature_HasDPP | Feature_isGFX9 | 0, // V_ADD_U32_dpp_gfx9 = 7308
    Feature_isGCN | Feature_HasDPP | Feature_isVIOnly | 0, // V_ADD_U32_dpp_vi = 7309
    Feature_HasAddNoCarryInsts | Feature_isGFX9 | 0, // V_ADD_U32_e32_gfx9 = 7310
    Feature_isGCN | Feature_isVIOnly | 0, // V_ADD_U32_e32_vi = 7311
    Feature_HasAddNoCarryInsts | Feature_isGFX9 | 0, // V_ADD_U32_e64_gfx9 = 7312
    Feature_isGCN | Feature_isVIOnly | 0, // V_ADD_U32_e64_vi = 7313
    Feature_HasSDWA9 | Feature_HasSDWA9 | Feature_isGFX9 | 0, // V_ADD_U32_sdwa_gfx9 = 7314
    Feature_isGCN | Feature_HasSDWA | Feature_isVIOnly | 0, // V_ADD_U32_sdwa_vi = 7315
    Feature_isGCN | Feature_isSICI | 0, // V_ALIGNBIT_B32_si = 7316
    Feature_isGCN | Feature_isVI | 0, // V_ALIGNBIT_B32_vi = 7317
    Feature_isGCN | Feature_isSICI | 0, // V_ALIGNBYTE_B32_si = 7318
    Feature_isGCN | Feature_isVI | 0, // V_ALIGNBYTE_B32_vi = 7319
    Feature_isGCN | Feature_HasDPP | 0, // V_AND_B32_dpp_vi = 7320
    Feature_isGCN | Feature_isSICI | 0, // V_AND_B32_e32_si = 7321
    Feature_isGCN | Feature_isVI | 0, // V_AND_B32_e32_vi = 7322
    Feature_isGCN | Feature_isSICI | 0, // V_AND_B32_e64_si = 7323
    Feature_isGCN | Feature_isVI | 0, // V_AND_B32_e64_vi = 7324
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_AND_B32_sdwa_gfx9 = 7325
    Feature_isGCN | Feature_HasSDWA | 0, // V_AND_B32_sdwa_vi = 7326
    Feature_isGFX9 | Feature_isVI | 0, // V_AND_OR_B32_vi = 7327
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_ASHRREV_I16_dpp_vi = 7328
    Feature_Has16BitInsts | Feature_isVI | 0, // V_ASHRREV_I16_e32_vi = 7329
    Feature_Has16BitInsts | Feature_isVI | 0, // V_ASHRREV_I16_e64_vi = 7330
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_ASHRREV_I16_sdwa_gfx9 = 7331
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_ASHRREV_I16_sdwa_vi = 7332
    Feature_isGCN | Feature_HasDPP | 0, // V_ASHRREV_I32_dpp_vi = 7333
    Feature_isGCN | Feature_isSICI | 0, // V_ASHRREV_I32_e32_si = 7334
    Feature_isGCN | Feature_isVI | 0, // V_ASHRREV_I32_e32_vi = 7335
    Feature_isGCN | Feature_isSICI | 0, // V_ASHRREV_I32_e64_si = 7336
    Feature_isGCN | Feature_isVI | 0, // V_ASHRREV_I32_e64_vi = 7337
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_ASHRREV_I32_sdwa_gfx9 = 7338
    Feature_isGCN | Feature_HasSDWA | 0, // V_ASHRREV_I32_sdwa_vi = 7339
    Feature_isVI | Feature_isVI | 0, // V_ASHRREV_I64_vi = 7340
    Feature_isSICI | Feature_isSICI | 0, // V_ASHR_I32_e32_si = 7341
    Feature_isSICI | Feature_isSICI | 0, // V_ASHR_I32_e64_si = 7342
    Feature_isSICI | Feature_isSICI | 0, // V_ASHR_I64_si = 7343
    Feature_isGCN | Feature_isSICI | 0, // V_BCNT_U32_B32_e32_si = 7344
    Feature_isGCN | Feature_isSICI | 0, // V_BCNT_U32_B32_e64_si = 7345
    Feature_isGCN | Feature_isVI | 0, // V_BCNT_U32_B32_e64_vi = 7346
    Feature_isGCN | Feature_isSICI | 0, // V_BFE_I32_si = 7347
    Feature_isGCN | Feature_isVI | 0, // V_BFE_I32_vi = 7348
    Feature_isGCN | Feature_isSICI | 0, // V_BFE_U32_si = 7349
    Feature_isGCN | Feature_isVI | 0, // V_BFE_U32_vi = 7350
    Feature_isGCN | Feature_isSICI | 0, // V_BFI_B32_si = 7351
    Feature_isGCN | Feature_isVI | 0, // V_BFI_B32_vi = 7352
    Feature_isGCN | Feature_isSICI | 0, // V_BFM_B32_e32_si = 7353
    Feature_isGCN | Feature_isSICI | 0, // V_BFM_B32_e64_si = 7354
    Feature_isGCN | Feature_isVI | 0, // V_BFM_B32_e64_vi = 7355
    Feature_HasDPP | Feature_HasDPP | 0, // V_BFREV_B32_dpp_vi = 7356
    Feature_isGCN | Feature_isSICI | 0, // V_BFREV_B32_e32_si = 7357
    Feature_isGCN | Feature_isVI | 0, // V_BFREV_B32_e32_vi = 7358
    Feature_isGCN | Feature_isSICI | 0, // V_BFREV_B32_e64_si = 7359
    Feature_isGCN | Feature_isVI | 0, // V_BFREV_B32_e64_vi = 7360
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_BFREV_B32_sdwa_gfx9 = 7361
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_BFREV_B32_sdwa_vi = 7362
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_CEIL_F16_dpp_vi = 7363
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CEIL_F16_e32_vi = 7364
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CEIL_F16_e64_vi = 7365
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CEIL_F16_sdwa_gfx9 = 7366
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CEIL_F16_sdwa_vi = 7367
    Feature_HasDPP | Feature_HasDPP | 0, // V_CEIL_F32_dpp_vi = 7368
    Feature_isGCN | Feature_isSICI | 0, // V_CEIL_F32_e32_si = 7369
    Feature_isGCN | Feature_isVI | 0, // V_CEIL_F32_e32_vi = 7370
    Feature_isGCN | Feature_isSICI | 0, // V_CEIL_F32_e64_si = 7371
    Feature_isGCN | Feature_isVI | 0, // V_CEIL_F32_e64_vi = 7372
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CEIL_F32_sdwa_gfx9 = 7373
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CEIL_F32_sdwa_vi = 7374
    Feature_isCIVI | Feature_isCIOnly | 0, // V_CEIL_F64_e32_ci = 7375
    Feature_isCIVI | Feature_isVI | 0, // V_CEIL_F64_e32_vi = 7376
    Feature_isCIVI | Feature_isCIOnly | 0, // V_CEIL_F64_e64_ci = 7377
    Feature_isCIVI | Feature_isVI | 0, // V_CEIL_F64_e64_vi = 7378
    Feature_DisableInst | Feature_DisableInst | 0, // V_CEIL_F64_sdwa_gfx9 = 7379
    Feature_isCIVI | Feature_DisableInst | 0, // V_CEIL_F64_sdwa_vi = 7380
    Feature_isGCN | Feature_isSICI | 0, // V_CLREXCP_e32_si = 7381
    Feature_isGCN | Feature_isVI | 0, // V_CLREXCP_e32_vi = 7382
    Feature_isGCN | Feature_isSICI | 0, // V_CLREXCP_e64_si = 7383
    Feature_isGCN | Feature_isVI | 0, // V_CLREXCP_e64_vi = 7384
    Feature_DisableInst | Feature_DisableInst | 0, // V_CLREXCP_sdwa_gfx9 = 7385
    Feature_DisableInst | Feature_DisableInst | 0, // V_CLREXCP_sdwa_vi = 7386
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_EQ_F32_e32_si = 7387
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_EQ_F32_e64_si = 7388
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_EQ_F64_e32_si = 7389
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_EQ_F64_e64_si = 7390
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_F_F32_e32_si = 7391
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_F_F32_e64_si = 7392
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_F_F64_e32_si = 7393
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_F_F64_e64_si = 7394
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_GE_F32_e32_si = 7395
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_GE_F32_e64_si = 7396
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_GE_F64_e32_si = 7397
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_GE_F64_e64_si = 7398
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_GT_F32_e32_si = 7399
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_GT_F32_e64_si = 7400
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_GT_F64_e32_si = 7401
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_GT_F64_e64_si = 7402
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_LE_F32_e32_si = 7403
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_LE_F32_e64_si = 7404
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_LE_F64_e32_si = 7405
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_LE_F64_e64_si = 7406
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_LG_F32_e32_si = 7407
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_LG_F32_e64_si = 7408
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_LG_F64_e32_si = 7409
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_LG_F64_e64_si = 7410
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_LT_F32_e32_si = 7411
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_LT_F32_e64_si = 7412
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_LT_F64_e32_si = 7413
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_LT_F64_e64_si = 7414
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NEQ_F32_e32_si = 7415
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NEQ_F32_e64_si = 7416
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NEQ_F64_e32_si = 7417
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NEQ_F64_e64_si = 7418
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NGE_F32_e32_si = 7419
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NGE_F32_e64_si = 7420
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NGE_F64_e32_si = 7421
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NGE_F64_e64_si = 7422
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NGT_F32_e32_si = 7423
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NGT_F32_e64_si = 7424
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NGT_F64_e32_si = 7425
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NGT_F64_e64_si = 7426
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NLE_F32_e32_si = 7427
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NLE_F32_e64_si = 7428
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NLE_F64_e32_si = 7429
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NLE_F64_e64_si = 7430
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NLG_F32_e32_si = 7431
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NLG_F32_e64_si = 7432
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NLG_F64_e32_si = 7433
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NLG_F64_e64_si = 7434
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NLT_F32_e32_si = 7435
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NLT_F32_e64_si = 7436
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NLT_F64_e32_si = 7437
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_NLT_F64_e64_si = 7438
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_O_F32_e32_si = 7439
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_O_F32_e64_si = 7440
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_O_F64_e32_si = 7441
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_O_F64_e64_si = 7442
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_TRU_F32_e32_si = 7443
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_TRU_F32_e64_si = 7444
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_TRU_F64_e32_si = 7445
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_TRU_F64_e64_si = 7446
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_U_F32_e32_si = 7447
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_U_F32_e64_si = 7448
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_U_F64_e32_si = 7449
    Feature_isSICI | Feature_isSICI | 0, // V_CMPSX_U_F64_e64_si = 7450
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_EQ_F32_e32_si = 7451
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_EQ_F32_e64_si = 7452
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_EQ_F64_e32_si = 7453
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_EQ_F64_e64_si = 7454
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_F_F32_e32_si = 7455
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_F_F32_e64_si = 7456
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_F_F64_e32_si = 7457
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_F_F64_e64_si = 7458
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_GE_F32_e32_si = 7459
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_GE_F32_e64_si = 7460
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_GE_F64_e32_si = 7461
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_GE_F64_e64_si = 7462
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_GT_F32_e32_si = 7463
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_GT_F32_e64_si = 7464
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_GT_F64_e32_si = 7465
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_GT_F64_e64_si = 7466
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_LE_F32_e32_si = 7467
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_LE_F32_e64_si = 7468
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_LE_F64_e32_si = 7469
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_LE_F64_e64_si = 7470
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_LG_F32_e32_si = 7471
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_LG_F32_e64_si = 7472
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_LG_F64_e32_si = 7473
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_LG_F64_e64_si = 7474
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_LT_F32_e32_si = 7475
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_LT_F32_e64_si = 7476
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_LT_F64_e32_si = 7477
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_LT_F64_e64_si = 7478
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NEQ_F32_e32_si = 7479
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NEQ_F32_e64_si = 7480
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NEQ_F64_e32_si = 7481
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NEQ_F64_e64_si = 7482
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NGE_F32_e32_si = 7483
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NGE_F32_e64_si = 7484
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NGE_F64_e32_si = 7485
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NGE_F64_e64_si = 7486
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NGT_F32_e32_si = 7487
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NGT_F32_e64_si = 7488
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NGT_F64_e32_si = 7489
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NGT_F64_e64_si = 7490
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NLE_F32_e32_si = 7491
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NLE_F32_e64_si = 7492
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NLE_F64_e32_si = 7493
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NLE_F64_e64_si = 7494
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NLG_F32_e32_si = 7495
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NLG_F32_e64_si = 7496
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NLG_F64_e32_si = 7497
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NLG_F64_e64_si = 7498
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NLT_F32_e32_si = 7499
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NLT_F32_e64_si = 7500
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NLT_F64_e32_si = 7501
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_NLT_F64_e64_si = 7502
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_O_F32_e32_si = 7503
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_O_F32_e64_si = 7504
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_O_F64_e32_si = 7505
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_O_F64_e64_si = 7506
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_TRU_F32_e32_si = 7507
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_TRU_F32_e64_si = 7508
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_TRU_F64_e32_si = 7509
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_TRU_F64_e64_si = 7510
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_U_F32_e32_si = 7511
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_U_F32_e64_si = 7512
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_U_F64_e32_si = 7513
    Feature_isSICI | Feature_isSICI | 0, // V_CMPS_U_F64_e64_si = 7514
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_CLASS_F16_e32_vi = 7515
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_CLASS_F16_e64_vi = 7516
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_CLASS_F16_sdwa_gfx9 = 7517
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_CLASS_F16_sdwa_vi = 7518
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_CLASS_F32_e32_si = 7519
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_CLASS_F32_e32_vi = 7520
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_CLASS_F32_e64_si = 7521
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_CLASS_F32_e64_vi = 7522
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_CLASS_F32_sdwa_gfx9 = 7523
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_CLASS_F32_sdwa_vi = 7524
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_CLASS_F64_e32_si = 7525
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_CLASS_F64_e32_vi = 7526
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_CLASS_F64_e64_si = 7527
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_CLASS_F64_e64_vi = 7528
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_CLASS_F64_sdwa_gfx9 = 7529
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_CLASS_F64_sdwa_vi = 7530
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_EQ_F16_e32_vi = 7531
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_EQ_F16_e64_vi = 7532
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_EQ_F16_sdwa_gfx9 = 7533
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_EQ_F16_sdwa_vi = 7534
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_EQ_F32_e32_si = 7535
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_EQ_F32_e32_vi = 7536
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_EQ_F32_e64_si = 7537
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_EQ_F32_e64_vi = 7538
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_EQ_F32_sdwa_gfx9 = 7539
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_EQ_F32_sdwa_vi = 7540
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_EQ_F64_e32_si = 7541
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_EQ_F64_e32_vi = 7542
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_EQ_F64_e64_si = 7543
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_EQ_F64_e64_vi = 7544
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_EQ_F64_sdwa_gfx9 = 7545
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_EQ_F64_sdwa_vi = 7546
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_EQ_I16_e32_vi = 7547
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_EQ_I16_e64_vi = 7548
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_EQ_I16_sdwa_gfx9 = 7549
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_EQ_I16_sdwa_vi = 7550
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_EQ_I32_e32_si = 7551
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_EQ_I32_e32_vi = 7552
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_EQ_I32_e64_si = 7553
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_EQ_I32_e64_vi = 7554
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_EQ_I32_sdwa_gfx9 = 7555
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_EQ_I32_sdwa_vi = 7556
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_EQ_I64_e32_si = 7557
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_EQ_I64_e32_vi = 7558
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_EQ_I64_e64_si = 7559
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_EQ_I64_e64_vi = 7560
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_EQ_I64_sdwa_gfx9 = 7561
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_EQ_I64_sdwa_vi = 7562
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_EQ_U16_e32_vi = 7563
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_EQ_U16_e64_vi = 7564
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_EQ_U16_sdwa_gfx9 = 7565
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_EQ_U16_sdwa_vi = 7566
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_EQ_U32_e32_si = 7567
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_EQ_U32_e32_vi = 7568
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_EQ_U32_e64_si = 7569
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_EQ_U32_e64_vi = 7570
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_EQ_U32_sdwa_gfx9 = 7571
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_EQ_U32_sdwa_vi = 7572
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_EQ_U64_e32_si = 7573
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_EQ_U64_e32_vi = 7574
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_EQ_U64_e64_si = 7575
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_EQ_U64_e64_vi = 7576
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_EQ_U64_sdwa_gfx9 = 7577
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_EQ_U64_sdwa_vi = 7578
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_F_F16_e32_vi = 7579
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_F_F16_e64_vi = 7580
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_F_F16_sdwa_gfx9 = 7581
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_F_F16_sdwa_vi = 7582
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_F_F32_e32_si = 7583
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_F_F32_e32_vi = 7584
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_F_F32_e64_si = 7585
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_F_F32_e64_vi = 7586
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_F_F32_sdwa_gfx9 = 7587
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_F_F32_sdwa_vi = 7588
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_F_F64_e32_si = 7589
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_F_F64_e32_vi = 7590
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_F_F64_e64_si = 7591
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_F_F64_e64_vi = 7592
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_F_F64_sdwa_gfx9 = 7593
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_F_F64_sdwa_vi = 7594
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_F_I16_e32_vi = 7595
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_F_I16_e64_vi = 7596
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_F_I16_sdwa_gfx9 = 7597
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_F_I16_sdwa_vi = 7598
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_F_I32_e32_si = 7599
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_F_I32_e32_vi = 7600
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_F_I32_e64_si = 7601
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_F_I32_e64_vi = 7602
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_F_I32_sdwa_gfx9 = 7603
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_F_I32_sdwa_vi = 7604
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_F_I64_e32_si = 7605
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_F_I64_e32_vi = 7606
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_F_I64_e64_si = 7607
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_F_I64_e64_vi = 7608
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_F_I64_sdwa_gfx9 = 7609
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_F_I64_sdwa_vi = 7610
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_F_U16_e32_vi = 7611
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_F_U16_e64_vi = 7612
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_F_U16_sdwa_gfx9 = 7613
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_F_U16_sdwa_vi = 7614
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_F_U32_e32_si = 7615
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_F_U32_e32_vi = 7616
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_F_U32_e64_si = 7617
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_F_U32_e64_vi = 7618
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_F_U32_sdwa_gfx9 = 7619
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_F_U32_sdwa_vi = 7620
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_F_U64_e32_si = 7621
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_F_U64_e32_vi = 7622
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_F_U64_e64_si = 7623
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_F_U64_e64_vi = 7624
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_F_U64_sdwa_gfx9 = 7625
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_F_U64_sdwa_vi = 7626
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_GE_F16_e32_vi = 7627
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_GE_F16_e64_vi = 7628
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_GE_F16_sdwa_gfx9 = 7629
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_GE_F16_sdwa_vi = 7630
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GE_F32_e32_si = 7631
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GE_F32_e32_vi = 7632
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GE_F32_e64_si = 7633
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GE_F32_e64_vi = 7634
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_GE_F32_sdwa_gfx9 = 7635
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_GE_F32_sdwa_vi = 7636
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GE_F64_e32_si = 7637
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GE_F64_e32_vi = 7638
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GE_F64_e64_si = 7639
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GE_F64_e64_vi = 7640
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_GE_F64_sdwa_gfx9 = 7641
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_GE_F64_sdwa_vi = 7642
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_GE_I16_e32_vi = 7643
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_GE_I16_e64_vi = 7644
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_GE_I16_sdwa_gfx9 = 7645
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_GE_I16_sdwa_vi = 7646
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GE_I32_e32_si = 7647
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GE_I32_e32_vi = 7648
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GE_I32_e64_si = 7649
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GE_I32_e64_vi = 7650
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_GE_I32_sdwa_gfx9 = 7651
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_GE_I32_sdwa_vi = 7652
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GE_I64_e32_si = 7653
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GE_I64_e32_vi = 7654
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GE_I64_e64_si = 7655
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GE_I64_e64_vi = 7656
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_GE_I64_sdwa_gfx9 = 7657
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_GE_I64_sdwa_vi = 7658
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_GE_U16_e32_vi = 7659
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_GE_U16_e64_vi = 7660
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_GE_U16_sdwa_gfx9 = 7661
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_GE_U16_sdwa_vi = 7662
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GE_U32_e32_si = 7663
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GE_U32_e32_vi = 7664
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GE_U32_e64_si = 7665
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GE_U32_e64_vi = 7666
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_GE_U32_sdwa_gfx9 = 7667
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_GE_U32_sdwa_vi = 7668
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GE_U64_e32_si = 7669
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GE_U64_e32_vi = 7670
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GE_U64_e64_si = 7671
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GE_U64_e64_vi = 7672
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_GE_U64_sdwa_gfx9 = 7673
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_GE_U64_sdwa_vi = 7674
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_GT_F16_e32_vi = 7675
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_GT_F16_e64_vi = 7676
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_GT_F16_sdwa_gfx9 = 7677
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_GT_F16_sdwa_vi = 7678
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GT_F32_e32_si = 7679
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GT_F32_e32_vi = 7680
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GT_F32_e64_si = 7681
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GT_F32_e64_vi = 7682
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_GT_F32_sdwa_gfx9 = 7683
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_GT_F32_sdwa_vi = 7684
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GT_F64_e32_si = 7685
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GT_F64_e32_vi = 7686
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GT_F64_e64_si = 7687
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GT_F64_e64_vi = 7688
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_GT_F64_sdwa_gfx9 = 7689
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_GT_F64_sdwa_vi = 7690
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_GT_I16_e32_vi = 7691
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_GT_I16_e64_vi = 7692
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_GT_I16_sdwa_gfx9 = 7693
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_GT_I16_sdwa_vi = 7694
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GT_I32_e32_si = 7695
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GT_I32_e32_vi = 7696
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GT_I32_e64_si = 7697
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GT_I32_e64_vi = 7698
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_GT_I32_sdwa_gfx9 = 7699
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_GT_I32_sdwa_vi = 7700
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GT_I64_e32_si = 7701
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GT_I64_e32_vi = 7702
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GT_I64_e64_si = 7703
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GT_I64_e64_vi = 7704
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_GT_I64_sdwa_gfx9 = 7705
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_GT_I64_sdwa_vi = 7706
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_GT_U16_e32_vi = 7707
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_GT_U16_e64_vi = 7708
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_GT_U16_sdwa_gfx9 = 7709
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_GT_U16_sdwa_vi = 7710
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GT_U32_e32_si = 7711
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GT_U32_e32_vi = 7712
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GT_U32_e64_si = 7713
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GT_U32_e64_vi = 7714
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_GT_U32_sdwa_gfx9 = 7715
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_GT_U32_sdwa_vi = 7716
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GT_U64_e32_si = 7717
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GT_U64_e32_vi = 7718
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_GT_U64_e64_si = 7719
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_GT_U64_e64_vi = 7720
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_GT_U64_sdwa_gfx9 = 7721
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_GT_U64_sdwa_vi = 7722
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LE_F16_e32_vi = 7723
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LE_F16_e64_vi = 7724
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LE_F16_sdwa_gfx9 = 7725
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_LE_F16_sdwa_vi = 7726
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LE_F32_e32_si = 7727
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LE_F32_e32_vi = 7728
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LE_F32_e64_si = 7729
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LE_F32_e64_vi = 7730
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LE_F32_sdwa_gfx9 = 7731
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_LE_F32_sdwa_vi = 7732
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LE_F64_e32_si = 7733
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LE_F64_e32_vi = 7734
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LE_F64_e64_si = 7735
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LE_F64_e64_vi = 7736
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LE_F64_sdwa_gfx9 = 7737
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LE_F64_sdwa_vi = 7738
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LE_I16_e32_vi = 7739
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LE_I16_e64_vi = 7740
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LE_I16_sdwa_gfx9 = 7741
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_LE_I16_sdwa_vi = 7742
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LE_I32_e32_si = 7743
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LE_I32_e32_vi = 7744
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LE_I32_e64_si = 7745
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LE_I32_e64_vi = 7746
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LE_I32_sdwa_gfx9 = 7747
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_LE_I32_sdwa_vi = 7748
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LE_I64_e32_si = 7749
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LE_I64_e32_vi = 7750
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LE_I64_e64_si = 7751
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LE_I64_e64_vi = 7752
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LE_I64_sdwa_gfx9 = 7753
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LE_I64_sdwa_vi = 7754
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LE_U16_e32_vi = 7755
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LE_U16_e64_vi = 7756
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LE_U16_sdwa_gfx9 = 7757
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_LE_U16_sdwa_vi = 7758
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LE_U32_e32_si = 7759
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LE_U32_e32_vi = 7760
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LE_U32_e64_si = 7761
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LE_U32_e64_vi = 7762
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LE_U32_sdwa_gfx9 = 7763
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_LE_U32_sdwa_vi = 7764
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LE_U64_e32_si = 7765
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LE_U64_e32_vi = 7766
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LE_U64_e64_si = 7767
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LE_U64_e64_vi = 7768
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LE_U64_sdwa_gfx9 = 7769
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LE_U64_sdwa_vi = 7770
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LG_F16_e32_vi = 7771
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LG_F16_e64_vi = 7772
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LG_F16_sdwa_gfx9 = 7773
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_LG_F16_sdwa_vi = 7774
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LG_F32_e32_si = 7775
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LG_F32_e32_vi = 7776
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LG_F32_e64_si = 7777
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LG_F32_e64_vi = 7778
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LG_F32_sdwa_gfx9 = 7779
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_LG_F32_sdwa_vi = 7780
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LG_F64_e32_si = 7781
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LG_F64_e32_vi = 7782
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LG_F64_e64_si = 7783
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LG_F64_e64_vi = 7784
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LG_F64_sdwa_gfx9 = 7785
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LG_F64_sdwa_vi = 7786
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LT_F16_e32_vi = 7787
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LT_F16_e64_vi = 7788
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LT_F16_sdwa_gfx9 = 7789
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_LT_F16_sdwa_vi = 7790
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LT_F32_e32_si = 7791
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LT_F32_e32_vi = 7792
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LT_F32_e64_si = 7793
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LT_F32_e64_vi = 7794
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LT_F32_sdwa_gfx9 = 7795
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_LT_F32_sdwa_vi = 7796
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LT_F64_e32_si = 7797
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LT_F64_e32_vi = 7798
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LT_F64_e64_si = 7799
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LT_F64_e64_vi = 7800
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LT_F64_sdwa_gfx9 = 7801
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LT_F64_sdwa_vi = 7802
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LT_I16_e32_vi = 7803
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LT_I16_e64_vi = 7804
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LT_I16_sdwa_gfx9 = 7805
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_LT_I16_sdwa_vi = 7806
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LT_I32_e32_si = 7807
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LT_I32_e32_vi = 7808
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LT_I32_e64_si = 7809
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LT_I32_e64_vi = 7810
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LT_I32_sdwa_gfx9 = 7811
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_LT_I32_sdwa_vi = 7812
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LT_I64_e32_si = 7813
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LT_I64_e32_vi = 7814
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LT_I64_e64_si = 7815
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LT_I64_e64_vi = 7816
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LT_I64_sdwa_gfx9 = 7817
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LT_I64_sdwa_vi = 7818
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LT_U16_e32_vi = 7819
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_LT_U16_e64_vi = 7820
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LT_U16_sdwa_gfx9 = 7821
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_LT_U16_sdwa_vi = 7822
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LT_U32_e32_si = 7823
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LT_U32_e32_vi = 7824
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LT_U32_e64_si = 7825
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LT_U32_e64_vi = 7826
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_LT_U32_sdwa_gfx9 = 7827
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_LT_U32_sdwa_vi = 7828
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LT_U64_e32_si = 7829
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LT_U64_e32_vi = 7830
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_LT_U64_e64_si = 7831
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_LT_U64_e64_vi = 7832
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LT_U64_sdwa_gfx9 = 7833
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_LT_U64_sdwa_vi = 7834
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NEQ_F16_e32_vi = 7835
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NEQ_F16_e64_vi = 7836
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NEQ_F16_sdwa_gfx9 = 7837
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_NEQ_F16_sdwa_vi = 7838
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NEQ_F32_e32_si = 7839
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NEQ_F32_e32_vi = 7840
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NEQ_F32_e64_si = 7841
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NEQ_F32_e64_vi = 7842
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NEQ_F32_sdwa_gfx9 = 7843
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_NEQ_F32_sdwa_vi = 7844
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NEQ_F64_e32_si = 7845
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NEQ_F64_e32_vi = 7846
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NEQ_F64_e64_si = 7847
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NEQ_F64_e64_vi = 7848
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NEQ_F64_sdwa_gfx9 = 7849
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NEQ_F64_sdwa_vi = 7850
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NE_I16_e32_vi = 7851
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NE_I16_e64_vi = 7852
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NE_I16_sdwa_gfx9 = 7853
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_NE_I16_sdwa_vi = 7854
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NE_I32_e32_si = 7855
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NE_I32_e32_vi = 7856
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NE_I32_e64_si = 7857
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NE_I32_e64_vi = 7858
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NE_I32_sdwa_gfx9 = 7859
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_NE_I32_sdwa_vi = 7860
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NE_I64_e32_si = 7861
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NE_I64_e32_vi = 7862
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NE_I64_e64_si = 7863
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NE_I64_e64_vi = 7864
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NE_I64_sdwa_gfx9 = 7865
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NE_I64_sdwa_vi = 7866
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NE_U16_e32_vi = 7867
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NE_U16_e64_vi = 7868
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NE_U16_sdwa_gfx9 = 7869
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_NE_U16_sdwa_vi = 7870
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NE_U32_e32_si = 7871
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NE_U32_e32_vi = 7872
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NE_U32_e64_si = 7873
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NE_U32_e64_vi = 7874
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NE_U32_sdwa_gfx9 = 7875
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_NE_U32_sdwa_vi = 7876
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NE_U64_e32_si = 7877
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NE_U64_e32_vi = 7878
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NE_U64_e64_si = 7879
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NE_U64_e64_vi = 7880
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NE_U64_sdwa_gfx9 = 7881
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NE_U64_sdwa_vi = 7882
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NGE_F16_e32_vi = 7883
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NGE_F16_e64_vi = 7884
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NGE_F16_sdwa_gfx9 = 7885
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_NGE_F16_sdwa_vi = 7886
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NGE_F32_e32_si = 7887
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NGE_F32_e32_vi = 7888
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NGE_F32_e64_si = 7889
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NGE_F32_e64_vi = 7890
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NGE_F32_sdwa_gfx9 = 7891
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_NGE_F32_sdwa_vi = 7892
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NGE_F64_e32_si = 7893
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NGE_F64_e32_vi = 7894
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NGE_F64_e64_si = 7895
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NGE_F64_e64_vi = 7896
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NGE_F64_sdwa_gfx9 = 7897
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NGE_F64_sdwa_vi = 7898
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NGT_F16_e32_vi = 7899
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NGT_F16_e64_vi = 7900
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NGT_F16_sdwa_gfx9 = 7901
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_NGT_F16_sdwa_vi = 7902
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NGT_F32_e32_si = 7903
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NGT_F32_e32_vi = 7904
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NGT_F32_e64_si = 7905
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NGT_F32_e64_vi = 7906
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NGT_F32_sdwa_gfx9 = 7907
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_NGT_F32_sdwa_vi = 7908
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NGT_F64_e32_si = 7909
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NGT_F64_e32_vi = 7910
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NGT_F64_e64_si = 7911
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NGT_F64_e64_vi = 7912
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NGT_F64_sdwa_gfx9 = 7913
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NGT_F64_sdwa_vi = 7914
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NLE_F16_e32_vi = 7915
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NLE_F16_e64_vi = 7916
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NLE_F16_sdwa_gfx9 = 7917
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_NLE_F16_sdwa_vi = 7918
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NLE_F32_e32_si = 7919
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NLE_F32_e32_vi = 7920
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NLE_F32_e64_si = 7921
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NLE_F32_e64_vi = 7922
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NLE_F32_sdwa_gfx9 = 7923
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_NLE_F32_sdwa_vi = 7924
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NLE_F64_e32_si = 7925
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NLE_F64_e32_vi = 7926
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NLE_F64_e64_si = 7927
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NLE_F64_e64_vi = 7928
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NLE_F64_sdwa_gfx9 = 7929
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NLE_F64_sdwa_vi = 7930
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NLG_F16_e32_vi = 7931
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NLG_F16_e64_vi = 7932
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NLG_F16_sdwa_gfx9 = 7933
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_NLG_F16_sdwa_vi = 7934
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NLG_F32_e32_si = 7935
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NLG_F32_e32_vi = 7936
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NLG_F32_e64_si = 7937
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NLG_F32_e64_vi = 7938
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NLG_F32_sdwa_gfx9 = 7939
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_NLG_F32_sdwa_vi = 7940
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NLG_F64_e32_si = 7941
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NLG_F64_e32_vi = 7942
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NLG_F64_e64_si = 7943
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NLG_F64_e64_vi = 7944
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NLG_F64_sdwa_gfx9 = 7945
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NLG_F64_sdwa_vi = 7946
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NLT_F16_e32_vi = 7947
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_NLT_F16_e64_vi = 7948
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NLT_F16_sdwa_gfx9 = 7949
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_NLT_F16_sdwa_vi = 7950
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NLT_F32_e32_si = 7951
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NLT_F32_e32_vi = 7952
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NLT_F32_e64_si = 7953
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NLT_F32_e64_vi = 7954
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_NLT_F32_sdwa_gfx9 = 7955
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_NLT_F32_sdwa_vi = 7956
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NLT_F64_e32_si = 7957
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NLT_F64_e32_vi = 7958
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_NLT_F64_e64_si = 7959
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_NLT_F64_e64_vi = 7960
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NLT_F64_sdwa_gfx9 = 7961
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_NLT_F64_sdwa_vi = 7962
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_O_F16_e32_vi = 7963
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_O_F16_e64_vi = 7964
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_O_F16_sdwa_gfx9 = 7965
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_O_F16_sdwa_vi = 7966
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_O_F32_e32_si = 7967
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_O_F32_e32_vi = 7968
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_O_F32_e64_si = 7969
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_O_F32_e64_vi = 7970
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_O_F32_sdwa_gfx9 = 7971
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_O_F32_sdwa_vi = 7972
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_O_F64_e32_si = 7973
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_O_F64_e32_vi = 7974
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_O_F64_e64_si = 7975
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_O_F64_e64_vi = 7976
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_O_F64_sdwa_gfx9 = 7977
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_O_F64_sdwa_vi = 7978
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_TRU_F16_e32_vi = 7979
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_TRU_F16_e64_vi = 7980
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_TRU_F16_sdwa_gfx9 = 7981
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_TRU_F16_sdwa_vi = 7982
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_TRU_F32_e32_si = 7983
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_TRU_F32_e32_vi = 7984
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_TRU_F32_e64_si = 7985
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_TRU_F32_e64_vi = 7986
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_TRU_F32_sdwa_gfx9 = 7987
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_TRU_F32_sdwa_vi = 7988
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_TRU_F64_e32_si = 7989
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_TRU_F64_e32_vi = 7990
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_TRU_F64_e64_si = 7991
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_TRU_F64_e64_vi = 7992
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_TRU_F64_sdwa_gfx9 = 7993
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_TRU_F64_sdwa_vi = 7994
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_T_I16_e32_vi = 7995
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_T_I16_e64_vi = 7996
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_T_I16_sdwa_gfx9 = 7997
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_T_I16_sdwa_vi = 7998
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_T_I32_e32_si = 7999
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_T_I32_e32_vi = 8000
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_T_I32_e64_si = 8001
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_T_I32_e64_vi = 8002
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_T_I32_sdwa_gfx9 = 8003
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_T_I32_sdwa_vi = 8004
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_T_I64_e32_si = 8005
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_T_I64_e32_vi = 8006
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_T_I64_e64_si = 8007
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_T_I64_e64_vi = 8008
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_T_I64_sdwa_gfx9 = 8009
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_T_I64_sdwa_vi = 8010
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_T_U16_e32_vi = 8011
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_T_U16_e64_vi = 8012
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_T_U16_sdwa_gfx9 = 8013
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_T_U16_sdwa_vi = 8014
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_T_U32_e32_si = 8015
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_T_U32_e32_vi = 8016
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_T_U32_e64_si = 8017
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_T_U32_e64_vi = 8018
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_T_U32_sdwa_gfx9 = 8019
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_T_U32_sdwa_vi = 8020
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_T_U64_e32_si = 8021
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_T_U64_e32_vi = 8022
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_T_U64_e64_si = 8023
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_T_U64_e64_vi = 8024
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_T_U64_sdwa_gfx9 = 8025
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_T_U64_sdwa_vi = 8026
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_U_F16_e32_vi = 8027
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMPX_U_F16_e64_vi = 8028
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_U_F16_sdwa_gfx9 = 8029
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMPX_U_F16_sdwa_vi = 8030
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_U_F32_e32_si = 8031
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_U_F32_e32_vi = 8032
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_U_F32_e64_si = 8033
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_U_F32_e64_vi = 8034
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMPX_U_F32_sdwa_gfx9 = 8035
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMPX_U_F32_sdwa_vi = 8036
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_U_F64_e32_si = 8037
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_U_F64_e32_vi = 8038
    Feature_isGCN | Feature_isSICI | 0, // V_CMPX_U_F64_e64_si = 8039
    Feature_isGCN | Feature_isVI | 0, // V_CMPX_U_F64_e64_vi = 8040
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_U_F64_sdwa_gfx9 = 8041
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMPX_U_F64_sdwa_vi = 8042
    Feature_isGCN | Feature_isVI | 0, // V_CMP_CLASS_F16_e32_vi = 8043
    Feature_isGCN | Feature_isVI | 0, // V_CMP_CLASS_F16_e64_vi = 8044
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_CLASS_F16_sdwa_gfx9 = 8045
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_CLASS_F16_sdwa_vi = 8046
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_CLASS_F32_e32_si = 8047
    Feature_isGCN | Feature_isVI | 0, // V_CMP_CLASS_F32_e32_vi = 8048
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_CLASS_F32_e64_si = 8049
    Feature_isGCN | Feature_isVI | 0, // V_CMP_CLASS_F32_e64_vi = 8050
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_CLASS_F32_sdwa_gfx9 = 8051
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_CLASS_F32_sdwa_vi = 8052
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_CLASS_F64_e32_si = 8053
    Feature_isGCN | Feature_isVI | 0, // V_CMP_CLASS_F64_e32_vi = 8054
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_CLASS_F64_e64_si = 8055
    Feature_isGCN | Feature_isVI | 0, // V_CMP_CLASS_F64_e64_vi = 8056
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_CLASS_F64_sdwa_gfx9 = 8057
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_CLASS_F64_sdwa_vi = 8058
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_EQ_F16_e32_vi = 8059
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_EQ_F16_e64_vi = 8060
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_EQ_F16_sdwa_gfx9 = 8061
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_EQ_F16_sdwa_vi = 8062
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_EQ_F32_e32_si = 8063
    Feature_isGCN | Feature_isVI | 0, // V_CMP_EQ_F32_e32_vi = 8064
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_EQ_F32_e64_si = 8065
    Feature_isGCN | Feature_isVI | 0, // V_CMP_EQ_F32_e64_vi = 8066
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_EQ_F32_sdwa_gfx9 = 8067
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_EQ_F32_sdwa_vi = 8068
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_EQ_F64_e32_si = 8069
    Feature_isGCN | Feature_isVI | 0, // V_CMP_EQ_F64_e32_vi = 8070
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_EQ_F64_e64_si = 8071
    Feature_isGCN | Feature_isVI | 0, // V_CMP_EQ_F64_e64_vi = 8072
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_EQ_F64_sdwa_gfx9 = 8073
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_EQ_F64_sdwa_vi = 8074
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_EQ_I16_e32_vi = 8075
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_EQ_I16_e64_vi = 8076
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_EQ_I16_sdwa_gfx9 = 8077
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_EQ_I16_sdwa_vi = 8078
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_EQ_I32_e32_si = 8079
    Feature_isGCN | Feature_isVI | 0, // V_CMP_EQ_I32_e32_vi = 8080
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_EQ_I32_e64_si = 8081
    Feature_isGCN | Feature_isVI | 0, // V_CMP_EQ_I32_e64_vi = 8082
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_EQ_I32_sdwa_gfx9 = 8083
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_EQ_I32_sdwa_vi = 8084
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_EQ_I64_e32_si = 8085
    Feature_isGCN | Feature_isVI | 0, // V_CMP_EQ_I64_e32_vi = 8086
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_EQ_I64_e64_si = 8087
    Feature_isGCN | Feature_isVI | 0, // V_CMP_EQ_I64_e64_vi = 8088
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_EQ_I64_sdwa_gfx9 = 8089
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_EQ_I64_sdwa_vi = 8090
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_EQ_U16_e32_vi = 8091
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_EQ_U16_e64_vi = 8092
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_EQ_U16_sdwa_gfx9 = 8093
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_EQ_U16_sdwa_vi = 8094
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_EQ_U32_e32_si = 8095
    Feature_isGCN | Feature_isVI | 0, // V_CMP_EQ_U32_e32_vi = 8096
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_EQ_U32_e64_si = 8097
    Feature_isGCN | Feature_isVI | 0, // V_CMP_EQ_U32_e64_vi = 8098
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_EQ_U32_sdwa_gfx9 = 8099
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_EQ_U32_sdwa_vi = 8100
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_EQ_U64_e32_si = 8101
    Feature_isGCN | Feature_isVI | 0, // V_CMP_EQ_U64_e32_vi = 8102
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_EQ_U64_e64_si = 8103
    Feature_isGCN | Feature_isVI | 0, // V_CMP_EQ_U64_e64_vi = 8104
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_EQ_U64_sdwa_gfx9 = 8105
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_EQ_U64_sdwa_vi = 8106
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_F_F16_e32_vi = 8107
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_F_F16_e64_vi = 8108
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_F_F16_sdwa_gfx9 = 8109
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_F_F16_sdwa_vi = 8110
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_F_F32_e32_si = 8111
    Feature_isGCN | Feature_isVI | 0, // V_CMP_F_F32_e32_vi = 8112
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_F_F32_e64_si = 8113
    Feature_isGCN | Feature_isVI | 0, // V_CMP_F_F32_e64_vi = 8114
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_F_F32_sdwa_gfx9 = 8115
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_F_F32_sdwa_vi = 8116
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_F_F64_e32_si = 8117
    Feature_isGCN | Feature_isVI | 0, // V_CMP_F_F64_e32_vi = 8118
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_F_F64_e64_si = 8119
    Feature_isGCN | Feature_isVI | 0, // V_CMP_F_F64_e64_vi = 8120
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_F_F64_sdwa_gfx9 = 8121
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_F_F64_sdwa_vi = 8122
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_F_I16_e32_vi = 8123
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_F_I16_e64_vi = 8124
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_F_I16_sdwa_gfx9 = 8125
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_F_I16_sdwa_vi = 8126
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_F_I32_e32_si = 8127
    Feature_isGCN | Feature_isVI | 0, // V_CMP_F_I32_e32_vi = 8128
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_F_I32_e64_si = 8129
    Feature_isGCN | Feature_isVI | 0, // V_CMP_F_I32_e64_vi = 8130
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_F_I32_sdwa_gfx9 = 8131
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_F_I32_sdwa_vi = 8132
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_F_I64_e32_si = 8133
    Feature_isGCN | Feature_isVI | 0, // V_CMP_F_I64_e32_vi = 8134
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_F_I64_e64_si = 8135
    Feature_isGCN | Feature_isVI | 0, // V_CMP_F_I64_e64_vi = 8136
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_F_I64_sdwa_gfx9 = 8137
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_F_I64_sdwa_vi = 8138
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_F_U16_e32_vi = 8139
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_F_U16_e64_vi = 8140
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_F_U16_sdwa_gfx9 = 8141
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_F_U16_sdwa_vi = 8142
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_F_U32_e32_si = 8143
    Feature_isGCN | Feature_isVI | 0, // V_CMP_F_U32_e32_vi = 8144
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_F_U32_e64_si = 8145
    Feature_isGCN | Feature_isVI | 0, // V_CMP_F_U32_e64_vi = 8146
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_F_U32_sdwa_gfx9 = 8147
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_F_U32_sdwa_vi = 8148
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_F_U64_e32_si = 8149
    Feature_isGCN | Feature_isVI | 0, // V_CMP_F_U64_e32_vi = 8150
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_F_U64_e64_si = 8151
    Feature_isGCN | Feature_isVI | 0, // V_CMP_F_U64_e64_vi = 8152
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_F_U64_sdwa_gfx9 = 8153
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_F_U64_sdwa_vi = 8154
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_GE_F16_e32_vi = 8155
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_GE_F16_e64_vi = 8156
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_GE_F16_sdwa_gfx9 = 8157
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_GE_F16_sdwa_vi = 8158
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GE_F32_e32_si = 8159
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GE_F32_e32_vi = 8160
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GE_F32_e64_si = 8161
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GE_F32_e64_vi = 8162
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_GE_F32_sdwa_gfx9 = 8163
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_GE_F32_sdwa_vi = 8164
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GE_F64_e32_si = 8165
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GE_F64_e32_vi = 8166
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GE_F64_e64_si = 8167
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GE_F64_e64_vi = 8168
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_GE_F64_sdwa_gfx9 = 8169
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_GE_F64_sdwa_vi = 8170
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_GE_I16_e32_vi = 8171
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_GE_I16_e64_vi = 8172
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_GE_I16_sdwa_gfx9 = 8173
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_GE_I16_sdwa_vi = 8174
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GE_I32_e32_si = 8175
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GE_I32_e32_vi = 8176
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GE_I32_e64_si = 8177
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GE_I32_e64_vi = 8178
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_GE_I32_sdwa_gfx9 = 8179
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_GE_I32_sdwa_vi = 8180
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GE_I64_e32_si = 8181
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GE_I64_e32_vi = 8182
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GE_I64_e64_si = 8183
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GE_I64_e64_vi = 8184
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_GE_I64_sdwa_gfx9 = 8185
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_GE_I64_sdwa_vi = 8186
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_GE_U16_e32_vi = 8187
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_GE_U16_e64_vi = 8188
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_GE_U16_sdwa_gfx9 = 8189
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_GE_U16_sdwa_vi = 8190
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GE_U32_e32_si = 8191
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GE_U32_e32_vi = 8192
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GE_U32_e64_si = 8193
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GE_U32_e64_vi = 8194
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_GE_U32_sdwa_gfx9 = 8195
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_GE_U32_sdwa_vi = 8196
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GE_U64_e32_si = 8197
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GE_U64_e32_vi = 8198
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GE_U64_e64_si = 8199
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GE_U64_e64_vi = 8200
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_GE_U64_sdwa_gfx9 = 8201
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_GE_U64_sdwa_vi = 8202
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_GT_F16_e32_vi = 8203
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_GT_F16_e64_vi = 8204
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_GT_F16_sdwa_gfx9 = 8205
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_GT_F16_sdwa_vi = 8206
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GT_F32_e32_si = 8207
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GT_F32_e32_vi = 8208
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GT_F32_e64_si = 8209
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GT_F32_e64_vi = 8210
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_GT_F32_sdwa_gfx9 = 8211
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_GT_F32_sdwa_vi = 8212
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GT_F64_e32_si = 8213
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GT_F64_e32_vi = 8214
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GT_F64_e64_si = 8215
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GT_F64_e64_vi = 8216
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_GT_F64_sdwa_gfx9 = 8217
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_GT_F64_sdwa_vi = 8218
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_GT_I16_e32_vi = 8219
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_GT_I16_e64_vi = 8220
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_GT_I16_sdwa_gfx9 = 8221
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_GT_I16_sdwa_vi = 8222
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GT_I32_e32_si = 8223
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GT_I32_e32_vi = 8224
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GT_I32_e64_si = 8225
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GT_I32_e64_vi = 8226
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_GT_I32_sdwa_gfx9 = 8227
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_GT_I32_sdwa_vi = 8228
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GT_I64_e32_si = 8229
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GT_I64_e32_vi = 8230
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GT_I64_e64_si = 8231
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GT_I64_e64_vi = 8232
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_GT_I64_sdwa_gfx9 = 8233
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_GT_I64_sdwa_vi = 8234
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_GT_U16_e32_vi = 8235
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_GT_U16_e64_vi = 8236
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_GT_U16_sdwa_gfx9 = 8237
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_GT_U16_sdwa_vi = 8238
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GT_U32_e32_si = 8239
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GT_U32_e32_vi = 8240
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GT_U32_e64_si = 8241
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GT_U32_e64_vi = 8242
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_GT_U32_sdwa_gfx9 = 8243
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_GT_U32_sdwa_vi = 8244
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GT_U64_e32_si = 8245
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GT_U64_e32_vi = 8246
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_GT_U64_e64_si = 8247
    Feature_isGCN | Feature_isVI | 0, // V_CMP_GT_U64_e64_vi = 8248
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_GT_U64_sdwa_gfx9 = 8249
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_GT_U64_sdwa_vi = 8250
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LE_F16_e32_vi = 8251
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LE_F16_e64_vi = 8252
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LE_F16_sdwa_gfx9 = 8253
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_LE_F16_sdwa_vi = 8254
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LE_F32_e32_si = 8255
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LE_F32_e32_vi = 8256
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LE_F32_e64_si = 8257
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LE_F32_e64_vi = 8258
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LE_F32_sdwa_gfx9 = 8259
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_LE_F32_sdwa_vi = 8260
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LE_F64_e32_si = 8261
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LE_F64_e32_vi = 8262
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LE_F64_e64_si = 8263
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LE_F64_e64_vi = 8264
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LE_F64_sdwa_gfx9 = 8265
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LE_F64_sdwa_vi = 8266
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LE_I16_e32_vi = 8267
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LE_I16_e64_vi = 8268
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LE_I16_sdwa_gfx9 = 8269
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_LE_I16_sdwa_vi = 8270
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LE_I32_e32_si = 8271
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LE_I32_e32_vi = 8272
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LE_I32_e64_si = 8273
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LE_I32_e64_vi = 8274
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LE_I32_sdwa_gfx9 = 8275
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_LE_I32_sdwa_vi = 8276
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LE_I64_e32_si = 8277
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LE_I64_e32_vi = 8278
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LE_I64_e64_si = 8279
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LE_I64_e64_vi = 8280
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LE_I64_sdwa_gfx9 = 8281
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LE_I64_sdwa_vi = 8282
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LE_U16_e32_vi = 8283
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LE_U16_e64_vi = 8284
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LE_U16_sdwa_gfx9 = 8285
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_LE_U16_sdwa_vi = 8286
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LE_U32_e32_si = 8287
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LE_U32_e32_vi = 8288
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LE_U32_e64_si = 8289
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LE_U32_e64_vi = 8290
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LE_U32_sdwa_gfx9 = 8291
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_LE_U32_sdwa_vi = 8292
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LE_U64_e32_si = 8293
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LE_U64_e32_vi = 8294
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LE_U64_e64_si = 8295
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LE_U64_e64_vi = 8296
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LE_U64_sdwa_gfx9 = 8297
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LE_U64_sdwa_vi = 8298
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LG_F16_e32_vi = 8299
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LG_F16_e64_vi = 8300
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LG_F16_sdwa_gfx9 = 8301
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_LG_F16_sdwa_vi = 8302
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LG_F32_e32_si = 8303
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LG_F32_e32_vi = 8304
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LG_F32_e64_si = 8305
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LG_F32_e64_vi = 8306
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LG_F32_sdwa_gfx9 = 8307
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_LG_F32_sdwa_vi = 8308
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LG_F64_e32_si = 8309
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LG_F64_e32_vi = 8310
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LG_F64_e64_si = 8311
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LG_F64_e64_vi = 8312
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LG_F64_sdwa_gfx9 = 8313
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LG_F64_sdwa_vi = 8314
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LT_F16_e32_vi = 8315
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LT_F16_e64_vi = 8316
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LT_F16_sdwa_gfx9 = 8317
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_LT_F16_sdwa_vi = 8318
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LT_F32_e32_si = 8319
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LT_F32_e32_vi = 8320
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LT_F32_e64_si = 8321
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LT_F32_e64_vi = 8322
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LT_F32_sdwa_gfx9 = 8323
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_LT_F32_sdwa_vi = 8324
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LT_F64_e32_si = 8325
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LT_F64_e32_vi = 8326
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LT_F64_e64_si = 8327
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LT_F64_e64_vi = 8328
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LT_F64_sdwa_gfx9 = 8329
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LT_F64_sdwa_vi = 8330
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LT_I16_e32_vi = 8331
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LT_I16_e64_vi = 8332
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LT_I16_sdwa_gfx9 = 8333
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_LT_I16_sdwa_vi = 8334
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LT_I32_e32_si = 8335
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LT_I32_e32_vi = 8336
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LT_I32_e64_si = 8337
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LT_I32_e64_vi = 8338
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LT_I32_sdwa_gfx9 = 8339
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_LT_I32_sdwa_vi = 8340
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LT_I64_e32_si = 8341
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LT_I64_e32_vi = 8342
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LT_I64_e64_si = 8343
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LT_I64_e64_vi = 8344
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LT_I64_sdwa_gfx9 = 8345
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LT_I64_sdwa_vi = 8346
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LT_U16_e32_vi = 8347
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_LT_U16_e64_vi = 8348
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LT_U16_sdwa_gfx9 = 8349
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_LT_U16_sdwa_vi = 8350
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LT_U32_e32_si = 8351
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LT_U32_e32_vi = 8352
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LT_U32_e64_si = 8353
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LT_U32_e64_vi = 8354
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_LT_U32_sdwa_gfx9 = 8355
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_LT_U32_sdwa_vi = 8356
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LT_U64_e32_si = 8357
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LT_U64_e32_vi = 8358
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_LT_U64_e64_si = 8359
    Feature_isGCN | Feature_isVI | 0, // V_CMP_LT_U64_e64_vi = 8360
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LT_U64_sdwa_gfx9 = 8361
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_LT_U64_sdwa_vi = 8362
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NEQ_F16_e32_vi = 8363
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NEQ_F16_e64_vi = 8364
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NEQ_F16_sdwa_gfx9 = 8365
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_NEQ_F16_sdwa_vi = 8366
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NEQ_F32_e32_si = 8367
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NEQ_F32_e32_vi = 8368
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NEQ_F32_e64_si = 8369
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NEQ_F32_e64_vi = 8370
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NEQ_F32_sdwa_gfx9 = 8371
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_NEQ_F32_sdwa_vi = 8372
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NEQ_F64_e32_si = 8373
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NEQ_F64_e32_vi = 8374
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NEQ_F64_e64_si = 8375
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NEQ_F64_e64_vi = 8376
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NEQ_F64_sdwa_gfx9 = 8377
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NEQ_F64_sdwa_vi = 8378
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NE_I16_e32_vi = 8379
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NE_I16_e64_vi = 8380
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NE_I16_sdwa_gfx9 = 8381
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_NE_I16_sdwa_vi = 8382
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NE_I32_e32_si = 8383
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NE_I32_e32_vi = 8384
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NE_I32_e64_si = 8385
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NE_I32_e64_vi = 8386
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NE_I32_sdwa_gfx9 = 8387
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_NE_I32_sdwa_vi = 8388
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NE_I64_e32_si = 8389
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NE_I64_e32_vi = 8390
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NE_I64_e64_si = 8391
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NE_I64_e64_vi = 8392
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NE_I64_sdwa_gfx9 = 8393
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NE_I64_sdwa_vi = 8394
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NE_U16_e32_vi = 8395
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NE_U16_e64_vi = 8396
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NE_U16_sdwa_gfx9 = 8397
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_NE_U16_sdwa_vi = 8398
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NE_U32_e32_si = 8399
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NE_U32_e32_vi = 8400
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NE_U32_e64_si = 8401
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NE_U32_e64_vi = 8402
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NE_U32_sdwa_gfx9 = 8403
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_NE_U32_sdwa_vi = 8404
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NE_U64_e32_si = 8405
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NE_U64_e32_vi = 8406
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NE_U64_e64_si = 8407
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NE_U64_e64_vi = 8408
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NE_U64_sdwa_gfx9 = 8409
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NE_U64_sdwa_vi = 8410
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NGE_F16_e32_vi = 8411
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NGE_F16_e64_vi = 8412
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NGE_F16_sdwa_gfx9 = 8413
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_NGE_F16_sdwa_vi = 8414
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NGE_F32_e32_si = 8415
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NGE_F32_e32_vi = 8416
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NGE_F32_e64_si = 8417
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NGE_F32_e64_vi = 8418
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NGE_F32_sdwa_gfx9 = 8419
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_NGE_F32_sdwa_vi = 8420
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NGE_F64_e32_si = 8421
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NGE_F64_e32_vi = 8422
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NGE_F64_e64_si = 8423
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NGE_F64_e64_vi = 8424
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NGE_F64_sdwa_gfx9 = 8425
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NGE_F64_sdwa_vi = 8426
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NGT_F16_e32_vi = 8427
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NGT_F16_e64_vi = 8428
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NGT_F16_sdwa_gfx9 = 8429
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_NGT_F16_sdwa_vi = 8430
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NGT_F32_e32_si = 8431
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NGT_F32_e32_vi = 8432
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NGT_F32_e64_si = 8433
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NGT_F32_e64_vi = 8434
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NGT_F32_sdwa_gfx9 = 8435
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_NGT_F32_sdwa_vi = 8436
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NGT_F64_e32_si = 8437
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NGT_F64_e32_vi = 8438
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NGT_F64_e64_si = 8439
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NGT_F64_e64_vi = 8440
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NGT_F64_sdwa_gfx9 = 8441
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NGT_F64_sdwa_vi = 8442
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NLE_F16_e32_vi = 8443
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NLE_F16_e64_vi = 8444
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NLE_F16_sdwa_gfx9 = 8445
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_NLE_F16_sdwa_vi = 8446
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NLE_F32_e32_si = 8447
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NLE_F32_e32_vi = 8448
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NLE_F32_e64_si = 8449
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NLE_F32_e64_vi = 8450
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NLE_F32_sdwa_gfx9 = 8451
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_NLE_F32_sdwa_vi = 8452
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NLE_F64_e32_si = 8453
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NLE_F64_e32_vi = 8454
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NLE_F64_e64_si = 8455
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NLE_F64_e64_vi = 8456
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NLE_F64_sdwa_gfx9 = 8457
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NLE_F64_sdwa_vi = 8458
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NLG_F16_e32_vi = 8459
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NLG_F16_e64_vi = 8460
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NLG_F16_sdwa_gfx9 = 8461
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_NLG_F16_sdwa_vi = 8462
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NLG_F32_e32_si = 8463
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NLG_F32_e32_vi = 8464
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NLG_F32_e64_si = 8465
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NLG_F32_e64_vi = 8466
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NLG_F32_sdwa_gfx9 = 8467
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_NLG_F32_sdwa_vi = 8468
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NLG_F64_e32_si = 8469
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NLG_F64_e32_vi = 8470
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NLG_F64_e64_si = 8471
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NLG_F64_e64_vi = 8472
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NLG_F64_sdwa_gfx9 = 8473
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NLG_F64_sdwa_vi = 8474
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NLT_F16_e32_vi = 8475
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_NLT_F16_e64_vi = 8476
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NLT_F16_sdwa_gfx9 = 8477
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_NLT_F16_sdwa_vi = 8478
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NLT_F32_e32_si = 8479
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NLT_F32_e32_vi = 8480
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NLT_F32_e64_si = 8481
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NLT_F32_e64_vi = 8482
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_NLT_F32_sdwa_gfx9 = 8483
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_NLT_F32_sdwa_vi = 8484
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NLT_F64_e32_si = 8485
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NLT_F64_e32_vi = 8486
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_NLT_F64_e64_si = 8487
    Feature_isGCN | Feature_isVI | 0, // V_CMP_NLT_F64_e64_vi = 8488
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NLT_F64_sdwa_gfx9 = 8489
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_NLT_F64_sdwa_vi = 8490
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_O_F16_e32_vi = 8491
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_O_F16_e64_vi = 8492
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_O_F16_sdwa_gfx9 = 8493
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_O_F16_sdwa_vi = 8494
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_O_F32_e32_si = 8495
    Feature_isGCN | Feature_isVI | 0, // V_CMP_O_F32_e32_vi = 8496
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_O_F32_e64_si = 8497
    Feature_isGCN | Feature_isVI | 0, // V_CMP_O_F32_e64_vi = 8498
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_O_F32_sdwa_gfx9 = 8499
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_O_F32_sdwa_vi = 8500
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_O_F64_e32_si = 8501
    Feature_isGCN | Feature_isVI | 0, // V_CMP_O_F64_e32_vi = 8502
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_O_F64_e64_si = 8503
    Feature_isGCN | Feature_isVI | 0, // V_CMP_O_F64_e64_vi = 8504
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_O_F64_sdwa_gfx9 = 8505
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_O_F64_sdwa_vi = 8506
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_TRU_F16_e32_vi = 8507
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_TRU_F16_e64_vi = 8508
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_TRU_F16_sdwa_gfx9 = 8509
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_TRU_F16_sdwa_vi = 8510
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_TRU_F32_e32_si = 8511
    Feature_isGCN | Feature_isVI | 0, // V_CMP_TRU_F32_e32_vi = 8512
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_TRU_F32_e64_si = 8513
    Feature_isGCN | Feature_isVI | 0, // V_CMP_TRU_F32_e64_vi = 8514
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_TRU_F32_sdwa_gfx9 = 8515
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_TRU_F32_sdwa_vi = 8516
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_TRU_F64_e32_si = 8517
    Feature_isGCN | Feature_isVI | 0, // V_CMP_TRU_F64_e32_vi = 8518
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_TRU_F64_e64_si = 8519
    Feature_isGCN | Feature_isVI | 0, // V_CMP_TRU_F64_e64_vi = 8520
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_TRU_F64_sdwa_gfx9 = 8521
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_TRU_F64_sdwa_vi = 8522
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_T_I16_e32_vi = 8523
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_T_I16_e64_vi = 8524
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_T_I16_sdwa_gfx9 = 8525
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_T_I16_sdwa_vi = 8526
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_T_I32_e32_si = 8527
    Feature_isGCN | Feature_isVI | 0, // V_CMP_T_I32_e32_vi = 8528
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_T_I32_e64_si = 8529
    Feature_isGCN | Feature_isVI | 0, // V_CMP_T_I32_e64_vi = 8530
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_T_I32_sdwa_gfx9 = 8531
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_T_I32_sdwa_vi = 8532
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_T_I64_e32_si = 8533
    Feature_isGCN | Feature_isVI | 0, // V_CMP_T_I64_e32_vi = 8534
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_T_I64_e64_si = 8535
    Feature_isGCN | Feature_isVI | 0, // V_CMP_T_I64_e64_vi = 8536
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_T_I64_sdwa_gfx9 = 8537
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_T_I64_sdwa_vi = 8538
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_T_U16_e32_vi = 8539
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_T_U16_e64_vi = 8540
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_T_U16_sdwa_gfx9 = 8541
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_T_U16_sdwa_vi = 8542
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_T_U32_e32_si = 8543
    Feature_isGCN | Feature_isVI | 0, // V_CMP_T_U32_e32_vi = 8544
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_T_U32_e64_si = 8545
    Feature_isGCN | Feature_isVI | 0, // V_CMP_T_U32_e64_vi = 8546
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_T_U32_sdwa_gfx9 = 8547
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_T_U32_sdwa_vi = 8548
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_T_U64_e32_si = 8549
    Feature_isGCN | Feature_isVI | 0, // V_CMP_T_U64_e32_vi = 8550
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_T_U64_e64_si = 8551
    Feature_isGCN | Feature_isVI | 0, // V_CMP_T_U64_e64_vi = 8552
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_T_U64_sdwa_gfx9 = 8553
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_T_U64_sdwa_vi = 8554
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_U_F16_e32_vi = 8555
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CMP_U_F16_e64_vi = 8556
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_U_F16_sdwa_gfx9 = 8557
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CMP_U_F16_sdwa_vi = 8558
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_U_F32_e32_si = 8559
    Feature_isGCN | Feature_isVI | 0, // V_CMP_U_F32_e32_vi = 8560
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_U_F32_e64_si = 8561
    Feature_isGCN | Feature_isVI | 0, // V_CMP_U_F32_e64_vi = 8562
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CMP_U_F32_sdwa_gfx9 = 8563
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CMP_U_F32_sdwa_vi = 8564
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_U_F64_e32_si = 8565
    Feature_isGCN | Feature_isVI | 0, // V_CMP_U_F64_e32_vi = 8566
    Feature_isGCN | Feature_isSICI | 0, // V_CMP_U_F64_e64_si = 8567
    Feature_isGCN | Feature_isVI | 0, // V_CMP_U_F64_e64_vi = 8568
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_U_F64_sdwa_gfx9 = 8569
    Feature_DisableInst | Feature_DisableInst | 0, // V_CMP_U_F64_sdwa_vi = 8570
    Feature_isGCN | Feature_HasDPP | 0, // V_CNDMASK_B32_dpp_vi = 8571
    Feature_isGCN | Feature_isSICI | 0, // V_CNDMASK_B32_e32_si = 8572
    Feature_isGCN | Feature_isVI | 0, // V_CNDMASK_B32_e32_vi = 8573
    Feature_isGCN | Feature_isSICI | 0, // V_CNDMASK_B32_e64_si = 8574
    Feature_isGCN | Feature_isVI | 0, // V_CNDMASK_B32_e64_vi = 8575
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CNDMASK_B32_sdwa_gfx9 = 8576
    Feature_isGCN | Feature_HasSDWA | 0, // V_CNDMASK_B32_sdwa_vi = 8577
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_COS_F16_dpp_vi = 8578
    Feature_Has16BitInsts | Feature_isVI | 0, // V_COS_F16_e32_vi = 8579
    Feature_Has16BitInsts | Feature_isVI | 0, // V_COS_F16_e64_vi = 8580
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_COS_F16_sdwa_gfx9 = 8581
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_COS_F16_sdwa_vi = 8582
    Feature_HasDPP | Feature_HasDPP | 0, // V_COS_F32_dpp_vi = 8583
    Feature_isGCN | Feature_isSICI | 0, // V_COS_F32_e32_si = 8584
    Feature_isGCN | Feature_isVI | 0, // V_COS_F32_e32_vi = 8585
    Feature_isGCN | Feature_isSICI | 0, // V_COS_F32_e64_si = 8586
    Feature_isGCN | Feature_isVI | 0, // V_COS_F32_e64_vi = 8587
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_COS_F32_sdwa_gfx9 = 8588
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_COS_F32_sdwa_vi = 8589
    Feature_isGCN | Feature_isSICI | 0, // V_CUBEID_F32_si = 8590
    Feature_isGCN | Feature_isVI | 0, // V_CUBEID_F32_vi = 8591
    Feature_isGCN | Feature_isSICI | 0, // V_CUBEMA_F32_si = 8592
    Feature_isGCN | Feature_isVI | 0, // V_CUBEMA_F32_vi = 8593
    Feature_isGCN | Feature_isSICI | 0, // V_CUBESC_F32_si = 8594
    Feature_isGCN | Feature_isVI | 0, // V_CUBESC_F32_vi = 8595
    Feature_isGCN | Feature_isSICI | 0, // V_CUBETC_F32_si = 8596
    Feature_isGCN | Feature_isVI | 0, // V_CUBETC_F32_vi = 8597
    Feature_HasDPP | Feature_HasDPP | 0, // V_CVT_F16_F32_dpp_vi = 8598
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F16_F32_e32_si = 8599
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F16_F32_e32_vi = 8600
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F16_F32_e64_si = 8601
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F16_F32_e64_vi = 8602
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_F16_F32_sdwa_gfx9 = 8603
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CVT_F16_F32_sdwa_vi = 8604
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_CVT_F16_I16_dpp_vi = 8605
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CVT_F16_I16_e32_vi = 8606
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CVT_F16_I16_e64_vi = 8607
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_F16_I16_sdwa_gfx9 = 8608
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CVT_F16_I16_sdwa_vi = 8609
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_CVT_F16_U16_dpp_vi = 8610
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CVT_F16_U16_e32_vi = 8611
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CVT_F16_U16_e64_vi = 8612
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_F16_U16_sdwa_gfx9 = 8613
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CVT_F16_U16_sdwa_vi = 8614
    Feature_HasDPP | Feature_HasDPP | 0, // V_CVT_F32_F16_dpp_vi = 8615
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_F16_e32_si = 8616
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_F16_e32_vi = 8617
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_F16_e64_si = 8618
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_F16_e64_vi = 8619
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_F32_F16_sdwa_gfx9 = 8620
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CVT_F32_F16_sdwa_vi = 8621
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_F64_e32_si = 8622
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_F64_e32_vi = 8623
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_F64_e64_si = 8624
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_F64_e64_vi = 8625
    Feature_DisableInst | Feature_DisableInst | 0, // V_CVT_F32_F64_sdwa_gfx9 = 8626
    Feature_DisableInst | Feature_DisableInst | 0, // V_CVT_F32_F64_sdwa_vi = 8627
    Feature_HasDPP | Feature_HasDPP | 0, // V_CVT_F32_I32_dpp_vi = 8628
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_I32_e32_si = 8629
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_I32_e32_vi = 8630
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_I32_e64_si = 8631
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_I32_e64_vi = 8632
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_F32_I32_sdwa_gfx9 = 8633
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CVT_F32_I32_sdwa_vi = 8634
    Feature_HasDPP | Feature_HasDPP | 0, // V_CVT_F32_U32_dpp_vi = 8635
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_U32_e32_si = 8636
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_U32_e32_vi = 8637
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_U32_e64_si = 8638
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_U32_e64_vi = 8639
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_F32_U32_sdwa_gfx9 = 8640
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CVT_F32_U32_sdwa_vi = 8641
    Feature_HasDPP | Feature_HasDPP | 0, // V_CVT_F32_UBYTE0_dpp_vi = 8642
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_UBYTE0_e32_si = 8643
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_UBYTE0_e32_vi = 8644
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_UBYTE0_e64_si = 8645
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_UBYTE0_e64_vi = 8646
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_F32_UBYTE0_sdwa_gfx9 = 8647
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CVT_F32_UBYTE0_sdwa_vi = 8648
    Feature_HasDPP | Feature_HasDPP | 0, // V_CVT_F32_UBYTE1_dpp_vi = 8649
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_UBYTE1_e32_si = 8650
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_UBYTE1_e32_vi = 8651
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_UBYTE1_e64_si = 8652
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_UBYTE1_e64_vi = 8653
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_F32_UBYTE1_sdwa_gfx9 = 8654
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CVT_F32_UBYTE1_sdwa_vi = 8655
    Feature_HasDPP | Feature_HasDPP | 0, // V_CVT_F32_UBYTE2_dpp_vi = 8656
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_UBYTE2_e32_si = 8657
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_UBYTE2_e32_vi = 8658
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_UBYTE2_e64_si = 8659
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_UBYTE2_e64_vi = 8660
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_F32_UBYTE2_sdwa_gfx9 = 8661
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CVT_F32_UBYTE2_sdwa_vi = 8662
    Feature_HasDPP | Feature_HasDPP | 0, // V_CVT_F32_UBYTE3_dpp_vi = 8663
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_UBYTE3_e32_si = 8664
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_UBYTE3_e32_vi = 8665
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F32_UBYTE3_e64_si = 8666
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F32_UBYTE3_e64_vi = 8667
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_F32_UBYTE3_sdwa_gfx9 = 8668
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CVT_F32_UBYTE3_sdwa_vi = 8669
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F64_F32_e32_si = 8670
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F64_F32_e32_vi = 8671
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F64_F32_e64_si = 8672
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F64_F32_e64_vi = 8673
    Feature_DisableInst | Feature_DisableInst | 0, // V_CVT_F64_F32_sdwa_gfx9 = 8674
    Feature_DisableInst | Feature_DisableInst | 0, // V_CVT_F64_F32_sdwa_vi = 8675
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F64_I32_e32_si = 8676
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F64_I32_e32_vi = 8677
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F64_I32_e64_si = 8678
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F64_I32_e64_vi = 8679
    Feature_DisableInst | Feature_DisableInst | 0, // V_CVT_F64_I32_sdwa_gfx9 = 8680
    Feature_DisableInst | Feature_DisableInst | 0, // V_CVT_F64_I32_sdwa_vi = 8681
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F64_U32_e32_si = 8682
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F64_U32_e32_vi = 8683
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_F64_U32_e64_si = 8684
    Feature_isGCN | Feature_isVI | 0, // V_CVT_F64_U32_e64_vi = 8685
    Feature_DisableInst | Feature_DisableInst | 0, // V_CVT_F64_U32_sdwa_gfx9 = 8686
    Feature_DisableInst | Feature_DisableInst | 0, // V_CVT_F64_U32_sdwa_vi = 8687
    Feature_HasDPP | Feature_HasDPP | 0, // V_CVT_FLR_I32_F32_dpp_vi = 8688
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_FLR_I32_F32_e32_si = 8689
    Feature_isGCN | Feature_isVI | 0, // V_CVT_FLR_I32_F32_e32_vi = 8690
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_FLR_I32_F32_e64_si = 8691
    Feature_isGCN | Feature_isVI | 0, // V_CVT_FLR_I32_F32_e64_vi = 8692
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_FLR_I32_F32_sdwa_gfx9 = 8693
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CVT_FLR_I32_F32_sdwa_vi = 8694
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_CVT_I16_F16_dpp_vi = 8695
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CVT_I16_F16_e32_vi = 8696
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CVT_I16_F16_e64_vi = 8697
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_I16_F16_sdwa_gfx9 = 8698
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CVT_I16_F16_sdwa_vi = 8699
    Feature_HasDPP | Feature_HasDPP | 0, // V_CVT_I32_F32_dpp_vi = 8700
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_I32_F32_e32_si = 8701
    Feature_isGCN | Feature_isVI | 0, // V_CVT_I32_F32_e32_vi = 8702
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_I32_F32_e64_si = 8703
    Feature_isGCN | Feature_isVI | 0, // V_CVT_I32_F32_e64_vi = 8704
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_I32_F32_sdwa_gfx9 = 8705
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CVT_I32_F32_sdwa_vi = 8706
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_I32_F64_e32_si = 8707
    Feature_isGCN | Feature_isVI | 0, // V_CVT_I32_F64_e32_vi = 8708
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_I32_F64_e64_si = 8709
    Feature_isGCN | Feature_isVI | 0, // V_CVT_I32_F64_e64_vi = 8710
    Feature_DisableInst | Feature_DisableInst | 0, // V_CVT_I32_F64_sdwa_gfx9 = 8711
    Feature_DisableInst | Feature_DisableInst | 0, // V_CVT_I32_F64_sdwa_vi = 8712
    Feature_isGFX9 | Feature_HasDPP | 0, // V_CVT_NORM_I16_F16_dpp_vi = 8713
    Feature_isGFX9 | Feature_isVI | 0, // V_CVT_NORM_I16_F16_e32_vi = 8714
    Feature_isGFX9 | Feature_isVI | 0, // V_CVT_NORM_I16_F16_e64_vi = 8715
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_NORM_I16_F16_sdwa_gfx9 = 8716
    Feature_isGFX9 | Feature_HasSDWA | 0, // V_CVT_NORM_I16_F16_sdwa_vi = 8717
    Feature_isGFX9 | Feature_HasDPP | 0, // V_CVT_NORM_U16_F16_dpp_vi = 8718
    Feature_isGFX9 | Feature_isVI | 0, // V_CVT_NORM_U16_F16_e32_vi = 8719
    Feature_isGFX9 | Feature_isVI | 0, // V_CVT_NORM_U16_F16_e64_vi = 8720
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_NORM_U16_F16_sdwa_gfx9 = 8721
    Feature_isGFX9 | Feature_HasSDWA | 0, // V_CVT_NORM_U16_F16_sdwa_vi = 8722
    Feature_HasDPP | Feature_HasDPP | 0, // V_CVT_OFF_F32_I4_dpp_vi = 8723
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_OFF_F32_I4_e32_si = 8724
    Feature_isGCN | Feature_isVI | 0, // V_CVT_OFF_F32_I4_e32_vi = 8725
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_OFF_F32_I4_e64_si = 8726
    Feature_isGCN | Feature_isVI | 0, // V_CVT_OFF_F32_I4_e64_vi = 8727
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_OFF_F32_I4_sdwa_gfx9 = 8728
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CVT_OFF_F32_I4_sdwa_vi = 8729
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_PKACCUM_U8_F32_e32_si = 8730
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_PKACCUM_U8_F32_e64_si = 8731
    Feature_isGCN | Feature_isVI | 0, // V_CVT_PKACCUM_U8_F32_e64_vi = 8732
    Feature_isGFX9 | Feature_isVI | 0, // V_CVT_PKNORM_I16_F16_vi = 8733
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_PKNORM_I16_F32_e32_si = 8734
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_PKNORM_I16_F32_e64_si = 8735
    Feature_isGCN | Feature_isVI | 0, // V_CVT_PKNORM_I16_F32_e64_vi = 8736
    Feature_isGFX9 | Feature_isVI | 0, // V_CVT_PKNORM_U16_F16_vi = 8737
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_PKNORM_U16_F32_e32_si = 8738
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_PKNORM_U16_F32_e64_si = 8739
    Feature_isGCN | Feature_isVI | 0, // V_CVT_PKNORM_U16_F32_e64_vi = 8740
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_PKRTZ_F16_F32_e32_si = 8741
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_PKRTZ_F16_F32_e64_si = 8742
    Feature_isGCN | Feature_isVI | 0, // V_CVT_PKRTZ_F16_F32_e64_vi = 8743
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_PK_I16_I32_e32_si = 8744
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_PK_I16_I32_e64_si = 8745
    Feature_isGCN | Feature_isVI | 0, // V_CVT_PK_I16_I32_e64_vi = 8746
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_PK_U16_U32_e32_si = 8747
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_PK_U16_U32_e64_si = 8748
    Feature_isGCN | Feature_isVI | 0, // V_CVT_PK_U16_U32_e64_vi = 8749
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_PK_U8_F32_si = 8750
    Feature_isGCN | Feature_isVI | 0, // V_CVT_PK_U8_F32_vi = 8751
    Feature_HasDPP | Feature_HasDPP | 0, // V_CVT_RPI_I32_F32_dpp_vi = 8752
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_RPI_I32_F32_e32_si = 8753
    Feature_isGCN | Feature_isVI | 0, // V_CVT_RPI_I32_F32_e32_vi = 8754
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_RPI_I32_F32_e64_si = 8755
    Feature_isGCN | Feature_isVI | 0, // V_CVT_RPI_I32_F32_e64_vi = 8756
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_RPI_I32_F32_sdwa_gfx9 = 8757
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CVT_RPI_I32_F32_sdwa_vi = 8758
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_CVT_U16_F16_dpp_vi = 8759
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CVT_U16_F16_e32_vi = 8760
    Feature_Has16BitInsts | Feature_isVI | 0, // V_CVT_U16_F16_e64_vi = 8761
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_U16_F16_sdwa_gfx9 = 8762
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_CVT_U16_F16_sdwa_vi = 8763
    Feature_HasDPP | Feature_HasDPP | 0, // V_CVT_U32_F32_dpp_vi = 8764
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_U32_F32_e32_si = 8765
    Feature_isGCN | Feature_isVI | 0, // V_CVT_U32_F32_e32_vi = 8766
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_U32_F32_e64_si = 8767
    Feature_isGCN | Feature_isVI | 0, // V_CVT_U32_F32_e64_vi = 8768
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_CVT_U32_F32_sdwa_gfx9 = 8769
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_CVT_U32_F32_sdwa_vi = 8770
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_U32_F64_e32_si = 8771
    Feature_isGCN | Feature_isVI | 0, // V_CVT_U32_F64_e32_vi = 8772
    Feature_isGCN | Feature_isSICI | 0, // V_CVT_U32_F64_e64_si = 8773
    Feature_isGCN | Feature_isVI | 0, // V_CVT_U32_F64_e64_vi = 8774
    Feature_DisableInst | Feature_DisableInst | 0, // V_CVT_U32_F64_sdwa_gfx9 = 8775
    Feature_DisableInst | Feature_DisableInst | 0, // V_CVT_U32_F64_sdwa_vi = 8776
    Feature_isGCN | Feature_isGFX9 | 0, // V_DIV_FIXUP_F16_gfx9_gfx9 = 8777
    Feature_isGCN | Feature_isVIOnly | 0, // V_DIV_FIXUP_F16_vi = 8778
    Feature_isGCN | Feature_isSICI | 0, // V_DIV_FIXUP_F32_si = 8779
    Feature_isGCN | Feature_isVI | 0, // V_DIV_FIXUP_F32_vi = 8780
    Feature_isGCN | Feature_isSICI | 0, // V_DIV_FIXUP_F64_si = 8781
    Feature_isGCN | Feature_isVI | 0, // V_DIV_FIXUP_F64_vi = 8782
    Feature_isGCN | Feature_isGFX9 | 0, // V_DIV_FIXUP_LEGACY_F16_gfx9 = 8783
    Feature_isGCN | Feature_isSICI | 0, // V_DIV_FMAS_F32_si = 8784
    Feature_isGCN | Feature_isVI | 0, // V_DIV_FMAS_F32_vi = 8785
    Feature_isGCN | Feature_isSICI | 0, // V_DIV_FMAS_F64_si = 8786
    Feature_isGCN | Feature_isVI | 0, // V_DIV_FMAS_F64_vi = 8787
    Feature_isGCN | Feature_isSICI | 0, // V_DIV_SCALE_F32_si = 8788
    Feature_isGCN | Feature_isVI | 0, // V_DIV_SCALE_F32_vi = 8789
    Feature_isGCN | Feature_isSICI | 0, // V_DIV_SCALE_F64_si = 8790
    Feature_isGCN | Feature_isVI | 0, // V_DIV_SCALE_F64_vi = 8791
    Feature_HasDotInsts | Feature_HasVOP3PInsts | 0, // V_DOT2_F32_F16_vi = 8792
    Feature_HasDotInsts | Feature_HasVOP3PInsts | 0, // V_DOT2_I32_I16_vi = 8793
    Feature_HasDotInsts | Feature_HasVOP3PInsts | 0, // V_DOT2_U32_U16_vi = 8794
    Feature_HasDotInsts | Feature_HasVOP3PInsts | 0, // V_DOT4_I32_I8_vi = 8795
    Feature_HasDotInsts | Feature_HasVOP3PInsts | 0, // V_DOT4_U32_U8_vi = 8796
    Feature_HasDotInsts | Feature_HasVOP3PInsts | 0, // V_DOT8_I32_I4_vi = 8797
    Feature_HasDotInsts | Feature_HasVOP3PInsts | 0, // V_DOT8_U32_U4_vi = 8798
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_EXP_F16_dpp_vi = 8799
    Feature_Has16BitInsts | Feature_isVI | 0, // V_EXP_F16_e32_vi = 8800
    Feature_Has16BitInsts | Feature_isVI | 0, // V_EXP_F16_e64_vi = 8801
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_EXP_F16_sdwa_gfx9 = 8802
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_EXP_F16_sdwa_vi = 8803
    Feature_HasDPP | Feature_HasDPP | 0, // V_EXP_F32_dpp_vi = 8804
    Feature_isGCN | Feature_isSICI | 0, // V_EXP_F32_e32_si = 8805
    Feature_isGCN | Feature_isVI | 0, // V_EXP_F32_e32_vi = 8806
    Feature_isGCN | Feature_isSICI | 0, // V_EXP_F32_e64_si = 8807
    Feature_isGCN | Feature_isVI | 0, // V_EXP_F32_e64_vi = 8808
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_EXP_F32_sdwa_gfx9 = 8809
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_EXP_F32_sdwa_vi = 8810
    Feature_isCIVI | Feature_HasDPP | 0, // V_EXP_LEGACY_F32_dpp_vi = 8811
    Feature_isCIVI | Feature_isCIOnly | 0, // V_EXP_LEGACY_F32_e32_ci = 8812
    Feature_isCIVI | Feature_isVI | 0, // V_EXP_LEGACY_F32_e32_vi = 8813
    Feature_isCIVI | Feature_isCIOnly | 0, // V_EXP_LEGACY_F32_e64_ci = 8814
    Feature_isCIVI | Feature_isVI | 0, // V_EXP_LEGACY_F32_e64_vi = 8815
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_EXP_LEGACY_F32_sdwa_gfx9 = 8816
    Feature_isCIVI | Feature_HasSDWA | 0, // V_EXP_LEGACY_F32_sdwa_vi = 8817
    Feature_HasDPP | Feature_HasDPP | 0, // V_FFBH_I32_dpp_vi = 8818
    Feature_isGCN | Feature_isSICI | 0, // V_FFBH_I32_e32_si = 8819
    Feature_isGCN | Feature_isVI | 0, // V_FFBH_I32_e32_vi = 8820
    Feature_isGCN | Feature_isSICI | 0, // V_FFBH_I32_e64_si = 8821
    Feature_isGCN | Feature_isVI | 0, // V_FFBH_I32_e64_vi = 8822
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_FFBH_I32_sdwa_gfx9 = 8823
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_FFBH_I32_sdwa_vi = 8824
    Feature_HasDPP | Feature_HasDPP | 0, // V_FFBH_U32_dpp_vi = 8825
    Feature_isGCN | Feature_isSICI | 0, // V_FFBH_U32_e32_si = 8826
    Feature_isGCN | Feature_isVI | 0, // V_FFBH_U32_e32_vi = 8827
    Feature_isGCN | Feature_isSICI | 0, // V_FFBH_U32_e64_si = 8828
    Feature_isGCN | Feature_isVI | 0, // V_FFBH_U32_e64_vi = 8829
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_FFBH_U32_sdwa_gfx9 = 8830
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_FFBH_U32_sdwa_vi = 8831
    Feature_HasDPP | Feature_HasDPP | 0, // V_FFBL_B32_dpp_vi = 8832
    Feature_isGCN | Feature_isSICI | 0, // V_FFBL_B32_e32_si = 8833
    Feature_isGCN | Feature_isVI | 0, // V_FFBL_B32_e32_vi = 8834
    Feature_isGCN | Feature_isSICI | 0, // V_FFBL_B32_e64_si = 8835
    Feature_isGCN | Feature_isVI | 0, // V_FFBL_B32_e64_vi = 8836
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_FFBL_B32_sdwa_gfx9 = 8837
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_FFBL_B32_sdwa_vi = 8838
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_FLOOR_F16_dpp_vi = 8839
    Feature_Has16BitInsts | Feature_isVI | 0, // V_FLOOR_F16_e32_vi = 8840
    Feature_Has16BitInsts | Feature_isVI | 0, // V_FLOOR_F16_e64_vi = 8841
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_FLOOR_F16_sdwa_gfx9 = 8842
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_FLOOR_F16_sdwa_vi = 8843
    Feature_HasDPP | Feature_HasDPP | 0, // V_FLOOR_F32_dpp_vi = 8844
    Feature_isGCN | Feature_isSICI | 0, // V_FLOOR_F32_e32_si = 8845
    Feature_isGCN | Feature_isVI | 0, // V_FLOOR_F32_e32_vi = 8846
    Feature_isGCN | Feature_isSICI | 0, // V_FLOOR_F32_e64_si = 8847
    Feature_isGCN | Feature_isVI | 0, // V_FLOOR_F32_e64_vi = 8848
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_FLOOR_F32_sdwa_gfx9 = 8849
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_FLOOR_F32_sdwa_vi = 8850
    Feature_isCIVI | Feature_isCIOnly | 0, // V_FLOOR_F64_e32_ci = 8851
    Feature_isCIVI | Feature_isVI | 0, // V_FLOOR_F64_e32_vi = 8852
    Feature_isCIVI | Feature_isCIOnly | 0, // V_FLOOR_F64_e64_ci = 8853
    Feature_isCIVI | Feature_isVI | 0, // V_FLOOR_F64_e64_vi = 8854
    Feature_DisableInst | Feature_DisableInst | 0, // V_FLOOR_F64_sdwa_gfx9 = 8855
    Feature_isCIVI | Feature_DisableInst | 0, // V_FLOOR_F64_sdwa_vi = 8856
    Feature_HasDLInsts | Feature_HasDPP | 0, // V_FMAC_F32_dpp_vi = 8857
    Feature_HasDLInsts | Feature_isVI | 0, // V_FMAC_F32_e32_vi = 8858
    Feature_HasDLInsts | Feature_isVI | 0, // V_FMAC_F32_e64_vi = 8859
    Feature_HasDLInsts | Feature_DisableInst | 0, // V_FMAC_F32_sdwa_gfx9 = 8860
    Feature_HasDLInsts | Feature_HasSDWA | 0, // V_FMAC_F32_sdwa_vi = 8861
    Feature_isGCN | Feature_isGFX9 | 0, // V_FMA_F16_gfx9_gfx9 = 8862
    Feature_isGCN | Feature_isVIOnly | 0, // V_FMA_F16_vi = 8863
    Feature_isGCN | Feature_isSICI | 0, // V_FMA_F32_si = 8864
    Feature_isGCN | Feature_isVI | 0, // V_FMA_F32_vi = 8865
    Feature_isGCN | Feature_isSICI | 0, // V_FMA_F64_si = 8866
    Feature_isGCN | Feature_isVI | 0, // V_FMA_F64_vi = 8867
    Feature_isGCN | Feature_isGFX9 | 0, // V_FMA_LEGACY_F16_gfx9 = 8868
    Feature_HasFmaMixInsts | Feature_HasVOP3PInsts | 0, // V_FMA_MIXHI_F16_vi = 8869
    Feature_HasFmaMixInsts | Feature_HasVOP3PInsts | 0, // V_FMA_MIXLO_F16_vi = 8870
    Feature_HasFmaMixInsts | Feature_HasVOP3PInsts | 0, // V_FMA_MIX_F32_vi = 8871
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_FRACT_F16_dpp_vi = 8872
    Feature_Has16BitInsts | Feature_isVI | 0, // V_FRACT_F16_e32_vi = 8873
    Feature_Has16BitInsts | Feature_isVI | 0, // V_FRACT_F16_e64_vi = 8874
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_FRACT_F16_sdwa_gfx9 = 8875
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_FRACT_F16_sdwa_vi = 8876
    Feature_HasDPP | Feature_HasDPP | 0, // V_FRACT_F32_dpp_vi = 8877
    Feature_isGCN | Feature_isSICI | 0, // V_FRACT_F32_e32_si = 8878
    Feature_isGCN | Feature_isVI | 0, // V_FRACT_F32_e32_vi = 8879
    Feature_isGCN | Feature_isSICI | 0, // V_FRACT_F32_e64_si = 8880
    Feature_isGCN | Feature_isVI | 0, // V_FRACT_F32_e64_vi = 8881
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_FRACT_F32_sdwa_gfx9 = 8882
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_FRACT_F32_sdwa_vi = 8883
    Feature_isGCN | Feature_isSICI | 0, // V_FRACT_F64_e32_si = 8884
    Feature_isGCN | Feature_isVI | 0, // V_FRACT_F64_e32_vi = 8885
    Feature_isGCN | Feature_isSICI | 0, // V_FRACT_F64_e64_si = 8886
    Feature_isGCN | Feature_isVI | 0, // V_FRACT_F64_e64_vi = 8887
    Feature_DisableInst | Feature_DisableInst | 0, // V_FRACT_F64_sdwa_gfx9 = 8888
    Feature_DisableInst | Feature_DisableInst | 0, // V_FRACT_F64_sdwa_vi = 8889
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_FREXP_EXP_I16_F16_dpp_vi = 8890
    Feature_Has16BitInsts | Feature_isVI | 0, // V_FREXP_EXP_I16_F16_e32_vi = 8891
    Feature_Has16BitInsts | Feature_isVI | 0, // V_FREXP_EXP_I16_F16_e64_vi = 8892
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_FREXP_EXP_I16_F16_sdwa_gfx9 = 8893
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_FREXP_EXP_I16_F16_sdwa_vi = 8894
    Feature_HasDPP | Feature_HasDPP | 0, // V_FREXP_EXP_I32_F32_dpp_vi = 8895
    Feature_isGCN | Feature_isSICI | 0, // V_FREXP_EXP_I32_F32_e32_si = 8896
    Feature_isGCN | Feature_isVI | 0, // V_FREXP_EXP_I32_F32_e32_vi = 8897
    Feature_isGCN | Feature_isSICI | 0, // V_FREXP_EXP_I32_F32_e64_si = 8898
    Feature_isGCN | Feature_isVI | 0, // V_FREXP_EXP_I32_F32_e64_vi = 8899
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_FREXP_EXP_I32_F32_sdwa_gfx9 = 8900
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_FREXP_EXP_I32_F32_sdwa_vi = 8901
    Feature_isGCN | Feature_isSICI | 0, // V_FREXP_EXP_I32_F64_e32_si = 8902
    Feature_isGCN | Feature_isVI | 0, // V_FREXP_EXP_I32_F64_e32_vi = 8903
    Feature_isGCN | Feature_isSICI | 0, // V_FREXP_EXP_I32_F64_e64_si = 8904
    Feature_isGCN | Feature_isVI | 0, // V_FREXP_EXP_I32_F64_e64_vi = 8905
    Feature_DisableInst | Feature_DisableInst | 0, // V_FREXP_EXP_I32_F64_sdwa_gfx9 = 8906
    Feature_DisableInst | Feature_DisableInst | 0, // V_FREXP_EXP_I32_F64_sdwa_vi = 8907
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_FREXP_MANT_F16_dpp_vi = 8908
    Feature_Has16BitInsts | Feature_isVI | 0, // V_FREXP_MANT_F16_e32_vi = 8909
    Feature_Has16BitInsts | Feature_isVI | 0, // V_FREXP_MANT_F16_e64_vi = 8910
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_FREXP_MANT_F16_sdwa_gfx9 = 8911
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_FREXP_MANT_F16_sdwa_vi = 8912
    Feature_HasDPP | Feature_HasDPP | 0, // V_FREXP_MANT_F32_dpp_vi = 8913
    Feature_isGCN | Feature_isSICI | 0, // V_FREXP_MANT_F32_e32_si = 8914
    Feature_isGCN | Feature_isVI | 0, // V_FREXP_MANT_F32_e32_vi = 8915
    Feature_isGCN | Feature_isSICI | 0, // V_FREXP_MANT_F32_e64_si = 8916
    Feature_isGCN | Feature_isVI | 0, // V_FREXP_MANT_F32_e64_vi = 8917
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_FREXP_MANT_F32_sdwa_gfx9 = 8918
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_FREXP_MANT_F32_sdwa_vi = 8919
    Feature_isGCN | Feature_isSICI | 0, // V_FREXP_MANT_F64_e32_si = 8920
    Feature_isGCN | Feature_isVI | 0, // V_FREXP_MANT_F64_e32_vi = 8921
    Feature_isGCN | Feature_isSICI | 0, // V_FREXP_MANT_F64_e64_si = 8922
    Feature_isGCN | Feature_isVI | 0, // V_FREXP_MANT_F64_e64_vi = 8923
    Feature_DisableInst | Feature_DisableInst | 0, // V_FREXP_MANT_F64_sdwa_gfx9 = 8924
    Feature_DisableInst | Feature_DisableInst | 0, // V_FREXP_MANT_F64_sdwa_vi = 8925
    Feature_isVI | Feature_isVI | 0, // V_INTERP_MOV_F32_e64_vi = 8926
    Feature_isGCN | Feature_isSICI | 0, // V_INTERP_MOV_F32_si = 8927
    Feature_isGCN | Feature_isVI | 0, // V_INTERP_MOV_F32_vi = 8928
    Feature_Has16BitInsts | Feature_isVI | 0, // V_INTERP_P1LL_F16_vi = 8929
    Feature_Has16BitInsts | Feature_isVI | 0, // V_INTERP_P1LV_F16_vi = 8930
    Feature_isGCN | Feature_isSICI | 0, // V_INTERP_P1_F32_16bank_si = 8931
    Feature_isGCN | Feature_isVI | 0, // V_INTERP_P1_F32_16bank_vi = 8932
    Feature_isVI | Feature_isVI | 0, // V_INTERP_P1_F32_e64_vi = 8933
    Feature_isGCN | Feature_isSICI | 0, // V_INTERP_P1_F32_si = 8934
    Feature_isGCN | Feature_isVI | 0, // V_INTERP_P1_F32_vi = 8935
    Feature_isGFX9 | Feature_isGFX9 | 0, // V_INTERP_P2_F16_gfx9_gfx9 = 8936
    Feature_Has16BitInsts | Feature_isVIOnly | 0, // V_INTERP_P2_F16_vi = 8937
    Feature_isVI | Feature_isVI | 0, // V_INTERP_P2_F32_e64_vi = 8938
    Feature_isGCN | Feature_isSICI | 0, // V_INTERP_P2_F32_si = 8939
    Feature_isGCN | Feature_isVI | 0, // V_INTERP_P2_F32_vi = 8940
    Feature_Has16BitInsts | Feature_isGFX9 | 0, // V_INTERP_P2_LEGACY_F16_gfx9 = 8941
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_LDEXP_F16_dpp_vi = 8942
    Feature_Has16BitInsts | Feature_isVI | 0, // V_LDEXP_F16_e32_vi = 8943
    Feature_Has16BitInsts | Feature_isVI | 0, // V_LDEXP_F16_e64_vi = 8944
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_LDEXP_F16_sdwa_gfx9 = 8945
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_LDEXP_F16_sdwa_vi = 8946
    Feature_isGCN | Feature_isSICI | 0, // V_LDEXP_F32_e32_si = 8947
    Feature_isGCN | Feature_isSICI | 0, // V_LDEXP_F32_e64_si = 8948
    Feature_isGCN | Feature_isVI | 0, // V_LDEXP_F32_e64_vi = 8949
    Feature_isGCN | Feature_isSICI | 0, // V_LDEXP_F64_si = 8950
    Feature_isGCN | Feature_isVI | 0, // V_LDEXP_F64_vi = 8951
    Feature_isGCN | Feature_isSICI | 0, // V_LERP_U8_si = 8952
    Feature_isGCN | Feature_isVI | 0, // V_LERP_U8_vi = 8953
    Feature_isSICI | Feature_isSICI | 0, // V_LOG_CLAMP_F32_e32_si = 8954
    Feature_isSICI | Feature_isSICI | 0, // V_LOG_CLAMP_F32_e64_si = 8955
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_LOG_F16_dpp_vi = 8956
    Feature_Has16BitInsts | Feature_isVI | 0, // V_LOG_F16_e32_vi = 8957
    Feature_Has16BitInsts | Feature_isVI | 0, // V_LOG_F16_e64_vi = 8958
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_LOG_F16_sdwa_gfx9 = 8959
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_LOG_F16_sdwa_vi = 8960
    Feature_HasDPP | Feature_HasDPP | 0, // V_LOG_F32_dpp_vi = 8961
    Feature_isGCN | Feature_isSICI | 0, // V_LOG_F32_e32_si = 8962
    Feature_isGCN | Feature_isVI | 0, // V_LOG_F32_e32_vi = 8963
    Feature_isGCN | Feature_isSICI | 0, // V_LOG_F32_e64_si = 8964
    Feature_isGCN | Feature_isVI | 0, // V_LOG_F32_e64_vi = 8965
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_LOG_F32_sdwa_gfx9 = 8966
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_LOG_F32_sdwa_vi = 8967
    Feature_isCIVI | Feature_HasDPP | 0, // V_LOG_LEGACY_F32_dpp_vi = 8968
    Feature_isCIVI | Feature_isCIOnly | 0, // V_LOG_LEGACY_F32_e32_ci = 8969
    Feature_isCIVI | Feature_isVI | 0, // V_LOG_LEGACY_F32_e32_vi = 8970
    Feature_isCIVI | Feature_isCIOnly | 0, // V_LOG_LEGACY_F32_e64_ci = 8971
    Feature_isCIVI | Feature_isVI | 0, // V_LOG_LEGACY_F32_e64_vi = 8972
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_LOG_LEGACY_F32_sdwa_gfx9 = 8973
    Feature_isCIVI | Feature_HasSDWA | 0, // V_LOG_LEGACY_F32_sdwa_vi = 8974
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_LSHLREV_B16_dpp_vi = 8975
    Feature_Has16BitInsts | Feature_isVI | 0, // V_LSHLREV_B16_e32_vi = 8976
    Feature_Has16BitInsts | Feature_isVI | 0, // V_LSHLREV_B16_e64_vi = 8977
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_LSHLREV_B16_sdwa_gfx9 = 8978
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_LSHLREV_B16_sdwa_vi = 8979
    Feature_isGCN | Feature_HasDPP | 0, // V_LSHLREV_B32_dpp_vi = 8980
    Feature_isGCN | Feature_isSICI | 0, // V_LSHLREV_B32_e32_si = 8981
    Feature_isGCN | Feature_isVI | 0, // V_LSHLREV_B32_e32_vi = 8982
    Feature_isGCN | Feature_isSICI | 0, // V_LSHLREV_B32_e64_si = 8983
    Feature_isGCN | Feature_isVI | 0, // V_LSHLREV_B32_e64_vi = 8984
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_LSHLREV_B32_sdwa_gfx9 = 8985
    Feature_isGCN | Feature_HasSDWA | 0, // V_LSHLREV_B32_sdwa_vi = 8986
    Feature_isVI | Feature_isVI | 0, // V_LSHLREV_B64_vi = 8987
    Feature_isGFX9 | Feature_isVI | 0, // V_LSHL_ADD_U32_vi = 8988
    Feature_isSICI | Feature_isSICI | 0, // V_LSHL_B32_e32_si = 8989
    Feature_isSICI | Feature_isSICI | 0, // V_LSHL_B32_e64_si = 8990
    Feature_isSICI | Feature_isSICI | 0, // V_LSHL_B64_si = 8991
    Feature_isGFX9 | Feature_isVI | 0, // V_LSHL_OR_B32_vi = 8992
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_LSHRREV_B16_dpp_vi = 8993
    Feature_Has16BitInsts | Feature_isVI | 0, // V_LSHRREV_B16_e32_vi = 8994
    Feature_Has16BitInsts | Feature_isVI | 0, // V_LSHRREV_B16_e64_vi = 8995
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_LSHRREV_B16_sdwa_gfx9 = 8996
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_LSHRREV_B16_sdwa_vi = 8997
    Feature_isGCN | Feature_HasDPP | 0, // V_LSHRREV_B32_dpp_vi = 8998
    Feature_isGCN | Feature_isSICI | 0, // V_LSHRREV_B32_e32_si = 8999
    Feature_isGCN | Feature_isVI | 0, // V_LSHRREV_B32_e32_vi = 9000
    Feature_isGCN | Feature_isSICI | 0, // V_LSHRREV_B32_e64_si = 9001
    Feature_isGCN | Feature_isVI | 0, // V_LSHRREV_B32_e64_vi = 9002
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_LSHRREV_B32_sdwa_gfx9 = 9003
    Feature_isGCN | Feature_HasSDWA | 0, // V_LSHRREV_B32_sdwa_vi = 9004
    Feature_isVI | Feature_isVI | 0, // V_LSHRREV_B64_vi = 9005
    Feature_isSICI | Feature_isSICI | 0, // V_LSHR_B32_e32_si = 9006
    Feature_isSICI | Feature_isSICI | 0, // V_LSHR_B32_e64_si = 9007
    Feature_isSICI | Feature_isSICI | 0, // V_LSHR_B64_si = 9008
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_MAC_F16_dpp_vi = 9009
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MAC_F16_e32_vi = 9010
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MAC_F16_e64_vi = 9011
    Feature_DisableInst | Feature_DisableInst | 0, // V_MAC_F16_sdwa_gfx9 = 9012
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_MAC_F16_sdwa_vi = 9013
    Feature_isGCN | Feature_HasDPP | 0, // V_MAC_F32_dpp_vi = 9014
    Feature_isGCN | Feature_isSICI | 0, // V_MAC_F32_e32_si = 9015
    Feature_isGCN | Feature_isVI | 0, // V_MAC_F32_e32_vi = 9016
    Feature_isGCN | Feature_isSICI | 0, // V_MAC_F32_e64_si = 9017
    Feature_isGCN | Feature_isVI | 0, // V_MAC_F32_e64_vi = 9018
    Feature_DisableInst | Feature_DisableInst | 0, // V_MAC_F32_sdwa_gfx9 = 9019
    Feature_isGCN | Feature_HasSDWA | 0, // V_MAC_F32_sdwa_vi = 9020
    Feature_isSICI | Feature_isSICI | 0, // V_MAC_LEGACY_F32_e32_si = 9021
    Feature_isSICI | Feature_isSICI | 0, // V_MAC_LEGACY_F32_e64_si = 9022
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MADAK_F16_vi = 9023
    Feature_isGCN | Feature_isSICI | 0, // V_MADAK_F32_si = 9024
    Feature_isGCN | Feature_isVI | 0, // V_MADAK_F32_vi = 9025
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MADMK_F16_vi = 9026
    Feature_isGCN | Feature_isSICI | 0, // V_MADMK_F32_si = 9027
    Feature_isGCN | Feature_isVI | 0, // V_MADMK_F32_vi = 9028
    Feature_isGFX9 | Feature_isGFX9 | 0, // V_MAD_F16_gfx9_gfx9 = 9029
    Feature_Has16BitInsts | Feature_isVIOnly | 0, // V_MAD_F16_vi = 9030
    Feature_isGCN | Feature_isSICI | 0, // V_MAD_F32_si = 9031
    Feature_isGCN | Feature_isVI | 0, // V_MAD_F32_vi = 9032
    Feature_isGFX9 | Feature_isGFX9 | 0, // V_MAD_I16_gfx9_gfx9 = 9033
    Feature_Has16BitInsts | Feature_isVIOnly | 0, // V_MAD_I16_vi = 9034
    Feature_isGFX9 | Feature_isVI | 0, // V_MAD_I32_I16_vi = 9035
    Feature_isGCN | Feature_isSICI | 0, // V_MAD_I32_I24_si = 9036
    Feature_isGCN | Feature_isVI | 0, // V_MAD_I32_I24_vi = 9037
    Feature_isCIVI | Feature_isCIOnly | 0, // V_MAD_I64_I32_ci = 9038
    Feature_isCIVI | Feature_isVI | 0, // V_MAD_I64_I32_vi = 9039
    Feature_Has16BitInsts | Feature_isGFX9 | 0, // V_MAD_LEGACY_F16_gfx9 = 9040
    Feature_isGCN | Feature_isSICI | 0, // V_MAD_LEGACY_F32_si = 9041
    Feature_isGCN | Feature_isVI | 0, // V_MAD_LEGACY_F32_vi = 9042
    Feature_Has16BitInsts | Feature_isGFX9 | 0, // V_MAD_LEGACY_I16_gfx9 = 9043
    Feature_Has16BitInsts | Feature_isGFX9 | 0, // V_MAD_LEGACY_U16_gfx9 = 9044
    Feature_HasMadMixInsts | Feature_HasVOP3PInsts | 0, // V_MAD_MIXHI_F16_vi = 9045
    Feature_HasMadMixInsts | Feature_HasVOP3PInsts | 0, // V_MAD_MIXLO_F16_vi = 9046
    Feature_HasMadMixInsts | Feature_HasVOP3PInsts | 0, // V_MAD_MIX_F32_vi = 9047
    Feature_isGFX9 | Feature_isGFX9 | 0, // V_MAD_U16_gfx9_gfx9 = 9048
    Feature_Has16BitInsts | Feature_isVIOnly | 0, // V_MAD_U16_vi = 9049
    Feature_isGFX9 | Feature_isVI | 0, // V_MAD_U32_U16_vi = 9050
    Feature_isGCN | Feature_isSICI | 0, // V_MAD_U32_U24_si = 9051
    Feature_isGCN | Feature_isVI | 0, // V_MAD_U32_U24_vi = 9052
    Feature_isCIVI | Feature_isCIOnly | 0, // V_MAD_U64_U32_ci = 9053
    Feature_isCIVI | Feature_isVI | 0, // V_MAD_U64_U32_vi = 9054
    Feature_isGFX9 | Feature_isVI | 0, // V_MAX3_F16_vi = 9055
    Feature_isGCN | Feature_isSICI | 0, // V_MAX3_F32_si = 9056
    Feature_isGCN | Feature_isVI | 0, // V_MAX3_F32_vi = 9057
    Feature_isGFX9 | Feature_isVI | 0, // V_MAX3_I16_vi = 9058
    Feature_isGCN | Feature_isSICI | 0, // V_MAX3_I32_si = 9059
    Feature_isGCN | Feature_isVI | 0, // V_MAX3_I32_vi = 9060
    Feature_isGFX9 | Feature_isVI | 0, // V_MAX3_U16_vi = 9061
    Feature_isGCN | Feature_isSICI | 0, // V_MAX3_U32_si = 9062
    Feature_isGCN | Feature_isVI | 0, // V_MAX3_U32_vi = 9063
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_MAX_F16_dpp_vi = 9064
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MAX_F16_e32_vi = 9065
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MAX_F16_e64_vi = 9066
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MAX_F16_sdwa_gfx9 = 9067
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_MAX_F16_sdwa_vi = 9068
    Feature_isGCN | Feature_HasDPP | 0, // V_MAX_F32_dpp_vi = 9069
    Feature_isGCN | Feature_isSICI | 0, // V_MAX_F32_e32_si = 9070
    Feature_isGCN | Feature_isVI | 0, // V_MAX_F32_e32_vi = 9071
    Feature_isGCN | Feature_isSICI | 0, // V_MAX_F32_e64_si = 9072
    Feature_isGCN | Feature_isVI | 0, // V_MAX_F32_e64_vi = 9073
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MAX_F32_sdwa_gfx9 = 9074
    Feature_isGCN | Feature_HasSDWA | 0, // V_MAX_F32_sdwa_vi = 9075
    Feature_isGCN | Feature_isSICI | 0, // V_MAX_F64_si = 9076
    Feature_isGCN | Feature_isVI | 0, // V_MAX_F64_vi = 9077
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_MAX_I16_dpp_vi = 9078
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MAX_I16_e32_vi = 9079
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MAX_I16_e64_vi = 9080
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MAX_I16_sdwa_gfx9 = 9081
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_MAX_I16_sdwa_vi = 9082
    Feature_isGCN | Feature_HasDPP | 0, // V_MAX_I32_dpp_vi = 9083
    Feature_isGCN | Feature_isSICI | 0, // V_MAX_I32_e32_si = 9084
    Feature_isGCN | Feature_isVI | 0, // V_MAX_I32_e32_vi = 9085
    Feature_isGCN | Feature_isSICI | 0, // V_MAX_I32_e64_si = 9086
    Feature_isGCN | Feature_isVI | 0, // V_MAX_I32_e64_vi = 9087
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MAX_I32_sdwa_gfx9 = 9088
    Feature_isGCN | Feature_HasSDWA | 0, // V_MAX_I32_sdwa_vi = 9089
    Feature_isSICI | Feature_isSICI | 0, // V_MAX_LEGACY_F32_e32_si = 9090
    Feature_isSICI | Feature_isSICI | 0, // V_MAX_LEGACY_F32_e64_si = 9091
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_MAX_U16_dpp_vi = 9092
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MAX_U16_e32_vi = 9093
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MAX_U16_e64_vi = 9094
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MAX_U16_sdwa_gfx9 = 9095
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_MAX_U16_sdwa_vi = 9096
    Feature_isGCN | Feature_HasDPP | 0, // V_MAX_U32_dpp_vi = 9097
    Feature_isGCN | Feature_isSICI | 0, // V_MAX_U32_e32_si = 9098
    Feature_isGCN | Feature_isVI | 0, // V_MAX_U32_e32_vi = 9099
    Feature_isGCN | Feature_isSICI | 0, // V_MAX_U32_e64_si = 9100
    Feature_isGCN | Feature_isVI | 0, // V_MAX_U32_e64_vi = 9101
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MAX_U32_sdwa_gfx9 = 9102
    Feature_isGCN | Feature_HasSDWA | 0, // V_MAX_U32_sdwa_vi = 9103
    Feature_isGCN | Feature_isSICI | 0, // V_MBCNT_HI_U32_B32_e32_si = 9104
    Feature_isGCN | Feature_isSICI | 0, // V_MBCNT_HI_U32_B32_e64_si = 9105
    Feature_isGCN | Feature_isVI | 0, // V_MBCNT_HI_U32_B32_e64_vi = 9106
    Feature_isGCN | Feature_isSICI | 0, // V_MBCNT_LO_U32_B32_e32_si = 9107
    Feature_isGCN | Feature_isSICI | 0, // V_MBCNT_LO_U32_B32_e64_si = 9108
    Feature_isGCN | Feature_isVI | 0, // V_MBCNT_LO_U32_B32_e64_vi = 9109
    Feature_isGFX9 | Feature_isVI | 0, // V_MED3_F16_vi = 9110
    Feature_isGCN | Feature_isSICI | 0, // V_MED3_F32_si = 9111
    Feature_isGCN | Feature_isVI | 0, // V_MED3_F32_vi = 9112
    Feature_isGFX9 | Feature_isVI | 0, // V_MED3_I16_vi = 9113
    Feature_isGCN | Feature_isSICI | 0, // V_MED3_I32_si = 9114
    Feature_isGCN | Feature_isVI | 0, // V_MED3_I32_vi = 9115
    Feature_isGFX9 | Feature_isVI | 0, // V_MED3_U16_vi = 9116
    Feature_isGCN | Feature_isSICI | 0, // V_MED3_U32_si = 9117
    Feature_isGCN | Feature_isVI | 0, // V_MED3_U32_vi = 9118
    Feature_isGFX9 | Feature_isVI | 0, // V_MIN3_F16_vi = 9119
    Feature_isGCN | Feature_isSICI | 0, // V_MIN3_F32_si = 9120
    Feature_isGCN | Feature_isVI | 0, // V_MIN3_F32_vi = 9121
    Feature_isGFX9 | Feature_isVI | 0, // V_MIN3_I16_vi = 9122
    Feature_isGCN | Feature_isSICI | 0, // V_MIN3_I32_si = 9123
    Feature_isGCN | Feature_isVI | 0, // V_MIN3_I32_vi = 9124
    Feature_isGFX9 | Feature_isVI | 0, // V_MIN3_U16_vi = 9125
    Feature_isGCN | Feature_isSICI | 0, // V_MIN3_U32_si = 9126
    Feature_isGCN | Feature_isVI | 0, // V_MIN3_U32_vi = 9127
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_MIN_F16_dpp_vi = 9128
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MIN_F16_e32_vi = 9129
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MIN_F16_e64_vi = 9130
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MIN_F16_sdwa_gfx9 = 9131
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_MIN_F16_sdwa_vi = 9132
    Feature_isGCN | Feature_HasDPP | 0, // V_MIN_F32_dpp_vi = 9133
    Feature_isGCN | Feature_isSICI | 0, // V_MIN_F32_e32_si = 9134
    Feature_isGCN | Feature_isVI | 0, // V_MIN_F32_e32_vi = 9135
    Feature_isGCN | Feature_isSICI | 0, // V_MIN_F32_e64_si = 9136
    Feature_isGCN | Feature_isVI | 0, // V_MIN_F32_e64_vi = 9137
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MIN_F32_sdwa_gfx9 = 9138
    Feature_isGCN | Feature_HasSDWA | 0, // V_MIN_F32_sdwa_vi = 9139
    Feature_isGCN | Feature_isSICI | 0, // V_MIN_F64_si = 9140
    Feature_isGCN | Feature_isVI | 0, // V_MIN_F64_vi = 9141
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_MIN_I16_dpp_vi = 9142
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MIN_I16_e32_vi = 9143
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MIN_I16_e64_vi = 9144
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MIN_I16_sdwa_gfx9 = 9145
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_MIN_I16_sdwa_vi = 9146
    Feature_isGCN | Feature_HasDPP | 0, // V_MIN_I32_dpp_vi = 9147
    Feature_isGCN | Feature_isSICI | 0, // V_MIN_I32_e32_si = 9148
    Feature_isGCN | Feature_isVI | 0, // V_MIN_I32_e32_vi = 9149
    Feature_isGCN | Feature_isSICI | 0, // V_MIN_I32_e64_si = 9150
    Feature_isGCN | Feature_isVI | 0, // V_MIN_I32_e64_vi = 9151
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MIN_I32_sdwa_gfx9 = 9152
    Feature_isGCN | Feature_HasSDWA | 0, // V_MIN_I32_sdwa_vi = 9153
    Feature_isSICI | Feature_isSICI | 0, // V_MIN_LEGACY_F32_e32_si = 9154
    Feature_isSICI | Feature_isSICI | 0, // V_MIN_LEGACY_F32_e64_si = 9155
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_MIN_U16_dpp_vi = 9156
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MIN_U16_e32_vi = 9157
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MIN_U16_e64_vi = 9158
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MIN_U16_sdwa_gfx9 = 9159
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_MIN_U16_sdwa_vi = 9160
    Feature_isGCN | Feature_HasDPP | 0, // V_MIN_U32_dpp_vi = 9161
    Feature_isGCN | Feature_isSICI | 0, // V_MIN_U32_e32_si = 9162
    Feature_isGCN | Feature_isVI | 0, // V_MIN_U32_e32_vi = 9163
    Feature_isGCN | Feature_isSICI | 0, // V_MIN_U32_e64_si = 9164
    Feature_isGCN | Feature_isVI | 0, // V_MIN_U32_e64_vi = 9165
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MIN_U32_sdwa_gfx9 = 9166
    Feature_isGCN | Feature_HasSDWA | 0, // V_MIN_U32_sdwa_vi = 9167
    Feature_HasMovrel | Feature_isSICI | 0, // V_MOVRELD_B32_e32_si = 9168
    Feature_HasMovrel | Feature_isVI | 0, // V_MOVRELD_B32_e32_vi = 9169
    Feature_HasMovrel | Feature_isSICI | 0, // V_MOVRELD_B32_e64_si = 9170
    Feature_HasMovrel | Feature_isVI | 0, // V_MOVRELD_B32_e64_vi = 9171
    Feature_HasMovrel | Feature_isSICI | 0, // V_MOVRELSD_B32_e32_si = 9172
    Feature_HasMovrel | Feature_isVI | 0, // V_MOVRELSD_B32_e32_vi = 9173
    Feature_HasMovrel | Feature_isSICI | 0, // V_MOVRELSD_B32_e64_si = 9174
    Feature_HasMovrel | Feature_isVI | 0, // V_MOVRELSD_B32_e64_vi = 9175
    Feature_HasMovrel | Feature_isSICI | 0, // V_MOVRELS_B32_e32_si = 9176
    Feature_HasMovrel | Feature_isVI | 0, // V_MOVRELS_B32_e32_vi = 9177
    Feature_HasMovrel | Feature_isSICI | 0, // V_MOVRELS_B32_e64_si = 9178
    Feature_HasMovrel | Feature_isVI | 0, // V_MOVRELS_B32_e64_vi = 9179
    Feature_HasDPP | Feature_HasDPP | 0, // V_MOV_B32_dpp_vi = 9180
    Feature_isGCN | Feature_isSICI | 0, // V_MOV_B32_e32_si = 9181
    Feature_isGCN | Feature_isVI | 0, // V_MOV_B32_e32_vi = 9182
    Feature_isGCN | Feature_isSICI | 0, // V_MOV_B32_e64_si = 9183
    Feature_isGCN | Feature_isVI | 0, // V_MOV_B32_e64_vi = 9184
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MOV_B32_sdwa_gfx9 = 9185
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_MOV_B32_sdwa_vi = 9186
    Feature_HasDPP | Feature_HasDPP | 0, // V_MOV_FED_B32_dpp_vi = 9187
    Feature_isGCN | Feature_isSICI | 0, // V_MOV_FED_B32_e32_si = 9188
    Feature_isGCN | Feature_isVI | 0, // V_MOV_FED_B32_e32_vi = 9189
    Feature_isGCN | Feature_isSICI | 0, // V_MOV_FED_B32_e64_si = 9190
    Feature_isGCN | Feature_isVI | 0, // V_MOV_FED_B32_e64_vi = 9191
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MOV_FED_B32_sdwa_gfx9 = 9192
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_MOV_FED_B32_sdwa_vi = 9193
    Feature_isGCN | Feature_isSICI | 0, // V_MQSAD_PK_U16_U8_si = 9194
    Feature_isGCN | Feature_isVI | 0, // V_MQSAD_PK_U16_U8_vi = 9195
    Feature_isCIVI | Feature_isCIOnly | 0, // V_MQSAD_U32_U8_ci = 9196
    Feature_isCIVI | Feature_isVI | 0, // V_MQSAD_U32_U8_vi = 9197
    Feature_isGCN | Feature_isSICI | 0, // V_MSAD_U8_si = 9198
    Feature_isGCN | Feature_isVI | 0, // V_MSAD_U8_vi = 9199
    Feature_isSICI | Feature_isSICI | 0, // V_MULLIT_F32_si = 9200
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_MUL_F16_dpp_vi = 9201
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MUL_F16_e32_vi = 9202
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MUL_F16_e64_vi = 9203
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MUL_F16_sdwa_gfx9 = 9204
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_MUL_F16_sdwa_vi = 9205
    Feature_isGCN | Feature_HasDPP | 0, // V_MUL_F32_dpp_vi = 9206
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_F32_e32_si = 9207
    Feature_isGCN | Feature_isVI | 0, // V_MUL_F32_e32_vi = 9208
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_F32_e64_si = 9209
    Feature_isGCN | Feature_isVI | 0, // V_MUL_F32_e64_vi = 9210
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MUL_F32_sdwa_gfx9 = 9211
    Feature_isGCN | Feature_HasSDWA | 0, // V_MUL_F32_sdwa_vi = 9212
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_F64_si = 9213
    Feature_isGCN | Feature_isVI | 0, // V_MUL_F64_vi = 9214
    Feature_isGCN | Feature_HasDPP | 0, // V_MUL_HI_I32_I24_dpp_vi = 9215
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_HI_I32_I24_e32_si = 9216
    Feature_isGCN | Feature_isVI | 0, // V_MUL_HI_I32_I24_e32_vi = 9217
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_HI_I32_I24_e64_si = 9218
    Feature_isGCN | Feature_isVI | 0, // V_MUL_HI_I32_I24_e64_vi = 9219
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MUL_HI_I32_I24_sdwa_gfx9 = 9220
    Feature_isGCN | Feature_HasSDWA | 0, // V_MUL_HI_I32_I24_sdwa_vi = 9221
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_HI_I32_si = 9222
    Feature_isGCN | Feature_isVI | 0, // V_MUL_HI_I32_vi = 9223
    Feature_isGCN | Feature_HasDPP | 0, // V_MUL_HI_U32_U24_dpp_vi = 9224
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_HI_U32_U24_e32_si = 9225
    Feature_isGCN | Feature_isVI | 0, // V_MUL_HI_U32_U24_e32_vi = 9226
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_HI_U32_U24_e64_si = 9227
    Feature_isGCN | Feature_isVI | 0, // V_MUL_HI_U32_U24_e64_vi = 9228
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MUL_HI_U32_U24_sdwa_gfx9 = 9229
    Feature_isGCN | Feature_HasSDWA | 0, // V_MUL_HI_U32_U24_sdwa_vi = 9230
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_HI_U32_si = 9231
    Feature_isGCN | Feature_isVI | 0, // V_MUL_HI_U32_vi = 9232
    Feature_isGCN | Feature_HasDPP | 0, // V_MUL_I32_I24_dpp_vi = 9233
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_I32_I24_e32_si = 9234
    Feature_isGCN | Feature_isVI | 0, // V_MUL_I32_I24_e32_vi = 9235
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_I32_I24_e64_si = 9236
    Feature_isGCN | Feature_isVI | 0, // V_MUL_I32_I24_e64_vi = 9237
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MUL_I32_I24_sdwa_gfx9 = 9238
    Feature_isGCN | Feature_HasSDWA | 0, // V_MUL_I32_I24_sdwa_vi = 9239
    Feature_isGCN | Feature_HasDPP | 0, // V_MUL_LEGACY_F32_dpp_vi = 9240
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_LEGACY_F32_e32_si = 9241
    Feature_isGCN | Feature_isVI | 0, // V_MUL_LEGACY_F32_e32_vi = 9242
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_LEGACY_F32_e64_si = 9243
    Feature_isGCN | Feature_isVI | 0, // V_MUL_LEGACY_F32_e64_vi = 9244
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MUL_LEGACY_F32_sdwa_gfx9 = 9245
    Feature_isGCN | Feature_HasSDWA | 0, // V_MUL_LEGACY_F32_sdwa_vi = 9246
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_LO_I32_si = 9247
    Feature_isGCN | Feature_isVI | 0, // V_MUL_LO_I32_vi = 9248
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_MUL_LO_U16_dpp_vi = 9249
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MUL_LO_U16_e32_vi = 9250
    Feature_Has16BitInsts | Feature_isVI | 0, // V_MUL_LO_U16_e64_vi = 9251
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MUL_LO_U16_sdwa_gfx9 = 9252
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_MUL_LO_U16_sdwa_vi = 9253
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_LO_U32_si = 9254
    Feature_isGCN | Feature_isVI | 0, // V_MUL_LO_U32_vi = 9255
    Feature_isGCN | Feature_HasDPP | 0, // V_MUL_U32_U24_dpp_vi = 9256
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_U32_U24_e32_si = 9257
    Feature_isGCN | Feature_isVI | 0, // V_MUL_U32_U24_e32_vi = 9258
    Feature_isGCN | Feature_isSICI | 0, // V_MUL_U32_U24_e64_si = 9259
    Feature_isGCN | Feature_isVI | 0, // V_MUL_U32_U24_e64_vi = 9260
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_MUL_U32_U24_sdwa_gfx9 = 9261
    Feature_isGCN | Feature_HasSDWA | 0, // V_MUL_U32_U24_sdwa_vi = 9262
    Feature_isGCN | Feature_isSICI | 0, // V_NOP_e32_si = 9263
    Feature_isGCN | Feature_isVI | 0, // V_NOP_e32_vi = 9264
    Feature_isGCN | Feature_isSICI | 0, // V_NOP_e64_si = 9265
    Feature_isGCN | Feature_isVI | 0, // V_NOP_e64_vi = 9266
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_NOP_sdwa_gfx9 = 9267
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_NOP_sdwa_vi = 9268
    Feature_HasDPP | Feature_HasDPP | 0, // V_NOT_B32_dpp_vi = 9269
    Feature_isGCN | Feature_isSICI | 0, // V_NOT_B32_e32_si = 9270
    Feature_isGCN | Feature_isVI | 0, // V_NOT_B32_e32_vi = 9271
    Feature_isGCN | Feature_isSICI | 0, // V_NOT_B32_e64_si = 9272
    Feature_isGCN | Feature_isVI | 0, // V_NOT_B32_e64_vi = 9273
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_NOT_B32_sdwa_gfx9 = 9274
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_NOT_B32_sdwa_vi = 9275
    Feature_isGFX9 | Feature_isVI | 0, // V_OR3_B32_vi = 9276
    Feature_isGCN | Feature_HasDPP | 0, // V_OR_B32_dpp_vi = 9277
    Feature_isGCN | Feature_isSICI | 0, // V_OR_B32_e32_si = 9278
    Feature_isGCN | Feature_isVI | 0, // V_OR_B32_e32_vi = 9279
    Feature_isGCN | Feature_isSICI | 0, // V_OR_B32_e64_si = 9280
    Feature_isGCN | Feature_isVI | 0, // V_OR_B32_e64_vi = 9281
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_OR_B32_sdwa_gfx9 = 9282
    Feature_isGCN | Feature_HasSDWA | 0, // V_OR_B32_sdwa_vi = 9283
    Feature_isGFX9 | Feature_isVI | 0, // V_PACK_B32_F16_vi = 9284
    Feature_isVI | Feature_isVI | 0, // V_PERM_B32_vi = 9285
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_ADD_F16_vi = 9286
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_ADD_I16_vi = 9287
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_ADD_U16_vi = 9288
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_ASHRREV_I16_vi = 9289
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_FMA_F16_vi = 9290
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_LSHLREV_B16_vi = 9291
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_LSHRREV_B16_vi = 9292
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_MAD_I16_vi = 9293
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_MAD_U16_vi = 9294
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_MAX_F16_vi = 9295
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_MAX_I16_vi = 9296
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_MAX_U16_vi = 9297
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_MIN_F16_vi = 9298
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_MIN_I16_vi = 9299
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_MIN_U16_vi = 9300
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_MUL_F16_vi = 9301
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_MUL_LO_U16_vi = 9302
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_SUB_I16_vi = 9303
    Feature_isGCN | Feature_HasVOP3PInsts | 0, // V_PK_SUB_U16_vi = 9304
    Feature_isCIVI | Feature_isCIOnly | 0, // V_QSAD_PK_U16_U8_ci = 9305
    Feature_isCIVI | Feature_isVI | 0, // V_QSAD_PK_U16_U8_vi = 9306
    Feature_isSICI | Feature_isSICI | 0, // V_RCP_CLAMP_F32_e32_si = 9307
    Feature_isSICI | Feature_isSICI | 0, // V_RCP_CLAMP_F32_e64_si = 9308
    Feature_isSICI | Feature_isSICI | 0, // V_RCP_CLAMP_F64_e32_si = 9309
    Feature_isSICI | Feature_isSICI | 0, // V_RCP_CLAMP_F64_e64_si = 9310
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_RCP_F16_dpp_vi = 9311
    Feature_Has16BitInsts | Feature_isVI | 0, // V_RCP_F16_e32_vi = 9312
    Feature_Has16BitInsts | Feature_isVI | 0, // V_RCP_F16_e64_vi = 9313
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_RCP_F16_sdwa_gfx9 = 9314
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_RCP_F16_sdwa_vi = 9315
    Feature_HasDPP | Feature_HasDPP | 0, // V_RCP_F32_dpp_vi = 9316
    Feature_isGCN | Feature_isSICI | 0, // V_RCP_F32_e32_si = 9317
    Feature_isGCN | Feature_isVI | 0, // V_RCP_F32_e32_vi = 9318
    Feature_isGCN | Feature_isSICI | 0, // V_RCP_F32_e64_si = 9319
    Feature_isGCN | Feature_isVI | 0, // V_RCP_F32_e64_vi = 9320
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_RCP_F32_sdwa_gfx9 = 9321
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_RCP_F32_sdwa_vi = 9322
    Feature_isGCN | Feature_isSICI | 0, // V_RCP_F64_e32_si = 9323
    Feature_isGCN | Feature_isVI | 0, // V_RCP_F64_e32_vi = 9324
    Feature_isGCN | Feature_isSICI | 0, // V_RCP_F64_e64_si = 9325
    Feature_isGCN | Feature_isVI | 0, // V_RCP_F64_e64_vi = 9326
    Feature_DisableInst | Feature_DisableInst | 0, // V_RCP_F64_sdwa_gfx9 = 9327
    Feature_DisableInst | Feature_DisableInst | 0, // V_RCP_F64_sdwa_vi = 9328
    Feature_HasDPP | Feature_HasDPP | 0, // V_RCP_IFLAG_F32_dpp_vi = 9329
    Feature_isGCN | Feature_isSICI | 0, // V_RCP_IFLAG_F32_e32_si = 9330
    Feature_isGCN | Feature_isVI | 0, // V_RCP_IFLAG_F32_e32_vi = 9331
    Feature_isGCN | Feature_isSICI | 0, // V_RCP_IFLAG_F32_e64_si = 9332
    Feature_isGCN | Feature_isVI | 0, // V_RCP_IFLAG_F32_e64_vi = 9333
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_RCP_IFLAG_F32_sdwa_gfx9 = 9334
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_RCP_IFLAG_F32_sdwa_vi = 9335
    Feature_isSICI | Feature_isSICI | 0, // V_RCP_LEGACY_F32_e32_si = 9336
    Feature_isSICI | Feature_isSICI | 0, // V_RCP_LEGACY_F32_e64_si = 9337
    Feature_isGCN | 0, // V_READFIRSTLANE_B32 = 9338
    Feature_isGCN | Feature_isSICI | 0, // V_READLANE_B32_si = 9339
    Feature_isGCN | Feature_isVI | 0, // V_READLANE_B32_vi = 9340
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_RNDNE_F16_dpp_vi = 9341
    Feature_Has16BitInsts | Feature_isVI | 0, // V_RNDNE_F16_e32_vi = 9342
    Feature_Has16BitInsts | Feature_isVI | 0, // V_RNDNE_F16_e64_vi = 9343
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_RNDNE_F16_sdwa_gfx9 = 9344
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_RNDNE_F16_sdwa_vi = 9345
    Feature_HasDPP | Feature_HasDPP | 0, // V_RNDNE_F32_dpp_vi = 9346
    Feature_isGCN | Feature_isSICI | 0, // V_RNDNE_F32_e32_si = 9347
    Feature_isGCN | Feature_isVI | 0, // V_RNDNE_F32_e32_vi = 9348
    Feature_isGCN | Feature_isSICI | 0, // V_RNDNE_F32_e64_si = 9349
    Feature_isGCN | Feature_isVI | 0, // V_RNDNE_F32_e64_vi = 9350
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_RNDNE_F32_sdwa_gfx9 = 9351
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_RNDNE_F32_sdwa_vi = 9352
    Feature_isCIVI | Feature_isCIOnly | 0, // V_RNDNE_F64_e32_ci = 9353
    Feature_isCIVI | Feature_isVI | 0, // V_RNDNE_F64_e32_vi = 9354
    Feature_isCIVI | Feature_isCIOnly | 0, // V_RNDNE_F64_e64_ci = 9355
    Feature_isCIVI | Feature_isVI | 0, // V_RNDNE_F64_e64_vi = 9356
    Feature_DisableInst | Feature_DisableInst | 0, // V_RNDNE_F64_sdwa_gfx9 = 9357
    Feature_isCIVI | Feature_DisableInst | 0, // V_RNDNE_F64_sdwa_vi = 9358
    Feature_isSICI | Feature_isSICI | 0, // V_RSQ_CLAMP_F32_e32_si = 9359
    Feature_isSICI | Feature_isSICI | 0, // V_RSQ_CLAMP_F32_e64_si = 9360
    Feature_isSICI | Feature_isSICI | 0, // V_RSQ_CLAMP_F64_e32_si = 9361
    Feature_isSICI | Feature_isSICI | 0, // V_RSQ_CLAMP_F64_e64_si = 9362
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_RSQ_F16_dpp_vi = 9363
    Feature_Has16BitInsts | Feature_isVI | 0, // V_RSQ_F16_e32_vi = 9364
    Feature_Has16BitInsts | Feature_isVI | 0, // V_RSQ_F16_e64_vi = 9365
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_RSQ_F16_sdwa_gfx9 = 9366
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_RSQ_F16_sdwa_vi = 9367
    Feature_HasDPP | Feature_HasDPP | 0, // V_RSQ_F32_dpp_vi = 9368
    Feature_isGCN | Feature_isSICI | 0, // V_RSQ_F32_e32_si = 9369
    Feature_isGCN | Feature_isVI | 0, // V_RSQ_F32_e32_vi = 9370
    Feature_isGCN | Feature_isSICI | 0, // V_RSQ_F32_e64_si = 9371
    Feature_isGCN | Feature_isVI | 0, // V_RSQ_F32_e64_vi = 9372
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_RSQ_F32_sdwa_gfx9 = 9373
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_RSQ_F32_sdwa_vi = 9374
    Feature_isGCN | Feature_isSICI | 0, // V_RSQ_F64_e32_si = 9375
    Feature_isGCN | Feature_isVI | 0, // V_RSQ_F64_e32_vi = 9376
    Feature_isGCN | Feature_isSICI | 0, // V_RSQ_F64_e64_si = 9377
    Feature_isGCN | Feature_isVI | 0, // V_RSQ_F64_e64_vi = 9378
    Feature_DisableInst | Feature_DisableInst | 0, // V_RSQ_F64_sdwa_gfx9 = 9379
    Feature_DisableInst | Feature_DisableInst | 0, // V_RSQ_F64_sdwa_vi = 9380
    Feature_isSICI | Feature_isSICI | 0, // V_RSQ_LEGACY_F32_e32_si = 9381
    Feature_isSICI | Feature_isSICI | 0, // V_RSQ_LEGACY_F32_e64_si = 9382
    Feature_isGCN | Feature_isSICI | 0, // V_SAD_HI_U8_si = 9383
    Feature_isGCN | Feature_isVI | 0, // V_SAD_HI_U8_vi = 9384
    Feature_isGCN | Feature_isSICI | 0, // V_SAD_U16_si = 9385
    Feature_isGCN | Feature_isVI | 0, // V_SAD_U16_vi = 9386
    Feature_isGCN | Feature_isSICI | 0, // V_SAD_U32_si = 9387
    Feature_isGCN | Feature_isVI | 0, // V_SAD_U32_vi = 9388
    Feature_isGCN | Feature_isSICI | 0, // V_SAD_U8_si = 9389
    Feature_isGCN | Feature_isVI | 0, // V_SAD_U8_vi = 9390
    Feature_isGFX9 | Feature_HasDPP | 0, // V_SAT_PK_U8_I16_dpp_vi = 9391
    Feature_isGFX9 | Feature_isVI | 0, // V_SAT_PK_U8_I16_e32_vi = 9392
    Feature_isGFX9 | Feature_isVI | 0, // V_SAT_PK_U8_I16_e64_vi = 9393
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_SAT_PK_U8_I16_sdwa_gfx9 = 9394
    Feature_isGFX9 | Feature_HasSDWA | 0, // V_SAT_PK_U8_I16_sdwa_vi = 9395
    Feature_isGFX9 | Feature_HasDPP | 0, // V_SCREEN_PARTITION_4SE_B32_dpp_gfx9 = 9396
    Feature_isGFX9 | Feature_isGFX9 | 0, // V_SCREEN_PARTITION_4SE_B32_e32_vi = 9397
    Feature_isGFX9 | Feature_isGFX9 | 0, // V_SCREEN_PARTITION_4SE_B32_e64_vi = 9398
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_SCREEN_PARTITION_4SE_B32_sdwa_gfx9 = 9399
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_SIN_F16_dpp_vi = 9400
    Feature_Has16BitInsts | Feature_isVI | 0, // V_SIN_F16_e32_vi = 9401
    Feature_Has16BitInsts | Feature_isVI | 0, // V_SIN_F16_e64_vi = 9402
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_SIN_F16_sdwa_gfx9 = 9403
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_SIN_F16_sdwa_vi = 9404
    Feature_HasDPP | Feature_HasDPP | 0, // V_SIN_F32_dpp_vi = 9405
    Feature_isGCN | Feature_isSICI | 0, // V_SIN_F32_e32_si = 9406
    Feature_isGCN | Feature_isVI | 0, // V_SIN_F32_e32_vi = 9407
    Feature_isGCN | Feature_isSICI | 0, // V_SIN_F32_e64_si = 9408
    Feature_isGCN | Feature_isVI | 0, // V_SIN_F32_e64_vi = 9409
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_SIN_F32_sdwa_gfx9 = 9410
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_SIN_F32_sdwa_vi = 9411
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_SQRT_F16_dpp_vi = 9412
    Feature_Has16BitInsts | Feature_isVI | 0, // V_SQRT_F16_e32_vi = 9413
    Feature_Has16BitInsts | Feature_isVI | 0, // V_SQRT_F16_e64_vi = 9414
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_SQRT_F16_sdwa_gfx9 = 9415
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_SQRT_F16_sdwa_vi = 9416
    Feature_HasDPP | Feature_HasDPP | 0, // V_SQRT_F32_dpp_vi = 9417
    Feature_isGCN | Feature_isSICI | 0, // V_SQRT_F32_e32_si = 9418
    Feature_isGCN | Feature_isVI | 0, // V_SQRT_F32_e32_vi = 9419
    Feature_isGCN | Feature_isSICI | 0, // V_SQRT_F32_e64_si = 9420
    Feature_isGCN | Feature_isVI | 0, // V_SQRT_F32_e64_vi = 9421
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_SQRT_F32_sdwa_gfx9 = 9422
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_SQRT_F32_sdwa_vi = 9423
    Feature_isGCN | Feature_isSICI | 0, // V_SQRT_F64_e32_si = 9424
    Feature_isGCN | Feature_isVI | 0, // V_SQRT_F64_e32_vi = 9425
    Feature_isGCN | Feature_isSICI | 0, // V_SQRT_F64_e64_si = 9426
    Feature_isGCN | Feature_isVI | 0, // V_SQRT_F64_e64_vi = 9427
    Feature_DisableInst | Feature_DisableInst | 0, // V_SQRT_F64_sdwa_gfx9 = 9428
    Feature_DisableInst | Feature_DisableInst | 0, // V_SQRT_F64_sdwa_vi = 9429
    Feature_isGCN | Feature_HasDPP | Feature_isGFX9 | 0, // V_SUBBREV_CO_U32_dpp_gfx9 = 9430
    Feature_isGCN | Feature_isGFX9 | 0, // V_SUBBREV_CO_U32_e32_gfx9 = 9431
    Feature_isGCN | Feature_isGFX9 | 0, // V_SUBBREV_CO_U32_e64_gfx9 = 9432
    Feature_HasSDWA9 | Feature_HasSDWA9 | Feature_isGFX9 | 0, // V_SUBBREV_CO_U32_sdwa_gfx9 = 9433
    Feature_isGCN | Feature_HasDPP | Feature_isVIOnly | 0, // V_SUBBREV_U32_dpp_vi = 9434
    Feature_isGCN | Feature_isSICI | 0, // V_SUBBREV_U32_e32_si = 9435
    Feature_isGCN | Feature_isVIOnly | 0, // V_SUBBREV_U32_e32_vi = 9436
    Feature_isGCN | Feature_isSICI | 0, // V_SUBBREV_U32_e64_si = 9437
    Feature_isGCN | Feature_isVIOnly | 0, // V_SUBBREV_U32_e64_vi = 9438
    Feature_isGCN | Feature_HasSDWA | Feature_isVIOnly | 0, // V_SUBBREV_U32_sdwa_vi = 9439
    Feature_isGCN | Feature_HasDPP | Feature_isGFX9 | 0, // V_SUBB_CO_U32_dpp_gfx9 = 9440
    Feature_isGCN | Feature_isGFX9 | 0, // V_SUBB_CO_U32_e32_gfx9 = 9441
    Feature_isGCN | Feature_isGFX9 | 0, // V_SUBB_CO_U32_e64_gfx9 = 9442
    Feature_HasSDWA9 | Feature_HasSDWA9 | Feature_isGFX9 | 0, // V_SUBB_CO_U32_sdwa_gfx9 = 9443
    Feature_isGCN | Feature_HasDPP | Feature_isVIOnly | 0, // V_SUBB_U32_dpp_vi = 9444
    Feature_isGCN | Feature_isSICI | 0, // V_SUBB_U32_e32_si = 9445
    Feature_isGCN | Feature_isVIOnly | 0, // V_SUBB_U32_e32_vi = 9446
    Feature_isGCN | Feature_isSICI | 0, // V_SUBB_U32_e64_si = 9447
    Feature_isGCN | Feature_isVIOnly | 0, // V_SUBB_U32_e64_vi = 9448
    Feature_isGCN | Feature_HasSDWA | Feature_isVIOnly | 0, // V_SUBB_U32_sdwa_vi = 9449
    Feature_isGCN | Feature_HasDPP | Feature_isGFX9 | 0, // V_SUBREV_CO_U32_dpp_gfx9 = 9450
    Feature_isGCN | Feature_isGFX9 | 0, // V_SUBREV_CO_U32_e32_gfx9 = 9451
    Feature_isGCN | Feature_isGFX9 | 0, // V_SUBREV_CO_U32_e64_gfx9 = 9452
    Feature_HasSDWA9 | Feature_HasSDWA9 | Feature_isGFX9 | 0, // V_SUBREV_CO_U32_sdwa_gfx9 = 9453
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_SUBREV_F16_dpp_vi = 9454
    Feature_Has16BitInsts | Feature_isVI | 0, // V_SUBREV_F16_e32_vi = 9455
    Feature_Has16BitInsts | Feature_isVI | 0, // V_SUBREV_F16_e64_vi = 9456
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_SUBREV_F16_sdwa_gfx9 = 9457
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_SUBREV_F16_sdwa_vi = 9458
    Feature_isGCN | Feature_HasDPP | 0, // V_SUBREV_F32_dpp_vi = 9459
    Feature_isGCN | Feature_isSICI | 0, // V_SUBREV_F32_e32_si = 9460
    Feature_isGCN | Feature_isVI | 0, // V_SUBREV_F32_e32_vi = 9461
    Feature_isGCN | Feature_isSICI | 0, // V_SUBREV_F32_e64_si = 9462
    Feature_isGCN | Feature_isVI | 0, // V_SUBREV_F32_e64_vi = 9463
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_SUBREV_F32_sdwa_gfx9 = 9464
    Feature_isGCN | Feature_HasSDWA | 0, // V_SUBREV_F32_sdwa_vi = 9465
    Feature_isGCN | Feature_isSICI | 0, // V_SUBREV_I32_e32_si = 9466
    Feature_isGCN | Feature_isSICI | 0, // V_SUBREV_I32_e64_si = 9467
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_SUBREV_U16_dpp_vi = 9468
    Feature_Has16BitInsts | Feature_isVI | 0, // V_SUBREV_U16_e32_vi = 9469
    Feature_Has16BitInsts | Feature_isVI | 0, // V_SUBREV_U16_e64_vi = 9470
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_SUBREV_U16_sdwa_gfx9 = 9471
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_SUBREV_U16_sdwa_vi = 9472
    Feature_HasAddNoCarryInsts | Feature_HasDPP | Feature_isGFX9 | 0, // V_SUBREV_U32_dpp_gfx9 = 9473
    Feature_isGCN | Feature_HasDPP | Feature_isVIOnly | 0, // V_SUBREV_U32_dpp_vi = 9474
    Feature_HasAddNoCarryInsts | Feature_isGFX9 | 0, // V_SUBREV_U32_e32_gfx9 = 9475
    Feature_isGCN | Feature_isVIOnly | 0, // V_SUBREV_U32_e32_vi = 9476
    Feature_HasAddNoCarryInsts | Feature_isGFX9 | 0, // V_SUBREV_U32_e64_gfx9 = 9477
    Feature_isGCN | Feature_isVIOnly | 0, // V_SUBREV_U32_e64_vi = 9478
    Feature_HasSDWA9 | Feature_HasSDWA9 | Feature_isGFX9 | 0, // V_SUBREV_U32_sdwa_gfx9 = 9479
    Feature_isGCN | Feature_HasSDWA | Feature_isVIOnly | 0, // V_SUBREV_U32_sdwa_vi = 9480
    Feature_isGCN | Feature_HasDPP | Feature_isGFX9 | 0, // V_SUB_CO_U32_dpp_gfx9 = 9481
    Feature_isGCN | Feature_isGFX9 | 0, // V_SUB_CO_U32_e32_gfx9 = 9482
    Feature_isGCN | Feature_isGFX9 | 0, // V_SUB_CO_U32_e64_gfx9 = 9483
    Feature_HasSDWA9 | Feature_HasSDWA9 | Feature_isGFX9 | 0, // V_SUB_CO_U32_sdwa_gfx9 = 9484
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_SUB_F16_dpp_vi = 9485
    Feature_Has16BitInsts | Feature_isVI | 0, // V_SUB_F16_e32_vi = 9486
    Feature_Has16BitInsts | Feature_isVI | 0, // V_SUB_F16_e64_vi = 9487
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_SUB_F16_sdwa_gfx9 = 9488
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_SUB_F16_sdwa_vi = 9489
    Feature_isGCN | Feature_HasDPP | 0, // V_SUB_F32_dpp_vi = 9490
    Feature_isGCN | Feature_isSICI | 0, // V_SUB_F32_e32_si = 9491
    Feature_isGCN | Feature_isVI | 0, // V_SUB_F32_e32_vi = 9492
    Feature_isGCN | Feature_isSICI | 0, // V_SUB_F32_e64_si = 9493
    Feature_isGCN | Feature_isVI | 0, // V_SUB_F32_e64_vi = 9494
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_SUB_F32_sdwa_gfx9 = 9495
    Feature_isGCN | Feature_HasSDWA | 0, // V_SUB_F32_sdwa_vi = 9496
    Feature_isGFX9 | Feature_isVI | 0, // V_SUB_I16_vi = 9497
    Feature_isGCN | Feature_isSICI | 0, // V_SUB_I32_e32_si = 9498
    Feature_isGCN | Feature_isSICI | 0, // V_SUB_I32_e64_si = 9499
    Feature_isGFX9 | Feature_isGFX9 | 0, // V_SUB_I32_gfx9_gfx9 = 9500
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_SUB_U16_dpp_vi = 9501
    Feature_Has16BitInsts | Feature_isVI | 0, // V_SUB_U16_e32_vi = 9502
    Feature_Has16BitInsts | Feature_isVI | 0, // V_SUB_U16_e64_vi = 9503
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_SUB_U16_sdwa_gfx9 = 9504
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_SUB_U16_sdwa_vi = 9505
    Feature_HasAddNoCarryInsts | Feature_HasDPP | Feature_isGFX9 | 0, // V_SUB_U32_dpp_gfx9 = 9506
    Feature_isGCN | Feature_HasDPP | Feature_isVIOnly | 0, // V_SUB_U32_dpp_vi = 9507
    Feature_HasAddNoCarryInsts | Feature_isGFX9 | 0, // V_SUB_U32_e32_gfx9 = 9508
    Feature_isGCN | Feature_isVIOnly | 0, // V_SUB_U32_e32_vi = 9509
    Feature_HasAddNoCarryInsts | Feature_isGFX9 | 0, // V_SUB_U32_e64_gfx9 = 9510
    Feature_isGCN | Feature_isVIOnly | 0, // V_SUB_U32_e64_vi = 9511
    Feature_HasSDWA9 | Feature_HasSDWA9 | Feature_isGFX9 | 0, // V_SUB_U32_sdwa_gfx9 = 9512
    Feature_isGCN | Feature_HasSDWA | Feature_isVIOnly | 0, // V_SUB_U32_sdwa_vi = 9513
    Feature_isGFX9 | Feature_isVI | 0, // V_SWAP_B32_vi = 9514
    Feature_isGCN | Feature_isSICI | 0, // V_TRIG_PREOP_F64_si = 9515
    Feature_isGCN | Feature_isVI | 0, // V_TRIG_PREOP_F64_vi = 9516
    Feature_Has16BitInsts | Feature_HasDPP | 0, // V_TRUNC_F16_dpp_vi = 9517
    Feature_Has16BitInsts | Feature_isVI | 0, // V_TRUNC_F16_e32_vi = 9518
    Feature_Has16BitInsts | Feature_isVI | 0, // V_TRUNC_F16_e64_vi = 9519
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_TRUNC_F16_sdwa_gfx9 = 9520
    Feature_Has16BitInsts | Feature_HasSDWA | 0, // V_TRUNC_F16_sdwa_vi = 9521
    Feature_HasDPP | Feature_HasDPP | 0, // V_TRUNC_F32_dpp_vi = 9522
    Feature_isGCN | Feature_isSICI | 0, // V_TRUNC_F32_e32_si = 9523
    Feature_isGCN | Feature_isVI | 0, // V_TRUNC_F32_e32_vi = 9524
    Feature_isGCN | Feature_isSICI | 0, // V_TRUNC_F32_e64_si = 9525
    Feature_isGCN | Feature_isVI | 0, // V_TRUNC_F32_e64_vi = 9526
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_TRUNC_F32_sdwa_gfx9 = 9527
    Feature_HasSDWA | Feature_HasSDWA | 0, // V_TRUNC_F32_sdwa_vi = 9528
    Feature_isCIVI | Feature_isCIOnly | 0, // V_TRUNC_F64_e32_ci = 9529
    Feature_isCIVI | Feature_isVI | 0, // V_TRUNC_F64_e32_vi = 9530
    Feature_isCIVI | Feature_isCIOnly | 0, // V_TRUNC_F64_e64_ci = 9531
    Feature_isCIVI | Feature_isVI | 0, // V_TRUNC_F64_e64_vi = 9532
    Feature_DisableInst | Feature_DisableInst | 0, // V_TRUNC_F64_sdwa_gfx9 = 9533
    Feature_isCIVI | Feature_DisableInst | 0, // V_TRUNC_F64_sdwa_vi = 9534
    Feature_isGCN | Feature_isSICI | 0, // V_WRITELANE_B32_si = 9535
    Feature_isGCN | Feature_isVI | 0, // V_WRITELANE_B32_vi = 9536
    Feature_isGFX9 | Feature_isVI | 0, // V_XAD_U32_vi = 9537
    Feature_HasDLInsts | Feature_HasDPP | 0, // V_XNOR_B32_dpp_vi = 9538
    Feature_HasDLInsts | Feature_isVI | 0, // V_XNOR_B32_e32_vi = 9539
    Feature_HasDLInsts | Feature_isVI | 0, // V_XNOR_B32_e64_vi = 9540
    Feature_HasDLInsts | Feature_HasSDWA9 | 0, // V_XNOR_B32_sdwa_gfx9 = 9541
    Feature_HasDLInsts | Feature_HasSDWA | 0, // V_XNOR_B32_sdwa_vi = 9542
    Feature_isGCN | Feature_HasDPP | 0, // V_XOR_B32_dpp_vi = 9543
    Feature_isGCN | Feature_isSICI | 0, // V_XOR_B32_e32_si = 9544
    Feature_isGCN | Feature_isVI | 0, // V_XOR_B32_e32_vi = 9545
    Feature_isGCN | Feature_isSICI | 0, // V_XOR_B32_e64_si = 9546
    Feature_isGCN | Feature_isVI | 0, // V_XOR_B32_e64_vi = 9547
    Feature_HasSDWA9 | Feature_HasSDWA9 | 0, // V_XOR_B32_sdwa_gfx9 = 9548
    Feature_isGCN | Feature_HasSDWA | 0, // V_XOR_B32_sdwa_vi = 9549
  };

  assert(Inst.getOpcode() < 9550);
  uint64_t MissingFeatures =
      (AvailableFeatures & RequiredFeatures[Inst.getOpcode()]) ^
      RequiredFeatures[Inst.getOpcode()];
  if (MissingFeatures) {
    std::ostringstream Msg;
    Msg << "Attempting to emit " << MCII.getName(Inst.getOpcode()).str()
        << " instruction but the ";
    for (unsigned i = 0; i < 8 * sizeof(MissingFeatures); ++i)
      if (MissingFeatures & (1ULL << i))
        Msg << SubtargetFeatureNames[i] << " ";
    Msg << "predicate(s) are not met";
    report_fatal_error(Msg.str());
  }
#else
// Silence unused variable warning on targets that don't use MCII for other purposes (e.g. BPF).
(void)MCII;
#endif // NDEBUG
}
#endif
